<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/soc/mediatek, branch linux-5.12.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>soc: mtk-pm-domains: Fix the clock prepared issue</title>
<updated>2021-07-20T14:02:25+00:00</updated>
<author>
<name>Weiyi Lu</name>
<email>weiyi.lu@mediatek.com</email>
</author>
<published>2021-06-01T03:59:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7e17ac2049626f0d385b015318696577198f0e4c'/>
<id>7e17ac2049626f0d385b015318696577198f0e4c</id>
<content type='text'>
[ Upstream commit f0fce06e345dc4f75c1cdd21840780f5fe2df1f3 ]

In this new power domain driver, when adding one power domain
it will prepare the dependent clocks at the same.
So we only do clk_bulk_enable/disable control during power ON/OFF.
When system suspend, the pm runtime framework will forcely power off
power domains. However, the dependent clocks are disabled but kept
prepared.

In MediaTek clock drivers, PLL would be turned ON when we do
clk_bulk_prepare control.

Clock hierarchy:
PLL --&gt;
       DIV_CK --&gt;
                 CLK_MUX
                 (may be dependent clocks)
                         --&gt;
                             SUBSYS_CG
                             (may be dependent clocks)

It will lead some unexpected clock states during system suspend.
This patch will fix by doing prepare_enable/disable_unprepare on
dependent clocks at the same time while we are going to power on/off
any power domain.

Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Weiyi Lu &lt;weiyi.lu@mediatek.com&gt;
Signed-off-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Reviewed-by: chun-jie.chen &lt;chun-jie.chen@mediatek.com&gt;
Reviewed-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210601035905.2970384-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit f0fce06e345dc4f75c1cdd21840780f5fe2df1f3 ]

In this new power domain driver, when adding one power domain
it will prepare the dependent clocks at the same.
So we only do clk_bulk_enable/disable control during power ON/OFF.
When system suspend, the pm runtime framework will forcely power off
power domains. However, the dependent clocks are disabled but kept
prepared.

In MediaTek clock drivers, PLL would be turned ON when we do
clk_bulk_prepare control.

Clock hierarchy:
PLL --&gt;
       DIV_CK --&gt;
                 CLK_MUX
                 (may be dependent clocks)
                         --&gt;
                             SUBSYS_CG
                             (may be dependent clocks)

It will lead some unexpected clock states during system suspend.
This patch will fix by doing prepare_enable/disable_unprepare on
dependent clocks at the same time while we are going to power on/off
any power domain.

Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Weiyi Lu &lt;weiyi.lu@mediatek.com&gt;
Signed-off-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Reviewed-by: chun-jie.chen &lt;chun-jie.chen@mediatek.com&gt;
Reviewed-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210601035905.2970384-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: mtk-pm-domains: do not register smi node as syscon</title>
<updated>2021-07-20T14:02:24+00:00</updated>
<author>
<name>Hsin-Yi Wang</name>
<email>hsinyi@chromium.org</email>
</author>
<published>2021-06-01T03:59:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ace0c0fbb39a4bd6a781ef957fccbf0bf989dfc4'/>
<id>ace0c0fbb39a4bd6a781ef957fccbf0bf989dfc4</id>
<content type='text'>
[ Upstream commit eed6ff1bb2da65067d928f4ab322c7d75f944fa4 ]

Mediatek requires mmsys clocks to be unprepared during suspend,
otherwise system has chances to hang.

syscon_regmap_lookup_by_phandle_optional() will attach and prepare the
first clock in smi node, leading to additional prepare to the clock
which is not balanced with the prepare/unprepare pair in resume/suspend
callbacks.

If a power domain node requests an smi node and the smi node's first
clock is an mmsys clock, it will results in an unstable suspend resume.

Fixes: f414854c8843 ("soc: mediatek: pm-domains: Add SMI block as bus protection block")
Signed-off-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Reviewed-by: chun-jie.chen &lt;chun-jie.chen@mediatek.com&gt;
Reviewed-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210601035905.2970384-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit eed6ff1bb2da65067d928f4ab322c7d75f944fa4 ]

Mediatek requires mmsys clocks to be unprepared during suspend,
otherwise system has chances to hang.

syscon_regmap_lookup_by_phandle_optional() will attach and prepare the
first clock in smi node, leading to additional prepare to the clock
which is not balanced with the prepare/unprepare pair in resume/suspend
callbacks.

If a power domain node requests an smi node and the smi node's first
clock is an mmsys clock, it will results in an unstable suspend resume.

Fixes: f414854c8843 ("soc: mediatek: pm-domains: Add SMI block as bus protection block")
Signed-off-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Reviewed-by: chun-jie.chen &lt;chun-jie.chen@mediatek.com&gt;
Reviewed-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210601035905.2970384-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: mediatek: pm-domains: Add a power domain names for mt8192</title>
<updated>2021-05-19T08:56:44+00:00</updated>
<author>
<name>Enric Balletbo i Serra</name>
<email>enric.balletbo@collabora.com</email>
</author>
<published>2021-02-25T17:49:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=eb68304c8771d793ba9edb6e2eb50b940c3de7a4'/>
<id>eb68304c8771d793ba9edb6e2eb50b940c3de7a4</id>
<content type='text'>
commit 3edc01bc53c639b1c98f57e7f1c026aae6a25a62 upstream.

Add the power domains names for the mt8192 SoC.

Fixes: a49d5e7a89d6 ("soc: mediatek: pm-domains: Add support for mt8192")
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Reviewed-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Link: https://lore.kernel.org/r/20210225175000.824661-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 3edc01bc53c639b1c98f57e7f1c026aae6a25a62 upstream.

Add the power domains names for the mt8192 SoC.

Fixes: a49d5e7a89d6 ("soc: mediatek: pm-domains: Add support for mt8192")
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Reviewed-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Link: https://lore.kernel.org/r/20210225175000.824661-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: mediatek: pm-domains: Add a power domain names for mt8183</title>
<updated>2021-05-19T08:56:43+00:00</updated>
<author>
<name>Enric Balletbo i Serra</name>
<email>enric.balletbo@collabora.com</email>
</author>
<published>2021-02-25T17:49:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=6858b67769a8554753b8e542761ec9dd061c8d38'/>
<id>6858b67769a8554753b8e542761ec9dd061c8d38</id>
<content type='text'>
commit e57b8112258ed46dff23b49d6e400f54a8dbf1c3 upstream.

Add the power domains names for the mt8183 SoC. This removes the debugfs
errors like the following:

  debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!

Fixes: eb9fa767fbe1 ("soc: mediatek: pm-domains: Add support for mt8183")
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Reviewed-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Link: https://lore.kernel.org/r/20210225175000.824661-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit e57b8112258ed46dff23b49d6e400f54a8dbf1c3 upstream.

Add the power domains names for the mt8183 SoC. This removes the debugfs
errors like the following:

  debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!

Fixes: eb9fa767fbe1 ("soc: mediatek: pm-domains: Add support for mt8183")
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Reviewed-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Link: https://lore.kernel.org/r/20210225175000.824661-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: mediatek: pm-domains: Add a meaningful power domain name</title>
<updated>2021-05-19T08:56:43+00:00</updated>
<author>
<name>Enric Balletbo i Serra</name>
<email>enric.balletbo@collabora.com</email>
</author>
<published>2021-02-25T17:49:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=0a84ada8aa8af7dc32fabb36cda12dba39ac60ae'/>
<id>0a84ada8aa8af7dc32fabb36cda12dba39ac60ae</id>
<content type='text'>
commit 022b02b4505ecea5eda02b18683531e49f7d8eb7 upstream.

Add the power domains names to the power domain struct so we
have meaningful name for every power domain. This also removes the
following debugfs error message.

  [    2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  ...

Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Reviewed-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Link: https://lore.kernel.org/r/20210225175000.824661-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 022b02b4505ecea5eda02b18683531e49f7d8eb7 upstream.

Add the power domains names to the power domain struct so we
have meaningful name for every power domain. This also removes the
following debugfs error message.

  [    2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  ...

Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Reviewed-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Link: https://lore.kernel.org/r/20210225175000.824661-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: mediatek: pm-domains: Fix missing error code in scpsys_add_subdomain()</title>
<updated>2021-05-14T08:52:24+00:00</updated>
<author>
<name>Enric Balletbo i Serra</name>
<email>enric.balletbo@collabora.com</email>
</author>
<published>2021-03-03T09:10:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=15fe1e9adbbdab40272aa582f8a676156b263f54'/>
<id>15fe1e9adbbdab40272aa582f8a676156b263f54</id>
<content type='text'>
[ Upstream commit 9950588a45241b0efcfc312ab0e414260ceca709 ]

Adding one power domain in scpsys_add_subdomain is missing to assign an
error code when it fails. Fix that assigning an error code to 'ret',
this also fixes the follwowing smatch warning.

  drivers/soc/mediatek/mtk-pm-domains.c:492 scpsys_add_subdomain() warn: missing error code 'ret'

Fixes: dd65030295e2 ("soc: mediatek: pm-domains: Don't print an error if child domain is deferred")
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Reported-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210303091054.796975-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 9950588a45241b0efcfc312ab0e414260ceca709 ]

Adding one power domain in scpsys_add_subdomain is missing to assign an
error code when it fails. Fix that assigning an error code to 'ret',
this also fixes the follwowing smatch warning.

  drivers/soc/mediatek/mtk-pm-domains.c:492 scpsys_add_subdomain() warn: missing error code 'ret'

Fixes: dd65030295e2 ("soc: mediatek: pm-domains: Don't print an error if child domain is deferred")
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Reported-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210303091054.796975-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm</title>
<updated>2021-02-21T22:44:44+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-02-21T22:44:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d99676af540c2dc829999928fb81c58c80a1dce4'/>
<id>d99676af540c2dc829999928fb81c58c80a1dce4</id>
<content type='text'>
Pull drm updates from Dave Airlie:
 "A pretty normal tree, lots of refactoring across the board, ttm, i915,
  nouveau, and bunch of features in various drivers.

  docs:
   - lots of updated docs

  core:
   - require crtc to have unique primary plane
   - fourcc macro fix
   - PCI bar quirk for bar resizing
   - don't sent hotplug on error
   - move vm code to legacy
   - nuke hose only used on old oboslete alpha

  dma-buf:
   - kernel doc updates
   - improved lock tracking

  dp/hdmi:
   - DP-HDMI2.1 protocol converter support

  ttm:
   - bo size handling cleanup
   - release a pinned bo warning
   - cleanup lru handler
   - avoid using pages with drm_prime_sg_to_page_addr_arrays

  cma-helper:
   - prime/mmap fixes

  bridge:
   - add DP support

  gma500:
   - remove gma3600 support

  i915:
   - try eDP fast/narrow link again with fallback
   - Intel eDP backlight control
   - replace display register read/write macros
   - refactor intel_display.c
   - display power improvements
   - HPD code cleanup
   - Rocketlake display fixes
   - Power/backlight/RPM fixes
   - DG1 display fix
   - IVB/BYT clear residuals security fix again
   - make i915 mitigations options via parameter
   - HSW GT1 GPU hangs fixes
   - DG1 workaround hang fixes
   - TGL DMAR hang avoidance
   - Lots of GT fixes
   - follow on fixes for residuals clear
   - gen7 per-engine-reset support
   - HDCP2.2 + HDCP1.4 GEN12 DP MST support
   - TGL clear color support
   - backlight refactoring
   - VRR/Adaptive sync enabling on DP/EDP for TGL+
   - async flips for all ilk+

  amdgpu:
   - rework IH ring handling (Vega/Navi)
   - rework HDP handling (Vega/Navi)
   - swSMU updates for renoir/vangogh
   - Sienna Cichild overdrive support
   - FP16 on DCE8-11 support
   - GPU reset on navy flounder/vangogh
   - SMU profile fixes for APU
   - SR-IOV fixes
   - Vangogh SMU fixes
   - fan speed control fixes

  amdkfd:
   - config handling fix
   - buffer free fix
   - recursive lock warnings fix

  nouveau:
   - Turing MMU fault recovery fixes
   - mDP connectors reporting fix
   - audio locking fixes
   - rework engines/instances code to support new scheme

  tegra:
   - VIC newer firmware support
   - display/gr2d fixes for older tegra
   - pm reference leak fix

  mediatek:
   - SOC MT8183 support
   - decouple sub driver + share mtk mutex driver

  radeon:
   - PCI resource fix for some platforms

  ingenic:
   - pm support
   - 8-bit delta RGB panels

  vmwgfx:
   - managed driver helpers

  vc4:
   - BCM2711 DSI1 support
   - converted to atomic helpers
   - enable 10/12 bpc outputs
   - gem prime mmap helpers
   - CEC fix

  omap:
   - use degamma table
   - CTM support
   - rework DSI support

  imx:
   - stack usage fixes
   - drm managed support
   - imx-tve clock provider leak fix
-

  rcar-du:
   - default mode fixes
   - conversion to managed API

  hisilicon:
   - use simple encoder

  vkms:
   - writeback connector support

  d3:
   - BT2020 support"

* tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm: (1459 commits)
  drm/amdgpu: Set reference clock to 100Mhz on Renoir (v2)
  drm/radeon: OLAND boards don't have VCE
  drm/amdkfd: Fix recursive lock warnings
  drm/amd/display: Add FPU wrappers to dcn21_validate_bandwidth()
  drm/amd/display: Fix potential integer overflow
  drm/amdgpu/display: remove hdcp_srm sysfs on device removal
  drm/amdgpu: fix CGTS_TCC_DISABLE register offset on gfx10.3
  drm/i915/gt: Correct surface base address for renderclear
  drm/i915: Disallow plane x+w&gt;stride on ilk+ with X-tiling
  drm/nouveau/top/ga100: initial support
  drm/nouveau/top: add ioctrl/nvjpg
  drm/nouveau/privring: rename from ibus
  drm/nouveau/nvkm: remove nvkm_subdev.index
  drm/nouveau/nvkm: determine subdev id/order from layout
  drm/nouveau/vic: switch to instanced constructor
  drm/nouveau/sw: switch to instanced constructor
  drm/nouveau/sec2: switch to instanced constructor
  drm/nouveau/sec: switch to instanced constructor
  drm/nouveau/pm: switch to instanced constructor
  drm/nouveau/nvenc: switch to instanced constructor
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull drm updates from Dave Airlie:
 "A pretty normal tree, lots of refactoring across the board, ttm, i915,
  nouveau, and bunch of features in various drivers.

  docs:
   - lots of updated docs

  core:
   - require crtc to have unique primary plane
   - fourcc macro fix
   - PCI bar quirk for bar resizing
   - don't sent hotplug on error
   - move vm code to legacy
   - nuke hose only used on old oboslete alpha

  dma-buf:
   - kernel doc updates
   - improved lock tracking

  dp/hdmi:
   - DP-HDMI2.1 protocol converter support

  ttm:
   - bo size handling cleanup
   - release a pinned bo warning
   - cleanup lru handler
   - avoid using pages with drm_prime_sg_to_page_addr_arrays

  cma-helper:
   - prime/mmap fixes

  bridge:
   - add DP support

  gma500:
   - remove gma3600 support

  i915:
   - try eDP fast/narrow link again with fallback
   - Intel eDP backlight control
   - replace display register read/write macros
   - refactor intel_display.c
   - display power improvements
   - HPD code cleanup
   - Rocketlake display fixes
   - Power/backlight/RPM fixes
   - DG1 display fix
   - IVB/BYT clear residuals security fix again
   - make i915 mitigations options via parameter
   - HSW GT1 GPU hangs fixes
   - DG1 workaround hang fixes
   - TGL DMAR hang avoidance
   - Lots of GT fixes
   - follow on fixes for residuals clear
   - gen7 per-engine-reset support
   - HDCP2.2 + HDCP1.4 GEN12 DP MST support
   - TGL clear color support
   - backlight refactoring
   - VRR/Adaptive sync enabling on DP/EDP for TGL+
   - async flips for all ilk+

  amdgpu:
   - rework IH ring handling (Vega/Navi)
   - rework HDP handling (Vega/Navi)
   - swSMU updates for renoir/vangogh
   - Sienna Cichild overdrive support
   - FP16 on DCE8-11 support
   - GPU reset on navy flounder/vangogh
   - SMU profile fixes for APU
   - SR-IOV fixes
   - Vangogh SMU fixes
   - fan speed control fixes

  amdkfd:
   - config handling fix
   - buffer free fix
   - recursive lock warnings fix

  nouveau:
   - Turing MMU fault recovery fixes
   - mDP connectors reporting fix
   - audio locking fixes
   - rework engines/instances code to support new scheme

  tegra:
   - VIC newer firmware support
   - display/gr2d fixes for older tegra
   - pm reference leak fix

  mediatek:
   - SOC MT8183 support
   - decouple sub driver + share mtk mutex driver

  radeon:
   - PCI resource fix for some platforms

  ingenic:
   - pm support
   - 8-bit delta RGB panels

  vmwgfx:
   - managed driver helpers

  vc4:
   - BCM2711 DSI1 support
   - converted to atomic helpers
   - enable 10/12 bpc outputs
   - gem prime mmap helpers
   - CEC fix

  omap:
   - use degamma table
   - CTM support
   - rework DSI support

  imx:
   - stack usage fixes
   - drm managed support
   - imx-tve clock provider leak fix
-

  rcar-du:
   - default mode fixes
   - conversion to managed API

  hisilicon:
   - use simple encoder

  vkms:
   - writeback connector support

  d3:
   - BT2020 support"

* tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm: (1459 commits)
  drm/amdgpu: Set reference clock to 100Mhz on Renoir (v2)
  drm/radeon: OLAND boards don't have VCE
  drm/amdkfd: Fix recursive lock warnings
  drm/amd/display: Add FPU wrappers to dcn21_validate_bandwidth()
  drm/amd/display: Fix potential integer overflow
  drm/amdgpu/display: remove hdcp_srm sysfs on device removal
  drm/amdgpu: fix CGTS_TCC_DISABLE register offset on gfx10.3
  drm/i915/gt: Correct surface base address for renderclear
  drm/i915: Disallow plane x+w&gt;stride on ilk+ with X-tiling
  drm/nouveau/top/ga100: initial support
  drm/nouveau/top: add ioctrl/nvjpg
  drm/nouveau/privring: rename from ibus
  drm/nouveau/nvkm: remove nvkm_subdev.index
  drm/nouveau/nvkm: determine subdev id/order from layout
  drm/nouveau/vic: switch to instanced constructor
  drm/nouveau/sw: switch to instanced constructor
  drm/nouveau/sec2: switch to instanced constructor
  drm/nouveau/sec: switch to instanced constructor
  drm/nouveau/pm: switch to instanced constructor
  drm/nouveau/nvenc: switch to instanced constructor
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>soc / drm: mediatek: Move mtk mutex driver to soc folder</title>
<updated>2021-02-04T14:55:46+00:00</updated>
<author>
<name>CK Hu</name>
<email>ck.hu@mediatek.com</email>
</author>
<published>2020-07-21T07:46:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e1e4f7fea37572f0ccf3887430e52c491e9accb6'/>
<id>e1e4f7fea37572f0ccf3887430e52c491e9accb6</id>
<content type='text'>
mtk mutex is used by DRM and MDP driver, and its function is SoC-specific,
so move it to soc folder.

Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
Signed-off-by: Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;
Acked-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
mtk mutex is used by DRM and MDP driver, and its function is SoC-specific,
so move it to soc folder.

Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
Signed-off-by: Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;
Acked-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: mediatek: pm-domains: Don't print an error if child domain is deferred</title>
<updated>2021-01-31T14:59:16+00:00</updated>
<author>
<name>Enric Balletbo i Serra</name>
<email>enric.balletbo@collabora.com</email>
</author>
<published>2021-01-13T21:30:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=dd65030295e20338bbb8238454c2e9546b6e5e17'/>
<id>dd65030295e20338bbb8238454c2e9546b6e5e17</id>
<content type='text'>
Child domains can be deferred by the core because one of its resources
is not available yet, in such case, it will print an error, but
later it will succeed to probe. Fix that using the dev_err_probe()
function so it only prints an error on a real error.

Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Reviewed-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Link: https://lore.kernel.org/r/20210113213012.67643-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Child domains can be deferred by the core because one of its resources
is not available yet, in such case, it will print an error, but
later it will succeed to probe. Fix that using the dev_err_probe()
function so it only prints an error on a real error.

Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Reviewed-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Link: https://lore.kernel.org/r/20210113213012.67643-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>soc: mediatek: pm-domains: Add domain regulator supply</title>
<updated>2021-01-31T14:47:49+00:00</updated>
<author>
<name>Hsin-Yi Wang</name>
<email>hsinyi@chromium.org</email>
</author>
<published>2021-01-29T10:12:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1b18c0558d092b29b0d9ccdf14a6915156e6cf32'/>
<id>1b18c0558d092b29b0d9ccdf14a6915156e6cf32</id>
<content type='text'>
Some power domains (eg. mfg) needs to turn on power supply before power
on.

Signed-off-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Reviewed-by: Nicolas Boichat &lt;drinkcat@chromium.org&gt;
Reviewed-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210129101208.2625249-3-hsinyi@chromium.org
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some power domains (eg. mfg) needs to turn on power supply before power
on.

Signed-off-by: Hsin-Yi Wang &lt;hsinyi@chromium.org&gt;
Reviewed-by: Nicolas Boichat &lt;drinkcat@chromium.org&gt;
Reviewed-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210129101208.2625249-3-hsinyi@chromium.org
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
