linux-stable.git/drivers/pwm, branch linux-4.5.y

pwm: omap-dmtimer: Round load and match values rather than truncate

2016-05-11T09:21:29+00:00

commit 7b0883f33809ff0aeca9848193c31629a752bb77 upstream.

When converting period and duty_cycle from nanoseconds to fclk cycles,
the error introduced by the integer division can be appreciable, especially
in the case of slow fclk or short period. Use DIV_ROUND_CLOSEST_ULL() so
that the error is kept to +/- 0.5 clock cycles.

Fixes: 6604c6556db9 ("pwm: Add PWM driver for OMAP using dual-mode timers")
Signed-off-by: David Rivshin 
Acked-by: Neil Armstrong 
Signed-off-by: Thierry Reding 
Signed-off-by: Greg Kroah-Hartman

pwm: omap-dmtimer: Add sanity checking for load and match values

2016-05-11T09:21:29+00:00

commit cd378881426379a62a7fe67f34b8cbe738302022 upstream.

Add sanity checking to ensure that we do not program load or match values
that are out of range if a user requests period or duty_cycle values which
are not achievable. The match value cannot be less than the load value (but
can be equal), and neither can be 0xffffffff. This means that there must be
at least one fclk cycle between load and match, and another between match
and overflow.

Fixes: 6604c6556db9 ("pwm: Add PWM driver for OMAP using dual-mode timers")
Signed-off-by: David Rivshin 
Acked-by: Neil Armstrong 
[thierry.reding@gmail.com: minor coding style cleanups]
Signed-off-by: Thierry Reding 
Signed-off-by: Greg Kroah-Hartman

pwm: omap-dmtimer: Fix inaccurate period and duty cycle calculations

2016-05-11T09:21:29+00:00

commit f8caa792261c0edded20eba2b8fcc899a1b91819 upstream.

Fix the calculation of load_value and match_value. Currently they
are slightly too low, which produces a noticeably wrong PWM rate with
sufficiently short periods (i.e. when 1/period approaches clk_rate/2).

Example:
 clk_rate=32768Hz, period=122070ns, duty_cycle=61035ns (8192Hz/50% PWM)
 Correct values: load = 0xfffffffc, match = 0xfffffffd
 Current values: load = 0xfffffffa, match = 0xfffffffc
 effective PWM: period=183105ns, duty_cycle=91553ns (5461Hz/50% PWM)

Fixes: 6604c6556db9 ("pwm: Add PWM driver for OMAP using dual-mode timers")
Signed-off-by: David Rivshin 
Acked-by: Neil Armstrong 
Tested-by: Adam Ford 
Signed-off-by: Thierry Reding 
Signed-off-by: Greg Kroah-Hartman

pwm: brcmstb: Fix check of devm_ioremap_resource() return code

2016-05-04T21:49:06+00:00

commit c5857e3f94ab2719dfac649a146cb5dd6f21fcf3 upstream.

The change fixes potential oops while accessing iomem on invalid address
if devm_ioremap_resource() fails due to some reason.

The devm_ioremap_resource() function returns ERR_PTR() and never returns
NULL, which makes useless a following check for NULL.

Signed-off-by: Vladimir Zapolskiy 
Fixes: 3a9f5957020f ("pwm: Add Broadcom BCM7038 PWM controller support")
Acked-by: Florian Fainelli 
Signed-off-by: Thierry Reding 
Signed-off-by: Greg Kroah-Hartman

pwm: Mark all devices as "might sleep"

2016-01-21T14:04:59+00:00

Commit d1cd21427747 ("pwm: Set enable state properly on failed call to
enable") introduced a mutex that is needed to protect internal state of
PWM devices. Since that mutex is acquired in pwm_set_polarity() and in
pwm_enable() and might potentially block, all PWM devices effectively
become "might sleep".

It's rather pointless to keep the .can_sleep field around, but given
that there are external users let's postpone the removal for the next
release cycle.

Signed-off-by: Thierry Reding

pwm: omap-dmtimer: Potential NULL dereference on error

2016-01-04T07:58:33+00:00

"omap" is NULL so we can't dereference it.

Signed-off-by: Dan Carpenter 
Signed-off-by: Thierry Reding

pwm: add HAS_IOMEM dependency to PWM_FSL_FTM

2016-01-04T07:55:03+00:00

Ran into this on UML:

drivers/built-in.o: In function `fsl_pwm_probe':
linux/drivers/pwm/pwm-fsl-ftm.c:436: undefined reference to `devm_ioremap_resource'
collect2: error: ld returned 1 exit status

devm_ioremap_resource() is defined only when HAS_IOMEM is selected.

Signed-off-by: Vegard Nossum 
Cc: Xiubo Li 
Cc: Alison Wang 
Cc: Jingchang Lu 
Cc: Sascha Hauer 
Cc: Yuan Yao 
Cc: Thierry Reding 
Signed-off-by: Thierry Reding

pwm: Add PWM driver for OMAP using dual-mode timers

2015-12-16T16:25:37+00:00

Adds support for using a OMAP dual-mode timer with PWM capability
as a Linux PWM device. The driver controls the timer by using the
dmtimer API.

Add a platform_data structure for each pwm-omap-dmtimer nodes containing
the dmtimers functions in order to get driver not rely on platform
specific functions.

Cc: Grant Erickson 
Cc: NeilBrown 
Cc: Joachim Eastwood 
Suggested-by: Tony Lindgren 
Signed-off-by: Neil Armstrong 
Acked-by: Tony Lindgren 
[thierry.reding@gmail.com: coding style bikeshed, fix timer leak]
Signed-off-by: Thierry Reding

pwm: rcar: Improve accuracy of frequency division setting

2015-12-16T16:02:14+00:00

From: Ryo Kodama 

When period_ns is set to the same value of RCAR_PWM_MAX_CYCLE in
rcar_pwm_get_clock_division(), this function should allow such value
for improving accuracy of frequency division setting.

Signed-off-by: Ryo Kodama 
Signed-off-by: Yoshihiro Shimoda 
Signed-off-by: Thierry Reding

pwm: lpc32xx: return ERANGE, if requested period is not supported

2015-12-16T16:01:06+00:00

Instead of silent acceptance of unsupported requested configuration
for PWM period and setting the boundary supported value, return
-ERANGE to a caller.

Duty period value equal to 0 or period is still accepted to allow
configuration by PWM sysfs interface, when it is set to 0 by default.

For reference this is a list of restrictions on period_ns == 1/freq:

  | PWM parent clock | parent clock divisor | max freq | min freq |
  +------------------+----------------------+----------+----------+
  |   HCLK == 13 MHz |      1 (min)         | 50.7 KHz | 198.3 Hz |
  |   HCLK == 13 MHz |     15 (max)         | 3.38 KHz | 13.22 Hz |
  |  RTC == 32.7 KHz |      1 (min)         |   128 Hz |   0.5 Hz |
  |  RTC == 32.7 KHz |     15 (max)         | 8.533 Hz | 0.033 Hz |

Note that PWM sysfs interface does not support setting of period more
than NSEC_PER_SEC / MAX_INT32 ~ 2 seconds, however this PWM controller
supports a period up to 30 seconds.

Signed-off-by: Vladimir Zapolskiy 
Signed-off-by: Thierry Reding