<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/powercap, branch master</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Merge tag 'pm-7.3-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm</title>
<updated>2026-08-26T21:13:26+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-08-26T21:13:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=85671b807f82dae7a88ccfc74e33a8374219841c'/>
<id>85671b807f82dae7a88ccfc74e33a8374219841c</id>
<content type='text'>
Pull more power management updates from Rafael Wysocki:
 "These fix two issues in the intel_rapl power capping driver, fix a
  potential issue in the schedutil cpufreq governor on 32-bit systems,
  fix a runtime PM issue related to failing system suspend, and update
  the intel_pstate cpufreq driver:

   - Fix a kernel panic during PMU unbind in the intel_rapl power
     capping driver and sign-extend the PMU delta on counter wraparound
     in it to avoid misreporting energy (Sumeet Pawnikar and Yifan Li)

   - Unblock runtime PM when device prepare fails that was not done by
     mistake (Shibo Zhu)

   - Fix possible rate limit overflow on 32-bit systems in the schedutil
     cpufreq governor (Hui Su)

   - Consolidate HWP P-states initialization in the intel_pstate cpufreq
     driver and make that driver avoid using the DESIRED_PERF HWP hint
     when the Dynamic Efficiency Control (DEC) is enabled in the
     processor to avoid inconsistent behavior (Rafael Wysocki)"

* tag 'pm-7.3-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  powercap: intel_rapl: Fix kernel panic during PMU unbind
  PM: sleep: Unblock runtime PM when device prepare fails
  powercap: intel_rapl: Sign-extend the PMU delta on counter wraparound
  cpufreq: intel_pstate: Avoid using DESIRED_PERF when DEC is enabled
  cpufreq: intel_pstate: Consolidate HWP P-states initialization
  cpufreq: schedutil: Fix rate limit overflow
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull more power management updates from Rafael Wysocki:
 "These fix two issues in the intel_rapl power capping driver, fix a
  potential issue in the schedutil cpufreq governor on 32-bit systems,
  fix a runtime PM issue related to failing system suspend, and update
  the intel_pstate cpufreq driver:

   - Fix a kernel panic during PMU unbind in the intel_rapl power
     capping driver and sign-extend the PMU delta on counter wraparound
     in it to avoid misreporting energy (Sumeet Pawnikar and Yifan Li)

   - Unblock runtime PM when device prepare fails that was not done by
     mistake (Shibo Zhu)

   - Fix possible rate limit overflow on 32-bit systems in the schedutil
     cpufreq governor (Hui Su)

   - Consolidate HWP P-states initialization in the intel_pstate cpufreq
     driver and make that driver avoid using the DESIRED_PERF HWP hint
     when the Dynamic Efficiency Control (DEC) is enabled in the
     processor to avoid inconsistent behavior (Rafael Wysocki)"

* tag 'pm-7.3-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  powercap: intel_rapl: Fix kernel panic during PMU unbind
  PM: sleep: Unblock runtime PM when device prepare fails
  powercap: intel_rapl: Sign-extend the PMU delta on counter wraparound
  cpufreq: intel_pstate: Avoid using DESIRED_PERF when DEC is enabled
  cpufreq: intel_pstate: Consolidate HWP P-states initialization
  cpufreq: schedutil: Fix rate limit overflow
</pre>
</div>
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Fix kernel panic during PMU unbind</title>
<updated>2026-08-24T10:29:58+00:00</updated>
<author>
<name>Sumeet Pawnikar</name>
<email>sumeet4linux@gmail.com</email>
</author>
<published>2026-08-22T09:46:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=916b61abba586d950a4d8264e2841cc5ccfa4df1'/>
<id>916b61abba586d950a4d8264e2841cc5ccfa4df1</id>
<content type='text'>
rapl_package_add_pmu() fails internally at perf_pmu_register(),
and rapl_pmu_update() leaves the global rapl_pmu.pmu structure
zero-initialized via memset and returns an error. But any
previously probed packages retain has_pmu = true.

When the driver is subsequently unbound or removed,
rapl_package_remove_pmu_locked() sees has_pmu == true and
unconditionally calls perf_pmu_unregister(&amp;rapl_pmu.pmu) on the
zeroed-out structure. This attempts a list_del_rcu() on a NULL
list head, immediately causing a kernel panic.

Fix this by checking if the PMU is actually registered before
attempting to unregister it.

Signed-off-by: Sumeet Pawnikar &lt;sumeet4linux@gmail.com&gt;
Reviewed-by: Abel Vesa &lt;abel.vesa@oss.qualcomm.com&gt;
[ rjw: Added empty line after the new conditional ]
Link: https://patch.msgid.link/20260822094657.12489-1-sumeet4linux@gmail.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
rapl_package_add_pmu() fails internally at perf_pmu_register(),
and rapl_pmu_update() leaves the global rapl_pmu.pmu structure
zero-initialized via memset and returns an error. But any
previously probed packages retain has_pmu = true.

When the driver is subsequently unbound or removed,
rapl_package_remove_pmu_locked() sees has_pmu == true and
unconditionally calls perf_pmu_unregister(&amp;rapl_pmu.pmu) on the
zeroed-out structure. This attempts a list_del_rcu() on a NULL
list head, immediately causing a kernel panic.

Fix this by checking if the PMU is actually registered before
attempting to unregister it.

Signed-off-by: Sumeet Pawnikar &lt;sumeet4linux@gmail.com&gt;
Reviewed-by: Abel Vesa &lt;abel.vesa@oss.qualcomm.com&gt;
[ rjw: Added empty line after the new conditional ]
Link: https://patch.msgid.link/20260822094657.12489-1-sumeet4linux@gmail.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Sign-extend the PMU delta on counter wraparound</title>
<updated>2026-08-20T21:11:52+00:00</updated>
<author>
<name>Li, Yifan</name>
<email>yifan2.li@intel.com</email>
</author>
<published>2026-08-14T03:10:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a8b842366f8ff469fe0fc700ba53770ded847ea9'/>
<id>a8b842366f8ff469fe0fc700ba53770ded847ea9</id>
<content type='text'>
The RAPL PMU misreports energy when the hardware energy counter
overflows and wraps back to zero.  perf event counts are defined to
increase monotonically, but a single wraparound makes the PMU event
count jump backwards by nearly the full counter range, and consumers
that take the difference of two reads in unsigned arithmetic then
underflow and report an absurd value.

On a Panther Lake system (energy unit 61.035 uJ, counter range
262144 J) the package counter wraps every ~2.9 hours at 25 W, and
turbostat prints one bogus sample per wraparound, per domain:

  PkgTmp  PkgWatt         CorWatt GFXWatt RAMWatt SysWatt
  44      24.97           16.30   3.90    1.87    2145386370.35
  43      2145240612.10   16.13   4.02    1.91    40.46

The RAPL energy counters are 32-bit wide on every register interface:
MSR, MMIO and TPMI all describe ENERGY_COUNTER with a GENMASK(31, 0)
mask.  rapl_read_data_raw() applies that mask, so event_read_counter()
returns the counter zero-extended in a u64.

rapl_event_update() then computes

	delta = new_raw_count - prev_raw_count;

without reducing the result modulo 2^32.  While the counter does not
wrap this is correct, but once the hardware counter wraps,
new_raw_count &lt; prev_raw_count and delta becomes (true_delta - 2^32),
a large negative value.  Declaring delta as s64 only makes that value
representable; it does not correct it.  That bogus delta is scaled and
added to event-&gt;count, which is where the backwards jump comes from.

Fix it the way arch/x86/events/rapl.c has done since the RAPL PMU was
first introduced: shift both values up so that the 64-bit subtraction
reduces modulo 2^32, then shift the difference back down with an
arithmetic shift to sign-extend it.

This is correct as long as at most one wraparound happens between two
updates, which the existing overflow hrtimer already guarantees: its
period is half of the counter range at the 200 W reference used in
rapl_package_add_pmu_locked().

The problem has been present since the powercap RAPL PMU was added, but
only affected TPMI RAPL until commit 748d6ba43afd ("powercap:
intel_rapl: Enable MSR-based RAPL PMU support") routed MSR RAPL through
the same PMU, which exposed it on client platforms such as Panther Lake.

Fixes: 575024a8aa7c ("powercap: intel_rapl: Introduce APIs for PMU support")
Reported-by: Jyoti, Anand B &lt;anand.b.jyoti@intel.com&gt;
Signed-off-by: Li, Yifan &lt;yifan2.li@intel.com&gt;
Signed-off-by: Gao Jianfeng &lt;jianfeng.gao@intel.com&gt;
Tested-by: Jyoti, Anand B &lt;anand.b.jyoti@intel.com&gt;
Acked-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Reviewed-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
Link: https://patch.msgid.link/20260814031008.750911-1-yifan2.li@intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The RAPL PMU misreports energy when the hardware energy counter
overflows and wraps back to zero.  perf event counts are defined to
increase monotonically, but a single wraparound makes the PMU event
count jump backwards by nearly the full counter range, and consumers
that take the difference of two reads in unsigned arithmetic then
underflow and report an absurd value.

On a Panther Lake system (energy unit 61.035 uJ, counter range
262144 J) the package counter wraps every ~2.9 hours at 25 W, and
turbostat prints one bogus sample per wraparound, per domain:

  PkgTmp  PkgWatt         CorWatt GFXWatt RAMWatt SysWatt
  44      24.97           16.30   3.90    1.87    2145386370.35
  43      2145240612.10   16.13   4.02    1.91    40.46

The RAPL energy counters are 32-bit wide on every register interface:
MSR, MMIO and TPMI all describe ENERGY_COUNTER with a GENMASK(31, 0)
mask.  rapl_read_data_raw() applies that mask, so event_read_counter()
returns the counter zero-extended in a u64.

rapl_event_update() then computes

	delta = new_raw_count - prev_raw_count;

without reducing the result modulo 2^32.  While the counter does not
wrap this is correct, but once the hardware counter wraps,
new_raw_count &lt; prev_raw_count and delta becomes (true_delta - 2^32),
a large negative value.  Declaring delta as s64 only makes that value
representable; it does not correct it.  That bogus delta is scaled and
added to event-&gt;count, which is where the backwards jump comes from.

Fix it the way arch/x86/events/rapl.c has done since the RAPL PMU was
first introduced: shift both values up so that the 64-bit subtraction
reduces modulo 2^32, then shift the difference back down with an
arithmetic shift to sign-extend it.

This is correct as long as at most one wraparound happens between two
updates, which the existing overflow hrtimer already guarantees: its
period is half of the counter range at the 200 W reference used in
rapl_package_add_pmu_locked().

The problem has been present since the powercap RAPL PMU was added, but
only affected TPMI RAPL until commit 748d6ba43afd ("powercap:
intel_rapl: Enable MSR-based RAPL PMU support") routed MSR RAPL through
the same PMU, which exposed it on client platforms such as Panther Lake.

Fixes: 575024a8aa7c ("powercap: intel_rapl: Introduce APIs for PMU support")
Reported-by: Jyoti, Anand B &lt;anand.b.jyoti@intel.com&gt;
Signed-off-by: Li, Yifan &lt;yifan2.li@intel.com&gt;
Signed-off-by: Gao Jianfeng &lt;jianfeng.gao@intel.com&gt;
Tested-by: Jyoti, Anand B &lt;anand.b.jyoti@intel.com&gt;
Acked-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Reviewed-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
Link: https://patch.msgid.link/20260814031008.750911-1-yifan2.li@intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'x86-msr-2026-08-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2026-08-18T21:02:15+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-08-18T21:02:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8dcef8882aad8f1b8668d1c39968cde99312aa3c'/>
<id>8dcef8882aad8f1b8668d1c39968cde99312aa3c</id>
<content type='text'>
Pull x86 MSR updates from Ingo Molnar:

 - Streamline the x86 MSR handling APIs along the 64-bit variants,
   simplifying the interfaces.

   Removal of the old APIs is planned for the next cycle, to reduce
   churn &amp; integration pain (Juergen Gross)

* tag 'x86-msr-2026-08-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (21 commits)
  x86/mce: Work around build warning after MSR-interface switch
  cpufreq: Stop using 32-bit MSR interfaces
  x86/featctl: Stop using 32-bit MSR interfaces
  KVM/x86: Stop using 32-bit MSR interfaces
  x86/mtrr: Stop using 32-bit MSR interfaces
  acpi: Stop using 32-bit MSR interfaces
  powercap: Stop using 32-bit MSR interfaces
  thermal/intel: Stop using 32-bit MSR interfaces
  x86/olpc: Stop using 32-bit MSR interfaces
  x86/hyperv: Stop using 32-bit MSR interfaces
  hwmon: Stop using 32-bit MSR interfaces
  EDAC: Stop using 32-bit MSR interfaces
  x86/cpu: Stop using 32-bit MSR interfaces
  x86/apic: Stop using 32-bit MSR interfaces
  x86/resctrl: Stop using 32-bit MSR interfaces
  x86/tsc: Stop using 32-bit MSR interfaces
  x86/amd: Stop using 32-bit MSR interfaces
  x86/pci: Stop using 32-bit MSR interfaces
  x86/hygon: Stop using 32-bit MSR interfaces
  x86/mce: Stop using 32-bit MSR interfaces
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull x86 MSR updates from Ingo Molnar:

 - Streamline the x86 MSR handling APIs along the 64-bit variants,
   simplifying the interfaces.

   Removal of the old APIs is planned for the next cycle, to reduce
   churn &amp; integration pain (Juergen Gross)

* tag 'x86-msr-2026-08-17' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (21 commits)
  x86/mce: Work around build warning after MSR-interface switch
  cpufreq: Stop using 32-bit MSR interfaces
  x86/featctl: Stop using 32-bit MSR interfaces
  KVM/x86: Stop using 32-bit MSR interfaces
  x86/mtrr: Stop using 32-bit MSR interfaces
  acpi: Stop using 32-bit MSR interfaces
  powercap: Stop using 32-bit MSR interfaces
  thermal/intel: Stop using 32-bit MSR interfaces
  x86/olpc: Stop using 32-bit MSR interfaces
  x86/hyperv: Stop using 32-bit MSR interfaces
  hwmon: Stop using 32-bit MSR interfaces
  EDAC: Stop using 32-bit MSR interfaces
  x86/cpu: Stop using 32-bit MSR interfaces
  x86/apic: Stop using 32-bit MSR interfaces
  x86/resctrl: Stop using 32-bit MSR interfaces
  x86/tsc: Stop using 32-bit MSR interfaces
  x86/amd: Stop using 32-bit MSR interfaces
  x86/pci: Stop using 32-bit MSR interfaces
  x86/hygon: Stop using 32-bit MSR interfaces
  x86/mce: Stop using 32-bit MSR interfaces
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>powercap: intel_rapl_tpmi: Handle PMU registration failure during probe</title>
<updated>2026-07-27T14:29:16+00:00</updated>
<author>
<name>Sumeet Pawnikar</name>
<email>sumeet4linux@gmail.com</email>
</author>
<published>2026-07-23T17:23:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9229916d59918ec9d3639e7263e1e97be638e361'/>
<id>9229916d59918ec9d3639e7263e1e97be638e361</id>
<content type='text'>
intel_rapl_tpmi_probe() invokes rapl_package_add_pmu() but ignores its
return value, so a PMU registration failure would leave the driver
reporting probe success despite the PMU being absent, with no log
trace.

Since PMU registration is an optional auxiliary feature for perf energy
counters, its failure should not break the primary powercap functionality.
Check the return value and log a warning to ensure graceful degradation.

Fixes: 963a9ad3c589 ("powercap: intel_rapl_tpmi: Enable PMU support")
Signed-off-by: Sumeet Pawnikar &lt;sumeet4linux@gmail.com&gt;
[ rjw: Changed the log level of the new message to "info" ]
Link: https://patch.msgid.link/20260723172321.5960-1-sumeet4linux@gmail.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
intel_rapl_tpmi_probe() invokes rapl_package_add_pmu() but ignores its
return value, so a PMU registration failure would leave the driver
reporting probe success despite the PMU being absent, with no log
trace.

Since PMU registration is an optional auxiliary feature for perf energy
counters, its failure should not break the primary powercap functionality.
Check the return value and log a warning to ensure graceful degradation.

Fixes: 963a9ad3c589 ("powercap: intel_rapl_tpmi: Enable PMU support")
Signed-off-by: Sumeet Pawnikar &lt;sumeet4linux@gmail.com&gt;
[ rjw: Changed the log level of the new message to "info" ]
Link: https://patch.msgid.link/20260723172321.5960-1-sumeet4linux@gmail.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powercap: Stop using 32-bit MSR interfaces</title>
<updated>2026-07-17T08:26:50+00:00</updated>
<author>
<name>Juergen Gross</name>
<email>jgross@suse.com</email>
</author>
<published>2026-06-29T06:04:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f0a1575221d1bb45d8548a3fbc49a1a3bfaea24d'/>
<id>f0a1575221d1bb45d8548a3fbc49a1a3bfaea24d</id>
<content type='text'>
The 32-bit MSR interfaces rdmsr_safe() and wrmsr_safe() are planned to
be removed. Use the related 64-bit variants instead.

Drop a pointless initializer while at it.

Signed-off-by: Juergen Gross &lt;jgross@suse.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Acked-by: Rafael J. Wysocki (Intel) &lt;rafael@kernel.org&gt;
Link: https://patch.msgid.link/20260629060526.3638272-3-jgross@suse.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The 32-bit MSR interfaces rdmsr_safe() and wrmsr_safe() are planned to
be removed. Use the related 64-bit variants instead.

Drop a pointless initializer while at it.

Signed-off-by: Juergen Gross &lt;jgross@suse.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Acked-by: Rafael J. Wysocki (Intel) &lt;rafael@kernel.org&gt;
Link: https://patch.msgid.link/20260629060526.3638272-3-jgross@suse.com
</pre>
</div>
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Use sysfs_emit() in cpumask_show()</title>
<updated>2026-06-01T17:55:32+00:00</updated>
<author>
<name>Yury Norov</name>
<email>ynorov@nvidia.com</email>
</author>
<published>2026-05-28T18:36:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=497823b493145b650ccad56dd7cf5f8237136ae2'/>
<id>497823b493145b650ccad56dd7cf5f8237136ae2</id>
<content type='text'>
cpumask_show() is a sysfs show callback, so use sysfs_emit() and
cpumask_pr_args() to emit the mask in it.

This prepares for removing cpumap_print_to_pagebuf().

Signed-off-by: Yury Norov &lt;ynorov@nvidia.com&gt;
[ rjw: Subject and changelog tweaks ]
Link: https://patch.msgid.link/20260528183625.870813-15-ynorov@nvidia.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
cpumask_show() is a sysfs show callback, so use sysfs_emit() and
cpumask_pr_args() to emit the mask in it.

This prepares for removing cpumap_print_to_pagebuf().

Signed-off-by: Yury Norov &lt;ynorov@nvidia.com&gt;
[ rjw: Subject and changelog tweaks ]
Link: https://patch.msgid.link/20260528183625.870813-15-ynorov@nvidia.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Fix memory leak in rapl_add_package_cpuslocked()</title>
<updated>2026-05-26T13:00:42+00:00</updated>
<author>
<name>Sumeet Pawnikar</name>
<email>sumeet4linux@gmail.com</email>
</author>
<published>2026-05-15T18:26:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=bfc7d93bc5e12288e5dc6bb54260f68cdf5a5c47'/>
<id>bfc7d93bc5e12288e5dc6bb54260f68cdf5a5c47</id>
<content type='text'>
When topology_physical_package_id()/topology_logical_die_id() returns
a negative value, rapl_add_package_cpuslocked() returns ERR_PTR(-EINVAL)
directly without freeing the rapl_package structure that was just
allocated by kzalloc_obj(), leaking memory on every failed package
addition.

Use the existing err_free_package label so that the allocation is
released on the error path.

Signed-off-by: Sumeet Pawnikar &lt;sumeet4linux@gmail.com&gt;
Link: https://patch.msgid.link/20260515182616.227707-1-sumeet4linux@gmail.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When topology_physical_package_id()/topology_logical_die_id() returns
a negative value, rapl_add_package_cpuslocked() returns ERR_PTR(-EINVAL)
directly without freeing the rapl_package structure that was just
allocated by kzalloc_obj(), leaking memory on every failed package
addition.

Use the existing err_free_package label so that the allocation is
released on the error path.

Signed-off-by: Sumeet Pawnikar &lt;sumeet4linux@gmail.com&gt;
Link: https://patch.msgid.link/20260515182616.227707-1-sumeet4linux@gmail.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Consolidate PL4 and PMU support flags into rapl_defaults</title>
<updated>2026-04-01T14:03:05+00:00</updated>
<author>
<name>Kuppuswamy Sathyanarayanan</name>
<email>sathyanarayanan.kuppuswamy@linux.intel.com</email>
</author>
<published>2026-03-31T21:19:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c3bb8d4f5d802ec1a16f018e82030bccb7a053a4'/>
<id>c3bb8d4f5d802ec1a16f018e82030bccb7a053a4</id>
<content type='text'>
Currently, PL4 and MSR-based RAPL PMU support are detected using
separate CPU ID tables (pl4_support_ids and pmu_support_ids) in the
MSR driver probe path. This creates a maintenance burden since adding
a new CPU requires updates in two places: the rapl_ids table and one
or both of these capability tables.

Consolidate PL4 and PMU capability information directly into
struct rapl_defaults by adding msr_pl4_support and msr_pmu_support
flags. This allows per-CPU capability to be expressed in a single
place alongside other per-CPU defaults, eliminating the duplicate
CPU ID tables entirely.

No functional changes are intended.

Co-developed-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Acked-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
Link: https://patch.msgid.link/20260331211950.3329932-8-sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently, PL4 and MSR-based RAPL PMU support are detected using
separate CPU ID tables (pl4_support_ids and pmu_support_ids) in the
MSR driver probe path. This creates a maintenance burden since adding
a new CPU requires updates in two places: the rapl_ids table and one
or both of these capability tables.

Consolidate PL4 and PMU capability information directly into
struct rapl_defaults by adding msr_pl4_support and msr_pmu_support
flags. This allows per-CPU capability to be expressed in a single
place alongside other per-CPU defaults, eliminating the duplicate
CPU ID tables entirely.

No functional changes are intended.

Co-developed-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Acked-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
Link: https://patch.msgid.link/20260331211950.3329932-8-sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>powercap: intel_rapl: Move MSR primitives to MSR driver</title>
<updated>2026-04-01T14:03:05+00:00</updated>
<author>
<name>Kuppuswamy Sathyanarayanan</name>
<email>sathyanarayanan.kuppuswamy@linux.intel.com</email>
</author>
<published>2026-03-31T21:19:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b0ee5110ef1c684eab41bd03fbe8bf2a8f964054'/>
<id>b0ee5110ef1c684eab41bd03fbe8bf2a8f964054</id>
<content type='text'>
MSR-specific RAPL primitives differ from those used by TPMI and MMIO
interfaces. Keeping them in the common driver requires
interface-specific handling logic and makes the common layer
unnecessarily complex.

Move the MSR primitive definitions and associated bitmasks into the
MSR interface driver. This change includes:

 1. Move MSR-specific bitmask definitions to RAPL MSR driver.
 2. Add MSR-local struct rapl_primitive_info instance and assign it to
    priv-&gt;rpi during MSR probe.
 3. Remove the primitive assignment logic from rapl_config() in the
    common driver.

No functional changes are intended.

Co-developed-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
Link: https://patch.msgid.link/20260331211950.3329932-7-sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
MSR-specific RAPL primitives differ from those used by TPMI and MMIO
interfaces. Keeping them in the common driver requires
interface-specific handling logic and makes the common layer
unnecessarily complex.

Move the MSR primitive definitions and associated bitmasks into the
MSR interface driver. This change includes:

 1. Move MSR-specific bitmask definitions to RAPL MSR driver.
 2. Add MSR-local struct rapl_primitive_info instance and assign it to
    priv-&gt;rpi during MSR probe.
 3. Remove the primitive assignment logic from rapl_config() in the
    common driver.

No functional changes are intended.

Co-developed-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
Signed-off-by: Kuppuswamy Sathyanarayanan &lt;sathyanarayanan.kuppuswamy@linux.intel.com&gt;
Link: https://patch.msgid.link/20260331211950.3329932-7-sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
