linux-stable.git/drivers/platform/x86/intel, branch v7.0

platform/x86/intel-uncore-freq: Increase minor version

2026-03-27T11:15:52+00:00

The current implementation doesn't require any changes to support minor
version 3, hence increment it to avoid "Unsupported minor version:3"
message.

Signed-off-by: Srinivas Pandruvada 
Link: https://patch.msgid.link/20260325193158.3417382-2-srinivas.pandruvada@linux.intel.com
Reviewed-by: Ilpo Järvinen 
Signed-off-by: Ilpo Järvinen

platform/x86: ISST: Increase minor version

2026-03-27T11:15:50+00:00

The current implementation doesn't require any changes to support minor
version 3, hence increment it to avoid "Unsupported minor version:3"
message.

Signed-off-by: Srinivas Pandruvada 
Link: https://patch.msgid.link/20260325193158.3417382-1-srinivas.pandruvada@linux.intel.com
Reviewed-by: Ilpo Järvinen 
Signed-off-by: Ilpo Järvinen

platform/x86/intel-uncore-freq: Handle autonomous UFS status bit

2026-03-27T11:14:44+00:00

When the AUTONOMOUS_UFS_DISABLED bit is set in the header, the ELC
(Efficiency Latency Control) feature is non-functional. Hence, return
error for read or write to ELC attributes.

Fixes: bb516dc79c4a ("platform/x86/intel-uncore-freq: Add support for efficiency latency control")
Signed-off-by: Srinivas Pandruvada 
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260325192909.3417322-1-srinivas.pandruvada@linux.intel.com
Reviewed-by: Ilpo Järvinen 
Signed-off-by: Ilpo Järvinen

platform/x86: ISST: Reset core count to 0

2026-03-27T11:00:32+00:00

Based on feature revision, number of buckets can be less than the
TRL_MAX_BUCKETS. In that case core counts in the remaining buckets
can be set to some invalid values.

Hence reset core count to 0 for all buckets before assigning correct
values.

Fixes: 885d1c2a30b7 ("platform/x86: ISST: Support SST-TF revision 2")
Signed-off-by: Srinivas Pandruvada 
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260325192638.3417281-1-srinivas.pandruvada@linux.intel.com
Reviewed-by: Ilpo Järvinen 
Signed-off-by: Ilpo Järvinen

platform/x86: ISST: Correct locked bit width

2026-03-24T10:31:10+00:00

SST-PP locked bit width is set to three bits. It should be only one bit.
Use SST_PP_LOCK_WIDTH define instead of SST_PP_LEVEL_WIDTH.

Fixes: ea009e4769fa ("platform/x86: ISST: Add SST-PP support via TPMI")
Signed-off-by: Srinivas Pandruvada 
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260323153635.3263828-1-srinivas.pandruvada@linux.intel.com
Reviewed-by: Ilpo Järvinen 
Signed-off-by: Ilpo Järvinen

platform/x86: intel-hid: disable wakeup_mode during hibernation

2026-03-23T12:49:06+00:00

Add a freeze handler which clears wakeup_mode. This fixes aborted hibernation on
Dell Precision 3880.

  Wakeup event detected during hibernation, rolling back

This system sends power button events during hibernation, even when triggered by
software.

Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218634
Fixes: 0c4cae1bc00d ("PM: hibernate: Avoid missing wakeup events during hibernation")
Signed-off-by: David McFarland 
Link: https://patch.msgid.link/20260205231629.1336348-1-corngood@gmail.com
Reviewed-by: Ilpo Järvinen 
Signed-off-by: Ilpo Järvinen

platform/x86: ISST: Check HWP support before MSR access

2026-03-23T12:48:57+00:00

On some systems, HWP can be explicitly disabled in the BIOS settings
When HWP is disabled by firmware, the HWP CPUID bit is not set, and
attempting to read MSR_PM_ENABLE will result in a General Protection
(GP) fault.

  unchecked MSR access error: RDMSR from 0x770 at rIP: 0xffffffffc33db92e (disable_dynamic_sst_features+0xe/0x50 [isst_tpmi_core])
  Call Trace:
   
   ? ex_handler_msr+0xf6/0x150
   ? fixup_exception+0x1ad/0x340
   ? gp_try_fixup_and_notify+0x1e/0xb0
   ? exc_general_protection+0xc9/0x390
   ? terminate_walk+0x64/0x100
   ? asm_exc_general_protection+0x22/0x30
   ? disable_dynamic_sst_features+0xe/0x50 [isst_tpmi_core]
   isst_if_def_ioctl+0xece/0x1050 [isst_tpmi_core]
   ? ioctl_has_perm.constprop.42+0xe0/0x130
   isst_if_def_ioctl+0x10d/0x1a0 [isst_if_common]
   __se_sys_ioctl+0x86/0xc0
   do_syscall_64+0x8a/0x100
   entry_SYSCALL_64_after_hwframe+0x78/0xe2
  RIP: 0033:0x7f36eaef54a7

Add a check for X86_FEATURE_HWP before accessing the MSR. If HWP is
not available, return true safely.

Fixes: 12a7d2cb811d ("platform/x86: ISST: Add SST-CP support via TPMI")
Signed-off-by: Li RongQing 
Acked-by: Srinivas Pandruvada 
Link: https://patch.msgid.link/20260303074635.2218-1-lirongqing@baidu.com
Reviewed-by: Ilpo Järvinen 
Signed-off-by: Ilpo Järvinen

platform/x86: intel-hid: Enable 5-button array on ThinkPad X1 Fold 16 Gen 1

2026-02-23T15:50:55+00:00

The Lenovo ThinkPad X1 Fold 16 Gen 1 has physical volume up/down
buttons that are handled through the intel-hid 5-button array
interface. The firmware does not advertise 5-button array support via
HEBC, so the driver relies on a DMI allowlist to enable it.

Add the ThinkPad X1 Fold 16 Gen 1 to the button_array_table so the
volume buttons work out of the box.

Signed-off-by: Leif Skunberg 
Reviewed-by: Hans de Goede 
Link: https://patch.msgid.link/20260210085625.34380-1-diamondback@cohunt.app
Reviewed-by: Ilpo Järvinen 
Signed-off-by: Ilpo Järvinen

platform/x86: int3472: Handle GPIO type 0x10 (DOVDD)

2026-02-23T15:49:36+00:00

The Lenovo ThinkPad X1 Fold 16 Gen 1 has an OV5675 sensor (ACPI HID
OVTI5675) behind an INT3472 discrete PMIC controller. The INT3472
_DSM returns GPIO type 0x10 for one of the pins, which controls the
DOVDD (digital I/O power) regulator enable.

Type 0x10 is not currently handled by the driver, causing the GPIO to
be ignored with a warning. Add INT3472_GPIO_TYPE_DOVDD (0x10) and
handle it as a regulator with con_id "dovdd" to match the supply name
used by sensor drivers (e.g. ov5675).

Also increase GPIO_SUPPLY_NAME_LENGTH from 5 to 6 to accommodate
the "dovdd" name (5 chars + null terminator).

Signed-off-by: Leif Skunberg 
Reviewed-by: Hans de Goede 
Link: https://patch.msgid.link/20260210132129.17943-1-diamondback@cohunt.app
Reviewed-by: Ilpo Järvinen 
Signed-off-by: Ilpo Järvinen

platform/x86: intel-hid: Add Dell 16 Plus 2-in-1 to dmi_vgbs_allow_list

2026-02-23T14:31:03+00:00

The Dell 16 Plus 2-in-1 (model DB06250) requires the VGBS allow list
entry to correctly enable the tablet mode switch. Without this, the
chassis state is not reported, and the hinge rotation only emits
unknown scancodes.

Link: https://lore.kernel.org/platform-driver-x86/CAP3yi-BWm0LqkhfzTrGy5n-KQ=3+T8eRMoR+Z+7Ke2VJB43kTA@mail.gmail.com/
Signed-off-by: Peter Metz 
Reviewed-by: Hans de Goede 
Link: https://patch.msgid.link/20260213230310.299974-1-peter.metz@unarin.com
Reviewed-by: Ilpo Järvinen 
Signed-off-by: Ilpo Järvinen