linux-stable.git/drivers/pinctrl, branch v6.8.2

gpio: nomadik: fix offset bug in nmk_pmx_set()

2024-03-26T22:17:15+00:00

[ Upstream commit 53cf6b72e074864b94ade97dcb6f30b5ac1a82dc ]

Previously, the statement looked like:

    slpm[x] &= ~BIT(g->grp.pins[i]);

Where:
 - slpm is a unsigned int pointer;
 - g->grp.pins[i] is a pin number. It can grow to more than 32.

The expected shift amount is a pin bank offset.

This bug does not occur on every group or pin: the altsetting must be
NMK_GPIO_ALT_C and the pin must be 32 or above. It might have occured.
For example, in pinctrl-nomadik-db8500.c, pin group i2c3_c_2 has the
right altsetting and pins 229 and 230.

Fixes: dbfe8ca259e1 ("pinctrl/nomadik: implement pin multiplexing")
Reviewed-by: Linus Walleij 
Signed-off-by: Théo Lebrun 
Link: https://lore.kernel.org/r/20240228-mbly-gpio-v2-5-3ba757474006@bootlin.com
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: renesas: Allow the compiler to optimize away sh_pfc_pm

2024-03-26T22:17:09+00:00

[ Upstream commit a6f06b909fee72c679c565adfa7f080f9595e336 ]

The conversion to DEFINE_NOIRQ_DEV_PM_OPS() lost the ability of the
compiler to optimize away the struct dev_pm_ops object when it is not
needed.

Fix this by replacing the use of pm_sleep_ptr() by a custom wrapper.

Fixes: 727eb02eb753375e ("pinctrl: renesas: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper")
Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Andy Shevchenko 
Link: https://lore.kernel.org/r/6238a78e32fa21f0c795406b6cba7bce7af92577.1708513940.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin

pinctrl: mediatek: Drop bogus slew rate register range for MT8192

2024-03-26T22:17:03+00:00

[ Upstream commit e15ab05a6b3ed42f2f43f8bd1a1abdbde64afecd ]

The MT8192 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.

Drop the bogus setting.

Fixes: d32f38f2a8fc ("pinctrl: mediatek: Add pinctrl driver for mt8192")
Signed-off-by: Chen-Yu Tsai 
Reviewed-by: AngeloGioacchino Del Regno 
Link: https://lore.kernel.org/r/20240131071910.3950450-2-wenst@chromium.org
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: mediatek: Drop bogus slew rate register range for MT8186

2024-03-26T22:17:03+00:00

[ Upstream commit 3a29c87548809405bcbc66acc69cbe6f15184d94 ]

The MT8186 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.

Drop the bogus setting.

Fixes: 8b483bda1e46 ("pinctrl: add pinctrl driver on mt8186")
Signed-off-by: Chen-Yu Tsai 
Reviewed-by: AngeloGioacchino Del Regno 
Link: https://lore.kernel.org/r/20240131071910.3950450-1-wenst@chromium.org
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: renesas: r8a779g0: Add missing SCIF_CLK2 pin group/function

2024-03-26T22:17:02+00:00

[ Upstream commit 68540257cdf1d07ff8a649aa94c21c5804bbb9b0 ]

R-Car V4H actually has two SCIF_CLK pins.
The second pin provides the SCIF_CLK signal for HSCIF2 and SCIF4.

Fixes: 050442ae4c74f830 ("pinctrl: renesas: r8a779g0: Add pins, groups and functions")
Signed-off-by: Geert Uytterhoeven 
Link: https://lore.kernel.org/r/6352ec9b63fdd38c2c70d8d203e46f21fbfeccdc.1705589612.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin

pinctrl: renesas: rzg2l: Fix locking in rzg2l_dt_subnode_to_map()

2024-03-26T22:17:01+00:00

[ Upstream commit bd433c25ca81b2ac6dca7ea288a8474eea4fb8a0 ]

Commit d3aaa7203a17 ("pinctrl: renesas: rzg2l: Add pin configuration
support for pinmux groups") introduced the possibility to parse pin
configuration for pinmux groups. It did that by calling
rzg2l_map_add_config() at the end of rzg2l_dt_subnode_to_map() and
jumping to the remove_group label in case rzg2l_map_add_config() failed.
But if that happens, the mutex will already be unlocked, thus this it will
lead to double mutex unlock operation. To fix this move the
rzg2l_map_add_config() call just after all the name argument is ready and
before the mutex is locked. There is no harm in doing this, as this only
parses the data from device tree that will be further processed by
pinctrl core code.

Fixes: d3aaa7203a17 ("pinctrl: renesas: rzg2l: Add pin configuration support for pinmux groups")
Reported-by: Dan Carpenter 
Closes: https://lore.kernel.org/all/f8c3a3a0-7c48-4e40-8af0-ed4e9d9b049f@moroto.mountain
Signed-off-by: Claudiu Beznea 
Reviewed-by: Geert Uytterhoeven 
Link: https://lore.kernel.org/r/20240115153453.99226-1-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Sasha Levin

pinctrl: don't put the reference to GPIO device in pinctrl_pins_show()

2024-02-29T13:36:40+00:00

The call to gpiod_to_gpio_device() does not increase the reference count
of the GPIO device struct so it must not be decreased. Remove the buggy
__free() decorator.

Fixes: 524fc108b895 ("pinctrl: stop using gpiod_to_chip()")
Reported-by: David Arcari 
Signed-off-by: Bartosz Golaszewski 
Link: https://lore.kernel.org/r/20240223123214.288181-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij

pinctrl: stm32: fix PM support for stm32mp257

2024-02-13T08:42:22+00:00

The driver for stm32mp257 is missing the suspend callback in
struct dev_pm_ops.

Add the callback, using the common stm32_pinctrl_suspend()
function.

Signed-off-by: Antonio Borneo 
Fixes: 619f8ca4a73d ("pinctrl: stm32: add stm32mp257 pinctrl support")
Link: https://lore.kernel.org/r/20240207104604.174843-1-antonio.borneo@foss.st.com
Signed-off-by: Linus Walleij

pinctrl: amd: Add IRQF_ONESHOT to the interrupt request

2024-01-31T09:06:07+00:00

On some systems the interrupt is shared between GPIO controller
and ACPI SCI. When the interrupt is shared with the ACPI SCI the
flags need to be identical.

This should fix the GPIO controller failing to work after commit
7a36b901a6eb ("ACPI: OSL: Use a threaded interrupt handler for SCI").
```
[    0.417335] genirq: Flags mismatch irq 9. 00000088 (pinctrl_amd) vs. 00002080 (acpi)
[    0.420073] amd_gpio: probe of AMDI0030:00 failed with error -16
```

Cc: Rafael J. Wysocki 
Reported-by: Christian Heusel 
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218407
Fixes: 7a36b901a6eb ("ACPI: OSL: Use a threaded interrupt handler for SCI")
Link: https://lore.kernel.org/linux-acpi/CAJZ5v0iRqUXeuKmC_+dAJtDBLWQ3x15n4gRH48y7MEaLoXF+UA@mail.gmail.com/T/#mc5506014141b61e472b24e095889535a04458083
Signed-off-by: Mario Limonciello 
Acked-by: Rafael J. Wysocki 
Tested-by: Christian Heusel 
Link: https://lore.kernel.org/r/20240123180818.3994-1-mario.limonciello@amd.com
Signed-off-by: Linus Walleij

Merge tag 'pinctrl-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2024-01-17T23:55:33+00:00

Pull pin control updates from Linus Walleij:
"For this kernel cycle I managed an immutable branch for the PEF2256
WAN framer that has some pin control portions. It already landed in
your tree through the net pull request but here it is mentioned again.

The most interesting is perhaps the Samsung Exynos subdrivers for the
Tensor SoC used in Google Pixel 6 and the ExynosAuto subdriver for
automotive. Along with the earlier merged Tesla FSD subdriver it shows
some of the versatile uses of the Samsung Exynos silicon. It is also
used in the latest version of Axis Communications ARTPEC chips so it
is a very widely deployed SoC family.

We also have the Intel Meteor Lake SoC which I think is for laptops.
It's a pretty interesting chip with Xe graphics and integrated PCH.

Core changes:

- A new PINCTRL_GROUP_DESC() infrastructure macro is added and used
in different drivers, generic group description struct group_desc
is now used all over the place.

New drivers:

- New driver for the Texas Instruments TPS6494 Power Management IC.

- New driver for the Lantic PEF2256 framer pin multiplexer. This IC
has some pins that can be reconfigured in different ways. The
actual driver comes on an immutable branch with the net WAN parts,
the IC is some latest-and-greatest serial line funnel for e.g.
wireless access points.

- New subdriver for the Samsung Exynos Auto V920 pin controller, used
for automotive applications.

- New subdriver for the Samsung "GS101" SoC pin controller, this is
the Google "Tensor" SoC used in the Google Pixel 6.

- New subdriver for the Intel Meteor Point SoC pin controller.

- New subdriver for the Qualcomm SM8650 top level (TLMM) and LPASS
pin controllers.

- New subdriver for the Qualcomm X1E80100 top level (TLMM) pin
controller.

- New subdriver for the Qualcomm SM4450 top level (TLMM) pin
controller.

- The "single" pin controller now supports the Texas Instruments
J7200 SoC.

Improvements:

- Intel has created a new (Intel-)generic pin controller driver that
is now used by all contemporary Intel platforms.

- Intel is now also making use of some cleanup helpers.

- Enble 910 Ohm bias in the Intel Tangier driver.

- The Samsung driver now suppors irq_set_affinity() in it's IRQ chip
giving support for non wake up external gpio interrupts"

* tag 'pinctrl-v6.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (112 commits)
pinctrl: samsung: constify iomem pointers
pinctrl: cy8c95x0: Cache muxed registers
dt-bindings: pinctrl: xilinx: Rename *gpio to *gpio-grp
pinctrl: qcom: lpass-lpi: remove duplicated include
dt-bindings: pinctrl: qcom: drop common properties and allow wakeup-parent
dt-bindings: pinctrl: qcom: drop common properties
dt-bindings: pinctrl: qcom,ipq5018-tlmm: use common TLMM bindings
dt-bindings: pinctrl: qcom,x1e80100-tlmm: restrict number of interrupts
dt-bindings: pinctrl: qcom,sm8650-tlmm: restrict number of interrupts
dt-bindings: pinctrl: qcom,sm8550-tlmm: restrict number of interrupts
dt-bindings: pinctrl: qcom,sdx75-tlmm: restrict number of interrupts
dt-bindings: pinctrl: qcom,sa8775p-tlmm: restrict number of interrupts
dt-bindings: pinctrl: qcom,qdu1000-tlmm: restrict number of interrupts
dt-bindings: pinctrl: qcom: create common LPASS LPI schema
pinctrl: qcom: sm4450: dd SM4450 pinctrl driver
dt-bindings: pinctrl: qcom: Add SM4450 pinctrl
dt-bindings: pinctrl: qcom,pmic-mpp: clean up example
pinctrl: intel: Add Intel Meteor Point pin controller and GPIO support
pinctrl: renesas: rzg2l: Add input enable to the Ethernet pins
pinctrl: renesas: rzg2l: Add output enable support
...