linux-stable.git/drivers/pinctrl, branch v5.4.185

pinctrl: bcm2835: Fix a few error paths

2022-02-08T17:24:33+00:00

commit 5297c693d8c8e08fa742e3112cf70723f7a04da2 upstream.

After commit 266423e60ea1 ("pinctrl: bcm2835: Change init order for gpio
hogs") a few error paths would not unwind properly the registration of
gpio ranges. Correct that by assigning a single error label and goto it
whenever we encounter a fatal error.

Fixes: 266423e60ea1 ("pinctrl: bcm2835: Change init order for gpio hogs")
Signed-off-by: Florian Fainelli 
Link: https://lore.kernel.org/r/20220127215033.267227-1-f.fainelli@gmail.com
Signed-off-by: Linus Walleij 
Signed-off-by: Greg Kroah-Hartman

pinctrl: bcm2835: Change init order for gpio hogs

2022-01-29T09:25:10+00:00

commit 266423e60ea1b953fcc0cd97f3dad85857e434d1 upstream

...and gpio-ranges

pinctrl-bcm2835 is a combined pinctrl/gpio driver. Currently the gpio
side is registered first, but this breaks gpio hogs (which are
configured during gpiochip_add_data). Part of the hog initialisation
is a call to pinctrl_gpio_request, and since the pinctrl driver hasn't
yet been registered this results in an -EPROBE_DEFER from which it can
never recover.

Change the initialisation sequence to register the pinctrl driver
first.

This also solves a similar problem with the gpio-ranges property, which
is required in order for released pins to be returned to inputs.

Fixes: 73345a18d464b ("pinctrl: bcm2835: Pass irqchip when adding gpiochip")
Signed-off-by: Phil Elwell 
Reviewed-by: Florian Fainelli 
Link: https://lore.kernel.org/r/20211206092237.4105895-2-phil@raspberrypi.com
Signed-off-by: Linus Walleij 
Signed-off-by: Florian Fainelli 
Signed-off-by: Greg Kroah-Hartman

pinctrl: bcm2835: Add support for wake-up interrupts

2022-01-29T09:25:10+00:00

commit 920fecc1aa4591da27ef9dcb338fc5da86b404d7 upstream

Leverage the IRQCHIP_MASK_ON_SUSPEND flag in order to avoid having to
specifically treat the GPIO interrupts during suspend and resume, and
simply implement an irq_set_wake() callback that is responsible for
enabling the parent wake-up interrupt as a wake-up interrupt.

To avoid allocating unnecessary resources for other chips, the wake-up
interrupts are only initialized if we have a brcm,bcm7211-gpio
compatibility string.

Signed-off-by: Florian Fainelli 
Link: https://lore.kernel.org/r/20200531001101.24945-5-f.fainelli@gmail.com
Signed-off-by: Linus Walleij 
Signed-off-by: Florian Fainelli 
Signed-off-by: Greg Kroah-Hartman

pinctrl: bcm2835: Match BCM7211 compatible string

2022-01-29T09:25:10+00:00

commit 562c856f96d22ef1204b0a314bc52e85617199b4 upstream

The BCM7211 SoC uses the same pinconf_ops as the ones defined for the
BCM2711 SoC, match the compatible string and use the correct set of
options.

Signed-off-by: Florian Fainelli 
Link: https://lore.kernel.org/r/20200531001101.24945-4-f.fainelli@gmail.com
Signed-off-by: Linus Walleij 
Signed-off-by: Florian Fainelli 
Signed-off-by: Greg Kroah-Hartman

pinctrl: bcm2835: Add support for all GPIOs on BCM2711

2022-01-29T09:25:10+00:00

commit b1d84a3d0a26c5844a22bc09a42704b9371208bb upstream

The BCM2711 supports 58 GPIOs. So extend pinctrl and GPIOs accordingly.

Signed-off-by: Stefan Wahren 
Link: https://lore.kernel.org/r/1581166975-22949-4-git-send-email-stefan.wahren@i2se.com
Reviewed-by: Nicolas Saenz Julienne 
Signed-off-by: Linus Walleij 
Signed-off-by: Florian Fainelli 
Signed-off-by: Greg Kroah-Hartman

pinctrl: bcm2835: Refactor platform data

2022-01-29T09:25:10+00:00

commit 90bfaf028d61a6d523c685b63c2bcc94eebb8057 upstream

This prepares the platform data to be easier to extend for more GPIOs.
Except of this there is no functional change.

Signed-off-by: Stefan Wahren 
Link: https://lore.kernel.org/r/1581166975-22949-3-git-send-email-stefan.wahren@i2se.com
Reviewed-by: Nicolas Saenz Julienne 
Signed-off-by: Linus Walleij 
Signed-off-by: Florian Fainelli 
Signed-off-by: Greg Kroah-Hartman

pinctrl: bcm2835: Drop unused define

2022-01-29T09:25:10+00:00

commit be30d5de0a5a52c6ee2cc453a51301037ab94aa upstream

There is no usage for this define, so drop it.

Signed-off-by: Stefan Wahren 
Link: https://lore.kernel.org/r/1580148908-4863-2-git-send-email-stefan.wahren@i2se.com
Reviewed-by: Nicolas Saenz Julienne 
Signed-off-by: Linus Walleij 
Signed-off-by: Florian Fainelli 
Signed-off-by: Greg Kroah-Hartman

pinctrl: mediatek: fix global-out-of-bounds issue

2021-12-29T11:23:37+00:00

commit 2d5446da5acecf9c67db1c9d55ae2c3e5de01f8d upstream.

When eint virtual eint number is greater than gpio number,
it maybe produce 'desc[eint_n]' size globle-out-of-bounds issue.

Signed-off-by: Guodong Liu 
Signed-off-by: Zhiyong Tao 
Reviewed-by: Chen-Yu Tsai 
Link: https://lore.kernel.org/r/20211110071900.4490-2-zhiyong.tao@mediatek.com
Signed-off-by: Linus Walleij 
Signed-off-by: Greg Kroah-Hartman

pinctrl: stm32: consider the GPIO offset to expose all the GPIO lines

2021-12-29T11:23:36+00:00

commit b67210cc217f9ca1c576909454d846970c13dfd4 upstream.

Consider the GPIO controller offset (from "gpio-ranges") to compute the
maximum GPIO line number.
This fixes an issue where gpio-ranges uses a non-null offset.
  e.g.: gpio-ranges = <&pinctrl 6 86 10>
        In that case the last valid GPIO line is not 9 but 15 (6 + 10 - 1)

Cc: stable@vger.kernel.org
Fixes: 67e2996f72c7 ("pinctrl: stm32: fix the reported number of GPIO lines per bank")
Reported-by: Christoph Fritz 
Signed-off-by: Fabien Dessenne 
Link: https://lore.kernel.org/r/20211215095808.621716-1-fabien.dessenne@foss.st.com
Signed-off-by: Linus Walleij 
Signed-off-by: Greg Kroah-Hartman

pinctrl: armada-37xx: Correct PWM pins definitions

2021-12-01T08:23:31+00:00

commit baf8d6899b1e8906dc076ef26cc633e96a8bb0c3 upstream.

The PWM pins on North Bridge on Armada 37xx can be configured into PWM
or GPIO functions. When in PWM function, each pin can also be configured
to drive low on 0 and tri-state on 1 (LED mode).

The current definitions handle this by declaring two pin groups for each
pin:
- group "pwmN" with functions "pwm" and "gpio"
- group "ledN_od" ("od" for open drain) with functions "led" and "gpio"

This is semantically incorrect. The correct definition for each pin
should be one group with three functions: "pwm", "led" and "gpio".

Change the "pwmN" groups to support "led" function.

Remove "ledN_od" groups. This cannot break backwards compatibility with
older device trees: no device tree uses it since there is no PWM driver
for this SOC yet. Also "ledN_od" groups are not even documented.

Fixes: b835d6953009 ("pinctrl: armada-37xx: swap polarity on LED group")
Signed-off-by: Marek Behún 
Acked-by: Rob Herring 
Link: https://lore.kernel.org/r/20210719112938.27594-1-kabel@kernel.org
Signed-off-by: Linus Walleij 
Signed-off-by: Marek Behún 
Signed-off-by: Greg Kroah-Hartman