linux-stable.git/drivers/pinctrl, branch v3.18.22

pinctrl: mvebu: armada-38x: fix incorrect total number of GPIOs

2015-07-04T03:02:27+00:00

[ Upstream commit 27e7cd016558bf787b128fd882cdd90409ae4036 ]

The pinctrl_gpio_range[] array described a first bank of 32 GPIOs and
a second one of 27 GPIOs. However, since there is a total of 60 MPP
pins that can be muxed as GPIOs, the second bank really has 28 GPIOs.

Signed-off-by: Thomas Petazzoni 
Cc:  # v3.15+
Fixes: ca6d9a084b56f ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 380/385")
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-375: remove incorrect space in pin description

2015-07-04T03:02:27+00:00

[ Upstream commit d538990ee12b162f7ce6c0fcef3b643800102676 ]

There was an incorrect space in the definition of the function of one
pin in the Armada 375 pinctrl driver, which this commit fixes.

Signed-off-by: Thomas Petazzoni 
Cc:  # v3.15+
Fixes: ce3ed59dcddd ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 375")
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-xp: fix functions of MPP48

2015-07-04T03:02:27+00:00

[ Upstream commit ea78b9511a54d0de026e04b5da86b30515072f31 ]

There was a mistake in the definition of the functions for MPP48 on
Marvell Armada XP. The second function is dev(clkout), and not tclk.

Signed-off-by: Thomas Petazzoni 
Cc:  # v3.7+
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions

2015-07-04T03:02:27+00:00

[ Upstream commit 80b3d04feab5e69d51cb2375eb989a7165e43e3b ]

The latest version of the Armada XP datasheet no longer documents the
VDD cpu_pd functions, which might indicate they are not working and/or
not supported. This commit ensures the pinctrl driver matches the
datasheet.

Signed-off-by: Thomas Petazzoni 
Cc:  # v3.7+
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-xp: remove non-existing NAND pins

2015-07-04T03:02:26+00:00

[ Upstream commit bc99357f3690c11817756adfee0ece811a3db2e7 ]

After updating to a more recent version of the Armada XP datasheet, we
realized that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.

Signed-off-by: Thomas Petazzoni 
Cc:  # v3.7+
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-375: remove non-existing NAND re/we pins

2015-07-04T03:02:26+00:00

[ Upstream commit e5447d26092c72ef3346615ee558c9112ef8063f ]

After updating to a more recent version of the Armada 375, we realized
that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.

Signed-off-by: Thomas Petazzoni 
Cc:  # v3.15+
Fixes: ce3ed59dcddd ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 375")
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-370: fix spi0 pin description

2015-07-04T03:02:26+00:00

[ Upstream commit 438881dfddb9107ef0eb30b49368e91e092f0b3e ]

Due to a mistake, the CS0 and CS1 SPI0 functions were incorrectly
named "spi0-1" instead of just "spi0". This commit fixes that.

This DT binding change does not affect any of the in-tree users.

Signed-off-by: Thomas Petazzoni 
Cc:  # v3.7+
Fixes: 5f597bb2be57 ("pinctrl: mvebu: add pinctrl driver for Armada 370")
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-38x: fix PCIe functions

2015-07-04T03:02:26+00:00

[ Upstream commit 331642fbf24a1c16b2669ca0a6479b5fcd6dd5b2 ]

A new revision of the Marvell Armada 38x hardware datasheet unveiled
that the definition of some of the PCIe functions were not
correct. This commit fixes the pinctrl driver accordingly.

Some PCIe functions simply do not exist, some of the PCIe functions in
fact were corresponding to other functions, and some PCIe functions
have been added.

Note: the seemingly unrelated removal of spi(cs2) on MPP47 is related:
this function is in fact implemented on MPP43, instead of a PCIe
function.

Signed-off-by: Thomas Petazzoni 
Cc:  # v3.15+
Fixes: ca6d9a084b56f ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 380/385")
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: Don't just pretend to protect pinctrl_maps, do it for real

2015-06-09T17:43:37+00:00

[ Upstream commit c5272a28566b00cce79127ad382406e0a8650690 ]

Way back, when the world was a simpler place and there was no war, no
evil, and no kernel bugs, there was just a single pinctrl lock.  That
was how the world was when (57291ce pinctrl: core device tree mapping
table parsing support) was written.  In that case, there were
instances where the pinctrl mutex was already held when
pinctrl_register_map() was called, hence a "locked" parameter was
passed to the function to indicate that the mutex was already locked
(so we shouldn't lock it again).

A few years ago in (42fed7b pinctrl: move subsystem mutex to
pinctrl_dev struct), we switched to a separate pinctrl_maps_mutex.
...but (oops) we forgot to re-think about the whole "locked" parameter
for pinctrl_register_map().  Basically the "locked" parameter appears
to still refer to whether the bigger pinctrl_dev mutex is locked, but
we're using it to skip locks of our (now separate) pinctrl_maps_mutex.

That's kind of a bad thing(TM).  Probably nobody noticed because most
of the calls to pinctrl_register_map happen at boot time and we've got
synchronous device probing.  ...and even cases where we're
asynchronous don't end up actually hitting the race too often.  ...but
after banging my head against the wall for a bug that reproduced 1 out
of 1000 reboots and lots of looking through kgdb, I finally noticed
this.

Anyway, we can now safely remove the "locked" parameter and go back to
a war-free, evil-free, and kernel-bug-free world.

Fixes: 42fed7ba44e4 ("pinctrl: move subsystem mutex to pinctrl_dev struct")
Signed-off-by: Doug Anderson 
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: imx25: fix numbering for pins

2015-03-24T01:02:53+00:00

commit 34027ca2bbc6043fea8fc5c4a82670518b6be7df upstream.

The pin id for a given tuple listed in a fsl,pins property is calculated
by dividing the first entry (which is also a register offset) by 4.
As the first available register is at offset 0x8 and configures the pad
MX25_PAD_A10 the right id for this pin is 2. All other pins are off by
one, too.

This patch drops the definition MX25_PAD_RESERVE1 (together with its
only use) and decrements all following values by 1.

Fixes: b4a87c9b966f ("pinctrl: pinctrl-imx: add imx25 pinctrl driver")
Signed-off-by: Uwe Kleine-KÃ¶nig 
Tested-by: Fabio Estevam 
Signed-off-by: Linus Walleij 
Signed-off-by: Greg Kroah-Hartman