linux-stable.git/drivers/pinctrl, branch linux-5.18.y

pinctrl: Don't allow PINCTRL_AMD to be a module

2022-08-17T12:40:26+00:00

[ Upstream commit 41ef3c1a6bb0fd4a3f81170dd17de3adbff80783 ]

It was observed that by allowing pinctrl_amd to be loaded
later in the boot process that interrupts sent to the GPIO
controller early in the boot are not serviced.  The kernel treats
these as a spurious IRQ and disables the IRQ.

This problem was exacerbated because it happened on a system with
an encrypted partition so the kernel object was not accesssible for
an extended period of time while waiting for a passphrase.

To avoid this situation from occurring, stop allowing pinctrl-amd
from being built as a module and instead require it to be built-in
or disabled.

Reported-by: madcatx@atlas.cz
Suggested-by: jwrdegoede@fedoraproject.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216230
Signed-off-by: Mario Limonciello 
Acked-by: Hans de Goede 
Link: https://lore.kernel.org/r/20220713175950.964-1-mario.limonciello@amd.com
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: armada-37xx: make irq_lock a raw spinlock to avoid invalid wait context

2022-07-29T15:28:07+00:00

[ Upstream commit 984245b66cf32c494b1e4f95f5ed6ba16b8771eb ]

The irqchip->irq_set_type method is called by __irq_set_trigger() under
the desc->lock raw spinlock.

The armada-37xx implementation, armada_37xx_irq_set_type(), takes a
plain spinlock, the kind that becomes sleepable on RT.

Therefore, this is an invalid locking scheme for which we get a kernel
splat stating just that ("[ BUG: Invalid wait context ]"), because the
context in which the plain spinlock may sleep is atomic due to the raw
spinlock. We need to go raw spinlocks all the way.

Replace the driver's irq_lock with a raw spinlock, to disable preemption
even on RT.

Cc:  # 5.15+
Fixes: 2f227605394b ("pinctrl: armada-37xx: Add irqchip support")
Signed-off-by: Vladimir Oltean 
Link: https://lore.kernel.org/r/20220716233745.1704677-2-vladimir.oltean@nxp.com
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: armada-37xx: Reuse GPIO fwnode in armada_37xx_irqchip_register()

2022-07-29T15:28:06+00:00

[ Upstream commit 46d34d4d502ea1030f5de434e6677ec96ca131c3 ]

Since we have fwnode of the first found GPIO controller assigned to the
struct gpio_chip, we may reuse it in the armada_37xx_irqchip_register().

Signed-off-by: Andy Shevchenko 
Signed-off-by: Sasha Levin

pinctrl: ocelot: Fix pincfg

2022-07-29T15:28:03+00:00

[ Upstream commit ba9c4745fca70bf773b2d5c602dcd85d1a40b07a ]

The blamed commit changed to use regmaps instead of __iomem. But it
didn't update the register offsets to be at word offset, so it uses byte
offset.
Another issue with the same commit is that it has a limit of 32 registers
which is incorrect. The sparx5 has 64 while lan966x has 77.

Fixes: 076d9e71bcf8 ("pinctrl: ocelot: convert pinctrl to regmap")
Acked-by: Colin Foster 
Reviewed-by: Andy Shevchenko 
Signed-off-by: Horatiu Vultur 
Link: https://lore.kernel.org/r/20220713193750.4079621-3-horatiu.vultur@microchip.com
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: ocelot: Fix pincfg for lan966x

2022-07-29T15:28:03+00:00

[ Upstream commit dc62db7138aa9365480254dda4c3e1316b1b1bbc ]

The blamed commit introduce support for lan966x which use the same
pinconf_ops as sparx5. The problem is that pinconf_ops is specific to
sparx5. More precisely the offset of the bits in the pincfg register are
different and also lan966x doesn't have support for
PIN_CONFIG_INPUT_SCHMITT_ENABLE.

Fix this by making pinconf_ops more generic such that it can be also
used by lan966x. This is done by introducing 'ocelot_pincfg_data' which
contains the offset and what is supported for each SOC.

Fixes: 531d6ab36571 ("pinctrl: ocelot: Extend support for lan966x")
Signed-off-by: Horatiu Vultur 
Reviewed-by: Andy Shevchenko 
Link: https://lore.kernel.org/r/20220713193750.4079621-2-horatiu.vultur@microchip.com
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: sunplus: Add check for kcalloc

2022-07-29T15:27:59+00:00

[ Upstream commit acf50233fc979b566e3b87d329191dcd01e2a72c ]

As the potential failure of the kcalloc(),
it should be better to check it in order to
avoid the dereference of the NULL pointer.

Fixes: aa74c44be19c8 ("pinctrl: Add driver for Sunplus SP7021")
Reported-by: Hacash Robot 
Signed-off-by: William Dean 
Link: https://lore.kernel.org/r/20220710154822.2610801-1-williamsukatube@163.com
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: ralink: Check for null return of devm_kcalloc

2022-07-29T15:27:59+00:00

[ Upstream commit c3b821e8e406d5650e587b7ac624ac24e9b780a8 ]

Because of the possible failure of the allocation, data->domains might
be NULL pointer and will cause the dereference of the NULL pointer
later.
Therefore, it might be better to check it and directly return -ENOMEM
without releasing data manually if fails, because the comment of the
devm_kmalloc() says "Memory allocated with this function is
automatically freed on driver detach.".

Fixes: a86854d0c599b ("treewide: devm_kzalloc() -> devm_kcalloc()")
Reported-by: Hacash Robot 
Signed-off-by: William Dean 
Link: https://lore.kernel.org/r/20220710154922.2610876-1-williamsukatube@163.com
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: ralink: rename pinctrl-rt2880 to pinctrl-ralink

2022-07-29T15:27:59+00:00

[ Upstream commit 6b3dd85b0bdec1a8308fa5dcbafcd5d55b5f3608 ]

pinctrl-rt2880.c and pinmux.h make up the Ralink pinctrl driver. Rename
pinctrl-rt2880.c to pinctrl-ralink.c. Rename pinmux.h to pinctrl-ralink.h.
Fix references to it. Rename functions that include "rt2880" to "ralink".

Remove PINCTRL_RT2880 symbol and make the existing PINCTRL_RALINK symbol
compile pinctrl-ralink.c. Change the bool to "Ralink pinctrl driver".

Signed-off-by: Arınç ÜNAL 
Reviewed-by: Sergio Paracuellos 
Acked-by: Sergio Paracuellos 
Link: https://lore.kernel.org/r/20220414173916.5552-3-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: ralink: rename MT7628(an) functions to MT76X8

2022-07-29T15:27:58+00:00

[ Upstream commit 150438c86f55989632005b92c94f4aa2ec562ed6 ]

The functions that include "MT7628(an)" are for MT7628 and MT7688 SoCs.
Rename them to MT76X8 to refer to both of the SoCs.

Signed-off-by: Arınç ÜNAL 
Reviewed-by: Sergio Paracuellos 
Acked-by: Sergio Paracuellos 
Link: https://lore.kernel.org/r/20220414173916.5552-2-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: stm32: fix optional IRQ support to gpios

2022-07-29T15:27:55+00:00

commit a1d4ef1adf8bbd302067534ead671a94759687ed upstream.

To act as an interrupt controller, a gpio bank relies on the
"interrupt-parent" of the pin controller.
When this optional "interrupt-parent" misses, do not create any IRQ domain.

This fixes a "NULL pointer in stm32_gpio_domain_alloc()" kernel crash when
the interrupt-parent =  property is not declared in the Device Tree.

Fixes: 0eb9f683336d ("pinctrl: Add IRQ support to STM32 gpios")
Signed-off-by: Fabien Dessenne 
Link: https://lore.kernel.org/r/20220627142350.742973-1-fabien.dessenne@foss.st.com
Signed-off-by: Linus Walleij 
Signed-off-by: Greg Kroah-Hartman