linux-stable.git/drivers/pinctrl/tegra, branch v5.8 Linux kernel stable tree pinctrl: tegra: Use noirq suspend/resume callbacks 2020-06-16T08:19:53+00:00 Vidya Sagar vidyas@nvidia.com 2020-06-04T17:49:35+00:00 782b6b69847f34dda330530493ea62b7de3fd06a Use noirq suspend/resume callbacks as other drivers which implement noirq suspend/resume callbacks (Ex:- PCIe) depend on pinctrl driver to configure the signals used by their respective devices in the noirq phase. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20200604174935.26560-1-vidyas@nvidia.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Use noirq suspend/resume callbacks as other drivers which implement
noirq suspend/resume callbacks (Ex:- PCIe) depend on pinctrl driver to
configure the signals used by their respective devices in the noirq phase.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20200604174935.26560-1-vidyas@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: fix several typos 2020-04-28T11:26:49+00:00 Dejin Zheng zhengdejin5@gmail.com 2020-04-21T14:24:02+00:00 d71ffeb9f250a89fe477d9b3645f49680dc6c685 use codespell to fix lots of typos over frontends. Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> CC: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20200421142402.9524-1-zhengdejin5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
use codespell to fix lots of typos over frontends.

Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
CC: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20200421142402.9524-1-zhengdejin5@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: tegra: Add SFIO/GPIO programming on Tegra194 2020-03-27T10:46:06+00:00 Thierry Reding treding@nvidia.com 2020-03-19T12:27:37+00:00 368b62f2fd077d4c7db09461e8e24f07491a513d Prior to Tegra186, the selection of SFIO vs. GPIO modes was done as part of the GPIO controller's register programming. Starting with Tegra186, a pin is configured as GPIO or SFIO with a bit in a configuration register of the pin controller. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-10-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Prior to Tegra186, the selection of SFIO vs. GPIO modes was done as part
of the GPIO controller's register programming. Starting with Tegra186, a
pin is configured as GPIO or SFIO with a bit in a configuration register
of the pin controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-10-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: tegra: Renumber the GG.0 and GG.1 pins 2020-03-27T10:44:59+00:00 Thierry Reding treding@nvidia.com 2020-03-19T12:27:36+00:00 103afc8e9e8c4eff96052b311d19f7c32b653ebb There is no need to define these at a specific offset since they are the only pins defined for this SoC generation. Begin numbering them at 0. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-9-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
There is no need to define these at a specific offset since they are the
only pins defined for this SoC generation. Begin numbering them at 0.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-9-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: tegra: Do not add default pin range on Tegra194 2020-03-27T10:44:30+00:00 Thierry Reding treding@nvidia.com 2020-03-19T12:27:35+00:00 f67499f8ea7c15818d3375d718bd6cde4ae3d4f5 On Tegra194, almost all of the pin control programming happens in early boot firmware, so there is no use in having a pin range defined for all the pins. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-8-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
On Tegra194, almost all of the pin control programming happens in early
boot firmware, so there is no use in having a pin range defined for all
the pins.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-8-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: tegra: Pass struct tegra_pmx for pin range check 2020-03-27T10:42:32+00:00 Thierry Reding treding@nvidia.com 2020-03-19T12:27:34+00:00 6e01e0c7a0bebd8626e651181d3592cea8d456c4 Pass the struct tegra_pmx when checking for the pin range in device tree. This makes the call site a bit easier to read and will help keep that readability in a subsequent patch. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-7-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Pass the struct tegra_pmx when checking for the pin range in device
tree. This makes the call site a bit easier to read and will help keep
that readability in a subsequent patch.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-7-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: tegra: Fix "Scmitt" -> "Schmitt" typo 2020-03-27T10:41:38+00:00 Thierry Reding treding@nvidia.com 2020-03-19T12:27:33+00:00 66539e6eac708d47b5db8909b08cf9fbeac8a1db Properly spell "Schmitt" in the kerneldoc for pin group definitions. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-6-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Properly spell "Schmitt" in the kerneldoc for pin group definitions.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-6-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: tegra: Fix whitespace issues for improved readability 2020-03-27T10:41:04+00:00 Thierry Reding treding@nvidia.com 2020-03-19T12:27:32+00:00 028e45cda228efdae9d3faad9c4f7bec260ed707 Fix a few whitespace inconsistencies to make the code easier to read. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-5-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Fix a few whitespace inconsistencies to make the code easier to read.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20200319122737.3063291-5-thierry.reding@gmail.com
Tested-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: tegra: fix missing __iomem in suspend/resume 2020-01-06T23:01:09+00:00 Ben Dooks (Codethink) ben.dooks@codethink.co.uk 2019-12-18T11:04:56+00:00 4805746420a96011af78437552f5231deef6f295 The functions should have __iomem on the register pointer so add that to silence the following sparse warnings: drivers/pinctrl/tegra/pinctrl-tegra.c:657:22: warning: incorrect type in assignment (different address spaces) drivers/pinctrl/tegra/pinctrl-tegra.c:657:22: expected unsigned int [usertype] *regs drivers/pinctrl/tegra/pinctrl-tegra.c:657:22: got void [noderef] <asn:2> * drivers/pinctrl/tegra/pinctrl-tegra.c:659:42: warning: incorrect type in argument 1 (different address spaces) drivers/pinctrl/tegra/pinctrl-tegra.c:659:42: expected void const volatile [noderef] <asn:2> *addr drivers/pinctrl/tegra/pinctrl-tegra.c:659:42: got unsigned int [usertype] * drivers/pinctrl/tegra/pinctrl-tegra.c:675:22: warning: incorrect type in assignment (different address spaces) drivers/pinctrl/tegra/pinctrl-tegra.c:675:22: expected unsigned int [usertype] *regs drivers/pinctrl/tegra/pinctrl-tegra.c:675:22: got void [noderef] <asn:2> * drivers/pinctrl/tegra/pinctrl-tegra.c:677:25: warning: incorrect type in argument 2 (different address spaces) drivers/pinctrl/tegra/pinctrl-tegra.c:677:25: expected void volatile [noderef] <asn:2> *addr drivers/pinctrl/tegra/pinctrl-tegra.c:677:25: got unsigned int [usertype] * Signed-off-by: Ben Dooks (Codethink) <ben.dooks@codethink.co.uk> Link: https://lore.kernel.org/r/20191218110456.2533088-1-ben.dooks@codethink.co.uk Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The functions should have __iomem on the register pointer
so add that to silence the following sparse warnings:

drivers/pinctrl/tegra/pinctrl-tegra.c:657:22: warning: incorrect type in assignment (different address spaces)
drivers/pinctrl/tegra/pinctrl-tegra.c:657:22:    expected unsigned int [usertype] *regs
drivers/pinctrl/tegra/pinctrl-tegra.c:657:22:    got void [noderef] <asn:2> *
drivers/pinctrl/tegra/pinctrl-tegra.c:659:42: warning: incorrect type in argument 1 (different address spaces)
drivers/pinctrl/tegra/pinctrl-tegra.c:659:42:    expected void const volatile [noderef] <asn:2> *addr
drivers/pinctrl/tegra/pinctrl-tegra.c:659:42:    got unsigned int [usertype] *
drivers/pinctrl/tegra/pinctrl-tegra.c:675:22: warning: incorrect type in assignment (different address spaces)
drivers/pinctrl/tegra/pinctrl-tegra.c:675:22:    expected unsigned int [usertype] *regs
drivers/pinctrl/tegra/pinctrl-tegra.c:675:22:    got void [noderef] <asn:2> *
drivers/pinctrl/tegra/pinctrl-tegra.c:677:25: warning: incorrect type in argument 2 (different address spaces)
drivers/pinctrl/tegra/pinctrl-tegra.c:677:25:    expected void volatile [noderef] <asn:2> *addr
drivers/pinctrl/tegra/pinctrl-tegra.c:677:25:    got unsigned int [usertype] *

Signed-off-by: Ben Dooks (Codethink) <ben.dooks@codethink.co.uk>
Link: https://lore.kernel.org/r/20191218110456.2533088-1-ben.dooks@codethink.co.uk
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: use devm_platform_ioremap_resource() to simplify code 2019-11-05T14:33:40+00:00 YueHaibing yuehaibing@huawei.com 2019-11-04T14:26:54+00:00 4b024225c4a8245e6ecc66ce1df1eaf2ebeb4acb devm_platform_ioremap_resource() internally have platform_get_resource() and devm_ioremap_resource() in it. So instead of calling them separately use devm_platform_ioremap_resource() directly. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20191104142654.39256-1-yuehaibing@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
devm_platform_ioremap_resource() internally have platform_get_resource()
and devm_ioremap_resource() in it. So instead of calling them separately
use devm_platform_ioremap_resource() directly.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191104142654.39256-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>