linux-stable.git/drivers/pinctrl/tegra, branch v5.3

Merge tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2019-07-13T22:02:27+00:00

Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.3 kernel cycle:

Core changes:

- Device links can optionally be added between a pin control producer
and its consumers. This will affect how the system power management
is handled: a pin controller will not suspend before all of its
consumers have been suspended.

This was necessary for the ST Microelectronics STMFX expander and
need to be tested on other systems as well: it makes sense to make
this default in the long run.

Right now it is opt-in per driver.

- Drive strength can be specified in microamps. With decreases in
silicon technology, milliamps isn't granular enough, let's make it
possible to select drive strengths in microamps.

Right now the Meson (AMlogic) driver needs this.

New drivers:

- New subdriver for the Tegra 194 SoC.

- New subdriver for the Qualcomm SDM845.

- New subdriver for the Qualcomm SM8150.

- New subdriver for the Freescale i.MX8MN (Freescale is now a product
line of NXP).

- New subdriver for Marvell MV98DX1135.

Driver improvements:

- The Bitmain BM1880 driver now supports pin config in addition to
muxing.

- The Qualcomm drivers can now reserve some GPIOs as taken aside and
not usable for users. This is used in ACPI systems to take out some
GPIO lines used by the BIOS so that noone else (neither kernel nor
userspace) will play with them by mistake and crash the machine.

- A slew of refurbishing around the Aspeed drivers (board management
controllers for servers) in preparation for the new Aspeed AST2600
SoC.

- A slew of improvements over the SH PFC drivers as usual.

- Misc cleanups and fixes"

* tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits)
pinctrl: aspeed: Strip moved macros and structs from private header
pinctrl: aspeed: Fix missed include
pinctrl: baytrail: Use GENMASK() consistently
pinctrl: baytrail: Re-use data structures from pinctrl-intel.h
pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux()
pinctrl: qcom: Add SM8150 pinctrl driver
dt-bindings: pinctrl: qcom: Add SM8150 pinctrl binding
dt-bindings: pinctrl: qcom: Document missing gpio nodes
pinctrl: aspeed: Add implementation-related documentation
pinctrl: aspeed: Split out pinmux from general pinctrl
pinctrl: aspeed: Clarify comment about strapping W1C
pinctrl: aspeed: Correct comment that is no longer true
MAINTAINERS: Add entry for ASPEED pinctrl drivers
dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema
dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema
dt-bindings: pinctrl: aspeed: Split bindings document in two
pinctrl: qcom: Add irq_enable callback for msm gpio
pinctrl: madera: Fixup SPDX headers
pinctrl: qcom: sdm845: Fix CONFIG preprocessor guard
pinctrl: tegra: Add bitmask support for parked bits
...

pinctrl: tegra: Add bitmask support for parked bits

2019-06-25T13:35:58+00:00

Some pin groups have park bits for multiple pins in one register.
Support this by turning the parked bit field into a parked bitmask
field. If no parked bits are supported, the bitmask can be 0.

Update the pingroup table on Tegra210, which is the only generation
where this is supported, with the parked bitmask.

Signed-off-by: Thierry Reding 
Tested-by: Dmitry Osipenko 
Reviewed-by: Dmitry Osipenko 
Signed-off-by: Linus Walleij

pinctrl: tegra: Set specific GPIO compatible string

2019-06-25T13:34:37+00:00

Rather than reuse the nvidia,tegra30-gpio compatible string
to find the GPIO controller on Tegra30, Tegra114, Tegra124 and
Tegra210, use the most specific compatible string for each
SoC generation for consistency.

Signed-off-by: Thierry Reding 
Reviewed-by: Dmitry Osipenko 
Signed-off-by: Linus Walleij

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288

2019-06-05T15:36:37+00:00

Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 263 file(s).

Signed-off-by: Thomas Gleixner 
Reviewed-by: Allison Randal 
Reviewed-by: Alexios Zavras 
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de
Signed-off-by: Greg Kroah-Hartman

pinctrl: tegra: Add Tegra194 pinmux driver

2019-06-01T17:23:06+00:00

Tegra194 has PCIE L5 rst and clkreq pins which need to be controlled
dynamically at runtime. This driver supports change pinmux for these
pins. Pinmux for rest of the pins is set statically by bootloader and
will not be changed by this driver

Signed-off-by: Krishna Yarlagadda 
Signed-off-by: Suresh Mangipudi 
Tested-by: Vidya Sagar 
Signed-off-by: Linus Walleij

pinctrl: tegra: Support 32 bit register access

2019-06-01T17:21:57+00:00

Tegra194 chip has 32 bit pinctrl registers. Existing register defines in
header are only 16 bit.
Modified common pinctrl-tegra driver to support 32 bit registers of
Tegra 194 and later chips.

Signed-off-by: Krishna Yarlagadda 
Signed-off-by: Linus Walleij

treewide: Add SPDX license identifier - Makefile/Kconfig

2019-05-21T08:50:46+00:00

Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner 
Signed-off-by: Greg Kroah-Hartman

pinctrl: tegra: do not export tegra_pinctrl_probe

2018-09-20T15:15:16+00:00

No user of tegra_pinctrl_probe can be built as a module, hence
exporting the symbol is not necessary. Drop EXPORT_SYMBOL_GPL.

Signed-off-by: Stefan Agner 
Signed-off-by: Linus Walleij

pinctrl: tegra: Move drivers registration to arch_init level

2018-08-03T17:17:39+00:00

There is a bug in regards to deferred probing within the drivers core
that causes GPIO-driver to suspend after its users. The bug appears if
GPIO-driver probe is getting deferred, which happens after introducing
dependency on PINCTRL-driver for the GPIO-driver by defining "gpio-ranges"
property in device-tree. The bug in the drivers core is old (more than 4
years now) and is well known, unfortunately there is no easy fix for it.
The good news is that we can workaround the deferred probe issue by
changing GPIO / PINCTRL drivers registration order and hence by moving
PINCTRL driver registration to the arch_init level and GPIO to the
subsys_init.

Signed-off-by: Dmitry Osipenko 
Acked-by: Stefan Agner 
Signed-off-by: Linus Walleij

pinctrl: tegra: define GPIO compatible node per SoC

2018-07-29T21:37:03+00:00

Tegra 2 uses a different GPIO controller which uses "tegra20-gpio" as
compatible string.

Make the compatible string the GPIO node is using a SoC specific
property. This prevents the kernel from registering the GPIO range
twice in case the GPIO range is specified in the device tree.

Fixes: 9462510ce31e ("pinctrl: tegra: Only set the gpio range if needed")
Signed-off-by: Stefan Agner 
Signed-off-by: Linus Walleij