<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/pinctrl/qcom, branch v5.19.4</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>pinctrl: qcom: sm8250: Fix PDC map</title>
<updated>2022-08-25T09:45:18+00:00</updated>
<author>
<name>Jianhua Lu</name>
<email>lujianhua000@gmail.com</email>
</author>
<published>2022-08-03T01:56:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=51f58c8042c717438154fc288e12db1da6d3774e'/>
<id>51f58c8042c717438154fc288e12db1da6d3774e</id>
<content type='text'>
commit 4b759ca15a4914f96ea204ea9200ceeb01d70666 upstream.

Fix the PDC mapping for SM8250, gpio39 is mapped to irq73(not irq37).

Fixes: b41efeed507a("pinctrl: qcom: sm8250: Specify PDC map.")
Signed-off-by: Jianhua Lu &lt;lujianhua000@gmail.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;
Link: https://lore.kernel.org/r/20220803015645.22388-1-lujianhua000@gmail.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 4b759ca15a4914f96ea204ea9200ceeb01d70666 upstream.

Fix the PDC mapping for SM8250, gpio39 is mapped to irq73(not irq37).

Fixes: b41efeed507a("pinctrl: qcom: sm8250: Specify PDC map.")
Signed-off-by: Jianhua Lu &lt;lujianhua000@gmail.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;
Link: https://lore.kernel.org/r/20220803015645.22388-1-lujianhua000@gmail.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: msm8916: Allow CAMSS GP clocks to be muxed</title>
<updated>2022-08-25T09:45:18+00:00</updated>
<author>
<name>Nikita Travkin</name>
<email>nikita@trvn.ru</email>
</author>
<published>2022-06-12T14:59:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=72400a60f6d3bf6fd203d488d1ffc1868bff1cf5'/>
<id>72400a60f6d3bf6fd203d488d1ffc1868bff1cf5</id>
<content type='text'>
commit 44339391c666e46cba522d19c65a6ad1071c68b7 upstream.

GPIO 31, 32 can be muxed to GCC_CAMSS_GP(1,2)_CLK respectively but the
function was never assigned to the pingroup (even though the function
exists already).

Add this mode to the related pins.

Fixes: 5373a2c5abb6 ("pinctrl: qcom: Add msm8916 pinctrl driver")
Signed-off-by: Nikita Travkin &lt;nikita@trvn.ru&gt;
Link: https://lore.kernel.org/r/20220612145955.385787-4-nikita@trvn.ru
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 44339391c666e46cba522d19c65a6ad1071c68b7 upstream.

GPIO 31, 32 can be muxed to GCC_CAMSS_GP(1,2)_CLK respectively but the
function was never assigned to the pingroup (even though the function
exists already).

Add this mode to the related pins.

Fixes: 5373a2c5abb6 ("pinctrl: qcom: Add msm8916 pinctrl driver")
Signed-off-by: Nikita Travkin &lt;nikita@trvn.ru&gt;
Link: https://lore.kernel.org/r/20220612145955.385787-4-nikita@trvn.ru
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: spmi-gpio: Add pm6125 compatible</title>
<updated>2022-05-19T12:52:10+00:00</updated>
<author>
<name>Marijn Suijten</name>
<email>marijn.suijten@somainline.org</email>
</author>
<published>2022-05-11T22:06:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4d8a768ef4ed80112ffaa13a677196faa9d651c3'/>
<id>4d8a768ef4ed80112ffaa13a677196faa9d651c3</id>
<content type='text'>
The pm6125 has 9 GPIOs with no holes inbetween.

Signed-off-by: Marijn Suijten &lt;marijn.suijten@somainline.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@somainline.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220511220613.1015472-4-marijn.suijten@somainline.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The pm6125 has 9 GPIOs with no holes inbetween.

Signed-off-by: Marijn Suijten &lt;marijn.suijten@somainline.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@somainline.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220511220613.1015472-4-marijn.suijten@somainline.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'irq/gpio-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel</title>
<updated>2022-05-05T14:50:14+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2022-05-05T14:50:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=160625856d324c27888ccbbe7693475b2706bd3b'/>
<id>160625856d324c27888ccbbe7693475b2706bd3b</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'v5.18-rc5' into devel</title>
<updated>2022-05-01T21:25:10+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2022-05-01T21:25:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f930b69a8944ab3f018e2a175ddbd16e71348df9'/>
<id>f930b69a8944ab3f018e2a175ddbd16e71348df9</id>
<content type='text'>
Merge in Linux 5.18-rc5 since new code to the STM32 driver
depend in a non-trivial way on the fixes merged in -rc5.

Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Merge in Linux 5.18-rc5 since new code to the STM32 driver
depend in a non-trivial way on the fixes merged in -rc5.

Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: Update clock voting as optional</title>
<updated>2022-04-22T22:04:44+00:00</updated>
<author>
<name>Srinivasa Rao Mandadapu</name>
<email>quic_srivasam@quicinc.com</email>
</author>
<published>2022-04-18T12:37:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a6a5c1737fa914751aa9303ad9ee605244e05aa4'/>
<id>a6a5c1737fa914751aa9303ad9ee605244e05aa4</id>
<content type='text'>
Update bulk clock voting to optional voting as ADSP bypass platform doesn't
need macro and decodec clocks, as these macro and dcodec GDSC switches are
maintained as power domains and operated from lpass clock drivers.

Signed-off-by: Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;
Co-developed-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Signed-off-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Reviewed-by: Matthias Kaehlcke &lt;mka@chromium.org&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Link: https://lore.kernel.org/r/1650285427-19752-8-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update bulk clock voting to optional voting as ADSP bypass platform doesn't
need macro and decodec clocks, as these macro and dcodec GDSC switches are
maintained as power domains and operated from lpass clock drivers.

Signed-off-by: Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;
Co-developed-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Signed-off-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Reviewed-by: Matthias Kaehlcke &lt;mka@chromium.org&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Link: https://lore.kernel.org/r/1650285427-19752-8-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add SC7280 lpass pin configuration</title>
<updated>2022-04-22T22:04:43+00:00</updated>
<author>
<name>Srinivasa Rao Mandadapu</name>
<email>quic_srivasam@quicinc.com</email>
</author>
<published>2022-04-18T12:37:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=120a5f2e5430ca3908d8b7639105d95f12ac135c'/>
<id>120a5f2e5430ca3908d8b7639105d95f12ac135c</id>
<content type='text'>
Add pin control support for SC7280 LPASS LPI.

Signed-off-by: Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;
Co-developed-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Signed-off-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Reviewed-by: Matthias Kaehlcke &lt;mka@chromium.org&gt;
Link: https://lore.kernel.org/r/1650285427-19752-7-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add pin control support for SC7280 LPASS LPI.

Signed-off-by: Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;
Co-developed-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Signed-off-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Reviewed-by: Matthias Kaehlcke &lt;mka@chromium.org&gt;
Link: https://lore.kernel.org/r/1650285427-19752-7-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: Extract chip specific LPASS LPI code</title>
<updated>2022-04-22T22:04:43+00:00</updated>
<author>
<name>Srinivasa Rao Mandadapu</name>
<email>quic_srivasam@quicinc.com</email>
</author>
<published>2022-04-18T12:37:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9ce49018c6928263d41b783c9e4928c6af05db43'/>
<id>9ce49018c6928263d41b783c9e4928c6af05db43</id>
<content type='text'>
Extract the chip specific SM8250 data from the LPASS LPI pinctrl driver
to allow reusing the common code in the addition of subsequent
platforms.

Signed-off-by: Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;
Co-developed-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Signed-off-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Reviewed-by: Matthias Kaehlcke &lt;mka@chromium.org&gt;
Link: https://lore.kernel.org/r/1650285427-19752-6-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Extract the chip specific SM8250 data from the LPASS LPI pinctrl driver
to allow reusing the common code in the addition of subsequent
platforms.

Signed-off-by: Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;
Co-developed-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Signed-off-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Reviewed-by: Matthias Kaehlcke &lt;mka@chromium.org&gt;
Link: https://lore.kernel.org/r/1650285427-19752-6-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: Update lpi pin group custiom functions with framework generic functions</title>
<updated>2022-04-22T22:04:43+00:00</updated>
<author>
<name>Srinivasa Rao Mandadapu</name>
<email>quic_srivasam@quicinc.com</email>
</author>
<published>2022-04-18T12:37:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=be73368d535614b351c13a10680b4cdd06db2417'/>
<id>be73368d535614b351c13a10680b4cdd06db2417</id>
<content type='text'>
Update custom pin group structure members with framework generic
group_desc structure and replace the driver's custom pinctrl_ops
with framework provided generic pin control group functions to avoid
redundant code written in lpass lpi driver.

Signed-off-by: Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;
Co-developed-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Signed-off-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Reviewed-by: Matthias Kaehlcke &lt;mka@chromium.org&gt;
Link: https://lore.kernel.org/r/1650285427-19752-5-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update custom pin group structure members with framework generic
group_desc structure and replace the driver's custom pinctrl_ops
with framework provided generic pin control group functions to avoid
redundant code written in lpass lpi driver.

Signed-off-by: Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;
Co-developed-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Signed-off-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Reviewed-by: Matthias Kaehlcke &lt;mka@chromium.org&gt;
Link: https://lore.kernel.org/r/1650285427-19752-5-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: qcom: Update macro name to LPI specific</title>
<updated>2022-04-22T22:04:43+00:00</updated>
<author>
<name>Srinivasa Rao Mandadapu</name>
<email>quic_srivasam@quicinc.com</email>
</author>
<published>2022-04-18T12:37:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=6454711015267fe38b6f05aba232e01be2cb9693'/>
<id>6454711015267fe38b6f05aba232e01be2cb9693</id>
<content type='text'>
Update NO_SLEW macro to LPI_NO_SLEW macro as this driver lpi specific.

Signed-off-by: Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;
Co-developed-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Signed-off-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/1650285427-19752-4-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update NO_SLEW macro to LPI_NO_SLEW macro as this driver lpi specific.

Signed-off-by: Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;
Co-developed-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Signed-off-by: Venkata Prasad Potturu &lt;quic_potturu@quicinc.com&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/1650285427-19752-4-git-send-email-quic_srivasam@quicinc.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
