linux-stable.git/drivers/pinctrl/qcom, branch linux-6.10.y Linux kernel stable tree pinctrl: qcom: x1e80100: Bypass PDC wakeup parent for now 2024-09-12T09:12:46+00:00 Stephan Gerhold stephan.gerhold@linaro.org 2024-08-30T09:09:07+00:00 1e8a6948bdbddaaccad709bd800b7dcc63088376 commit 602cb14e310a7a32c4f27d1f16c4614c790c7f6f upstream. On X1E80100, GPIO interrupts for wakeup-capable pins have been broken since the introduction of the pinctrl driver. This prevents keyboard and touchpad from working on most of the X1E laptops. So far we have worked around this by manually building a kernel with the "wakeup-parent" removed from the pinctrl node in the device tree, but we cannot expect all users to do that. Implement a similar workaround in the driver by clearing the wakeirq_map for X1E80100. This avoids using the PDC wakeup parent for all GPIOs and handles the interrupts directly in the pinctrl driver instead. The PDC driver needs additional changes to support X1E80100 properly. Adding a workaround separately first allows to land the necessary PDC changes through the normal release cycle, while still solving the more critical problem with keyboard and touchpad on the current stable kernel versions. Bypassing the PDC is enough for now, because we have not yet enabled the deep idle states where using the PDC becomes necessary. Cc: stable@vger.kernel.org Fixes: 05e4941d97ef ("pinctrl: qcom: Add X1E80100 pinctrl driver") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konradybcio@kernel.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/20240830-x1e80100-bypass-pdc-v1-1-d4c00be0c3e3@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
commit 602cb14e310a7a32c4f27d1f16c4614c790c7f6f upstream.

On X1E80100, GPIO interrupts for wakeup-capable pins have been broken since
the introduction of the pinctrl driver. This prevents keyboard and touchpad
from working on most of the X1E laptops. So far we have worked around this
by manually building a kernel with the "wakeup-parent" removed from the
pinctrl node in the device tree, but we cannot expect all users to do that.

Implement a similar workaround in the driver by clearing the wakeirq_map
for X1E80100. This avoids using the PDC wakeup parent for all GPIOs
and handles the interrupts directly in the pinctrl driver instead.

The PDC driver needs additional changes to support X1E80100 properly.
Adding a workaround separately first allows to land the necessary PDC
changes through the normal release cycle, while still solving the more
critical problem with keyboard and touchpad on the current stable kernel
versions. Bypassing the PDC is enough for now, because we have not yet
enabled the deep idle states where using the PDC becomes necessary.

Cc: stable@vger.kernel.org
Fixes: 05e4941d97ef ("pinctrl: qcom: Add X1E80100 pinctrl driver")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/20240830-x1e80100-bypass-pdc-v1-1-d4c00be0c3e3@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
pinctrl: qcom: x1e80100: Fix special pin offsets 2024-09-04T11:30:04+00:00 Konrad Dybcio quic_kdybcio@quicinc.com 2024-08-09T00:22:04+00:00 0197bf772f657fbdea5e9bdec5eea6e67d82cbde [ Upstream commit d3692d95cc4d88114b070ee63cffc976f00f207f ] Remove the erroneus 0x100000 offset to prevent the boards from crashing on pin state setting, as well as for the intended state changes to take effect. Fixes: 05e4941d97ef ("pinctrl: qcom: Add X1E80100 pinctrl driver") Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/20240809-topic-h_sdc-v1-1-bb421532c531@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit d3692d95cc4d88114b070ee63cffc976f00f207f ]

Remove the erroneus 0x100000 offset to prevent the boards from crashing
on pin state setting, as well as for the intended state changes to take
effect.

Fixes: 05e4941d97ef ("pinctrl: qcom: Add X1E80100 pinctrl driver")
Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/20240809-topic-h_sdc-v1-1-bb421532c531@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
pinctrl: qcom: x1e80100: Update PDC hwirq map 2024-09-04T11:30:02+00:00 Konrad Dybcio konrad.dybcio@linaro.org 2024-07-11T09:37:57+00:00 60dec92867d878d05e8365a865a2bc5394de2ec9 [ Upstream commit b7fd10333713e9984cc9b9c04f3681f80efdc809 ] The current map seems to be out of sync (and includes a duplicate entry for GPIO193..). Replace it with the map present in shipping devices' ACPI tables. This new one seems more complete, as it e.g. contains GPIO145 (PCIE6a WAKE#) Fixes: 05e4941d97ef ("pinctrl: qcom: Add X1E80100 pinctrl driver") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com> Link: https://lore.kernel.org/20240711-topic-x1e_pdc_tlmm-v1-1-e278b249d793@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit b7fd10333713e9984cc9b9c04f3681f80efdc809 ]

The current map seems to be out of sync (and includes a duplicate entry
for GPIO193..).

Replace it with the map present in shipping devices' ACPI tables.

This new one seems more complete, as it e.g. contains GPIO145 (PCIE6a
WAKE#)

Fixes: 05e4941d97ef ("pinctrl: qcom: Add X1E80100 pinctrl driver")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Link: https://lore.kernel.org/20240711-topic-x1e_pdc_tlmm-v1-1-e278b249d793@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
pinctrl: qcom: spmi-gpio: drop broken pm8008 support 2024-06-17T07:16:54+00:00 Johan Hovold johan+linaro@kernel.org 2024-05-29T16:29:52+00:00 8da86499d4cd125a9561f9cd1de7fba99b0aecbf The SPMI GPIO driver assumes that the parent device is an SPMI device and accesses random data when backcasting the parent struct device pointer for non-SPMI devices. Fortunately this does not seem to cause any issues currently when the parent device is an I2C client like the PM8008, but this could change if the structures are reorganised (e.g. using structure randomisation). Notably the interrupt implementation is also broken for non-SPMI devices. Also note that the two GPIO pins on PM8008 are used for interrupts and reset so their practical use should be limited. Drop the broken GPIO support for PM8008 for now. Fixes: ea119e5a482a ("pinctrl: qcom-pmic-gpio: Add support for pm8008") Cc: stable@vger.kernel.org # 5.13 Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20240529162958.18081-9-johan+linaro@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The SPMI GPIO driver assumes that the parent device is an SPMI device
and accesses random data when backcasting the parent struct device
pointer for non-SPMI devices.

Fortunately this does not seem to cause any issues currently when the
parent device is an I2C client like the PM8008, but this could change if
the structures are reorganised (e.g. using structure randomisation).

Notably the interrupt implementation is also broken for non-SPMI devices.

Also note that the two GPIO pins on PM8008 are used for interrupts and
reset so their practical use should be limited.

Drop the broken GPIO support for PM8008 for now.

Fixes: ea119e5a482a ("pinctrl: qcom-pmic-gpio: Add support for pm8008")
Cc: stable@vger.kernel.org	# 5.13
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20240529162958.18081-9-johan+linaro@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs 2024-05-03T07:55:04+00:00 Danila Tikhonov danila@jiaxyga.com 2024-04-23T20:32:45+00:00 5ed79863fae5c06eb33f5cd6b6bdf22dd7089392 SDC1 and UFS_RESET special pins are located in the west memory bank. SDC1 have address 0x359a000: 0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9a000 (SDC1_OFFSET) = 0x359a000 UFS_RESET have address 0x359f000: 0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9f000 (UFS_OFFSET) = 0x359a000 Fixes: b915395c9e04 ("pinctrl: qcom: Add SM7150 pinctrl driver") Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Message-ID: <20240423203245.188480-1-danila@jiaxyga.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
SDC1 and UFS_RESET special pins are located in the west memory bank.

SDC1 have address 0x359a000:
0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9a000 (SDC1_OFFSET) = 0x359a000

UFS_RESET have address 0x359f000:
0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9f000 (UFS_OFFSET) = 0x359a000

Fixes: b915395c9e04 ("pinctrl: qcom: Add SM7150 pinctrl driver")
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Message-ID: <20240423203245.188480-1-danila@jiaxyga.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: sm7150: fix module autoloading 2024-04-17T08:43:50+00:00 Krzysztof Kozlowski krzk@kernel.org 2024-04-11T06:46:13+00:00 abda4619f41cd52a90b068ce728027c529d7b759 Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> Message-ID: <20240411064614.7409-4-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded
based on the alias from of_device_id table.  Pin controllers are
considered core components, so usually they are built-in, however these
can be built and used as modules on some generic kernel.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Message-ID: <20240411064614.7409-4-krzk@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: spmi-gpio: Add PMIH0108 and PMD8028 support 2024-03-28T09:25:11+00:00 Anjelique Melendez quic_amelende@quicinc.com 2024-03-26T22:06:30+00:00 b5658c7ab942cc9c49a164dd8e027096b3e3c0f4 Add support for qcom,pmih0108-gpio and qcom,pmd8028-gpio. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Message-ID: <20240326220628.2392802-5-quic_amelende@quicinc.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add support for qcom,pmih0108-gpio and qcom,pmd8028-gpio.

Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Message-ID: <20240326220628.2392802-5-quic_amelende@quicinc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: spmi-gpio: Add PMXR2230 and PM6450 support 2024-03-28T09:25:11+00:00 Anjelique Melendez quic_amelende@quicinc.com 2024-03-26T22:06:29+00:00 e5c7b013cbcc7a4d91333811bd8524112f9c22a5 Add support for qcom,pmxr2230-gpio and qcom,pm6450-gpio. Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Message-ID: <20240326220628.2392802-4-quic_amelende@quicinc.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add support for qcom,pmxr2230-gpio and qcom,pm6450-gpio.

Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Message-ID: <20240326220628.2392802-4-quic_amelende@quicinc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: sm8650-lpass-lpi: correct Kconfig name 2024-02-21T22:00:57+00:00 Krzysztof Kozlowski krzysztof.kozlowski@linaro.org 2024-02-16T10:24:35+00:00 47847b9bcdb13c2da1829323a66651ef63047b77 Use proper model name in SM8650 LPASS pin controller Kconfig entry. Cc: <stable@vger.kernel.org> Fixes: c4e47673853f ("pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASS") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240216102435.89867-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Use proper model name in SM8650 LPASS pin controller Kconfig entry.

Cc:  <stable@vger.kernel.org>
Fixes: c4e47673853f ("pinctrl: qcom: sm8650-lpass-lpi: add SM8650 LPASS")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240216102435.89867-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: qcom: lpass-lpi: remove duplicated include 2023-12-20T11:30:09+00:00 Wang Jinchao wangjinchao@xfusion.com 2023-12-15T10:11:44+00:00 ff629d300413cf6c091b4f96cf4b14472ad39a3b remove the second #include <linux/seq_file.h> Signed-off-by: Wang Jinchao <wangjinchao@xfusion.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/202312151810+0800-wangjinchao@xfusion.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
remove the second #include <linux/seq_file.h>

Signed-off-by: Wang Jinchao <wangjinchao@xfusion.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/202312151810+0800-wangjinchao@xfusion.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>