linux-stable.git/drivers/pinctrl/qcom, branch linux-5.4.y

pinctrl: qcom: msm: mark certain pins as invalid for interrupts

2025-07-17T16:25:03+00:00

commit 93712205ce2f1fb047739494c0399a26ea4f0890 upstream.

On some platforms, the UFS-reset pin has no interrupt logic in TLMM but
is nevertheless registered as a GPIO in the kernel. This enables the
user-space to trigger a BUG() in the pinctrl-msm driver by running, for
example: `gpiomon -c 0 113` on RB2.

The exact culprit is requesting pins whose intr_detection_width setting
is not 1 or 2 for interrupts. This hits a BUG() in
msm_gpio_irq_set_type(). Potentially crashing the kernel due to an
invalid request from user-space is not optimal, so let's go through the
pins and mark those that would fail the check as invalid for the irq chip
as we should not even register them as available irqs.

This function can be extended if we determine that there are more
corner-cases like this.

Fixes: f365be092572 ("pinctrl: Add Qualcomm TLMM driver")
Cc: stable@vger.kernel.org
Reviewed-by: Bjorn Andersson 
Signed-off-by: Bartosz Golaszewski 
Link: https://lore.kernel.org/20250612091448.41546-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij 
Signed-off-by: Greg Kroah-Hartman

pinctrl: qcom-pmic-gpio: add support for PM8937

2024-12-14T18:44:54+00:00

[ Upstream commit 89265a58ff24e3885c2c9ca722bc3aaa47018be9 ]

PM8937 has 8 GPIO-s with holes on GPIO3, GPIO4 and GPIO6.

Signed-off-by: Barnabás Czémán 
Reviewed-by: Dmitry Baryshkov 
Link: https://lore.kernel.org/20241031-msm8917-v2-2-8a075faa89b1@mainlining.org
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: qcom: msm8916: Allow CAMSS GP clocks to be muxed

2022-08-25T09:18:23+00:00

commit 44339391c666e46cba522d19c65a6ad1071c68b7 upstream.

GPIO 31, 32 can be muxed to GCC_CAMSS_GP(1,2)_CLK respectively but the
function was never assigned to the pingroup (even though the function
exists already).

Add this mode to the related pins.

Fixes: 5373a2c5abb6 ("pinctrl: qcom: Add msm8916 pinctrl driver")
Signed-off-by: Nikita Travkin 
Link: https://lore.kernel.org/r/20220612145955.385787-4-nikita@trvn.ru
Signed-off-by: Linus Walleij 
Signed-off-by: Greg Kroah-Hartman

pinctrl: qcom: spmi-gpio: fix warning about irq chip reusage

2020-06-30T19:37:04+00:00

[ Upstream commit 5e50311556c9f409a85740e3cb4c4511e7e27da0 ]

Fix the following warnings caused by reusage of the same irq_chip
instance for all spmi-gpio gpio_irq_chip instances. Instead embed
irq_chip into pmic_gpio_state struct.

gpio gpiochip2: (c440000.qcom,spmi:pmic@2:gpio@c000): detected irqchip that is shared with multiple gpiochips: please fix the driver.
gpio gpiochip3: (c440000.qcom,spmi:pmic@4:gpio@c000): detected irqchip that is shared with multiple gpiochips: please fix the driver.
gpio gpiochip4: (c440000.qcom,spmi:pmic@a:gpio@c000): detected irqchip that is shared with multiple gpiochips: please fix the driver.

Signed-off-by: Dmitry Baryshkov 
Acked-by: Manivannan Sadhasivam 
Link: https://lore.kernel.org/r/20200604002817.667160-1-dmitry.baryshkov@linaro.org
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: qcom: fix wrong write in update_dual_edge

2020-05-20T06:20:19+00:00

[ Upstream commit 90bcb0c3ca0809d1ed358bfbf838df4b3d4e58e0 ]

Fix a typo in the readl/writel accessor conversion where val is used
instead of pol changing the behavior of the original code.

Cc: stable@vger.kernel.org
Fixes: 6c73698904aa pinctrl: qcom: Introduce readl/writel accessors
Signed-off-by: Ansuel Smith 
Reviewed-by: Bjorn Andersson 
Link: https://lore.kernel.org/r/20200414003726.25347-1-ansuelsmth@gmail.com
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: qcom: sc7180: Add missing tile info in SDC_QDSD_PINGROUP/UFS_RESET

2019-12-31T15:44:35+00:00

[ Upstream commit 81898a44f288607cb3b11a42aed6efb646891c19 ]

The SDC_QDSD_PINGROUP/UFS_RESET macros are missing the .tile info needed to
calculate the right register offsets. Adding them here and also
adjusting the offsets accordingly.

Fixes: f2ae04c45b1a ("pinctrl: qcom: Add SC7180 pinctrl driver")

Reported-by: Veerabhadrarao Badiganti 
Signed-off-by: Rajendra Nayak 
Link: https://lore.kernel.org/r/20191021141507.24066-1-rnayak@codeaurora.org
Reviewed-by: Bjorn Andersson 
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

Merge tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2019-09-19T21:19:33+00:00

Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.4 kernel cycle:

Core changes:

- Fix errors in example code in the documentation.

New drivers:

- Add support for JZ4760, JZ4760B, X1000, X1000E and X1500 to the
Ingenic driver.

- Support Cirrus Logic Madera CS47L92 and CS47L15.

- Support Allwinner Sunxi V3S.

- Support Aspeed 2600 BMC.

- Support Qualcomm SC7180.

- Support Marvell MVEBU CS115.

Driver improvements:

- Clean up a few drivers to use the devm_platform_ioremap_resource()
helper.

- Pass the irqchip when registering the gpio_chip in some pin
controllers that are also GPIO controllers.

- Support suspend/resume in the Tegra driver.

- Support pull-up on the Broadcom BCM2711.

- The Intel driver can now request locked pads.

- Fix the UFS reset pin in the Qualcomm SDM845 driver"

* tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (112 commits)
pinctrl: meson-gxbb: Fix wrong pinning definition for uart_c
pinctrl: sh-pfc: Unlock on error in sh_pfc_func_set_mux()
pinctrl: bcm: remove redundant assignment to pointer log
pinctrl: iproc: Add 'get_direction' support
pinctrl: iproc-gpio: Handle interrupts for multiple instances
pinctrl: iproc-gpio: Fix incorrect pinconf configurations
pinctrl: intel: mark intel_pin_to_gpio __maybe_unused
pinctrl: qcom: sdm845: Fix UFS_RESET pin
pinctrl: mvebu: add additional variant for standalone CP115
pinctrl: mvebu: Add CP110 missing pin functionality
dt-bindings: cp110: document the new CP115 pinctrl compatible
pinctrl: bcm2835: Pass irqchip when adding gpiochip
pinctrl: meson: meson: Add of_node_put() before return
pinctrl/gpio: Take MUX usage into account
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150l support
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150b support
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150 support
pinctrl: amd: disable spurious-firing GPIO IRQs
pinctrl: rza2: Include the appropriate headers
pinctrl: rza2: Drop driver use of consumer flags
...

pinctrl: qcom: sdm845: Fix UFS_RESET pin

2019-09-04T13:23:22+00:00

The UFS_RESET pin is the magical pin #150 now, not 153 per the
sdm845_groups array declared in this file. Fix the order of pins so that
UFS_RESET is 150 and the SDC pins follow after.

Fixes: 53a5372ce326 ("pinctrl: qcom: sdm845: Expose ufs_reset as gpio")
Signed-off-by: Stephen Boyd 
Link: https://lore.kernel.org/r/20190830060227.12792-1-swboyd@chromium.org
Reviewed-by: Bjorn Andersson 
Signed-off-by: Linus Walleij

dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150l support

2019-08-23T07:59:55+00:00

Add support for the PM8150l GPIO support to the Qualcomm PMIC GPIO
binding.

Signed-off-by: Vinod Koul 
Link: https://lore.kernel.org/r/20190814123512.6017-3-vkoul@kernel.org
Signed-off-by: Linus Walleij

dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150b support

2019-08-23T07:59:13+00:00

Add support for the PM8150b GPIO support to the Qualcomm PMIC GPIO
binding.

Signed-off-by: Vinod Koul 
Link: https://lore.kernel.org/r/20190814123512.6017-2-vkoul@kernel.org
Signed-off-by: Linus Walleij