linux-stable.git/drivers/pinctrl/meson, branch v6.0 Linux kernel stable tree Merge tag 'intel-gpio-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel 2022-05-04T21:15:21+00:00 Linus Walleij linus.walleij@linaro.org 2022-05-04T21:15:21+00:00 a0912083086d7b6bd7f0f1b4c2ffa6c8283a9f98 intel-gpio for v5.19-1 * Introduce helpers to iterate over GPIO chip nodes and covert some drivers The following is an automated git shortlog grouped by driver: gpiolib: - Introduce a helper to get first GPIO controller node - Introduce gpiochip_node_count() helper - Introduce for_each_gpiochip_node() loop helper pinctrl: - meson: Replace custom code by gpiochip_node_count() call - meson: Enable COMPILE_TEST - meson: Rename REG_* to MESON_REG_* - armada-37xx: Reuse GPIO fwnode in armada_37xx_irqchip_register() - armada-37xx: Switch to use fwnode instead of of_node - samsung: Switch to use for_each_gpiochip_node() helper - samsung: Drop redundant node parameter in samsung_banks_of_node_get() - npcm7xx: Switch to use for_each_gpiochip_node() helper - renesas: rza1: Switch to use for_each_gpiochip_node() helper - renesas: rza1: Replace custom code by gpiochip_node_count() call - stm32: Switch to use for_each_gpiochip_node() helper - stm32: Replace custom code by gpiochip_node_count() call 
intel-gpio for v5.19-1

* Introduce helpers to iterate over GPIO chip nodes and covert some drivers

The following is an automated git shortlog grouped by driver:

gpiolib:
 -  Introduce a helper to get first GPIO controller node
 -  Introduce gpiochip_node_count() helper
 -  Introduce for_each_gpiochip_node() loop helper

pinctrl:
 -  meson: Replace custom code by gpiochip_node_count() call
 -  meson: Enable COMPILE_TEST
 -  meson: Rename REG_* to MESON_REG_*
 -  armada-37xx: Reuse GPIO fwnode in armada_37xx_irqchip_register()
 -  armada-37xx: Switch to use fwnode instead of of_node
 -  samsung: Switch to use for_each_gpiochip_node() helper
 -  samsung: Drop redundant node parameter in samsung_banks_of_node_get()
 -  npcm7xx: Switch to use for_each_gpiochip_node() helper
 -  renesas: rza1: Switch to use for_each_gpiochip_node() helper
 -  renesas: rza1: Replace custom code by gpiochip_node_count() call
 -  stm32: Switch to use for_each_gpiochip_node() helper
 -  stm32: Replace custom code by gpiochip_node_count() call
pinctrl: meson: fix unused variable warning 2022-04-22T20:56:46+00:00 Qianggui Song qianggui.song@amlogic.com 2022-03-30T02:37:19+00:00 34069de314574cfa19781809cc7a8991a892c908 The kernel test robot reported a warning as below: >> drivers/pinctrl/meson/pinctrl-meson-s4.c:178:27: warning: unused variable 'tdm_sclk1_c_pins' [-Wunused-const-variable] static const unsigned int tdm_sclk1_c_pins[] = { GPIOC_3 }; Fix it by adding missing description about this pins Fixes: 775214d389c2 ("pinctrl: meson: add pinctrl driver support for Meson-S4 Soc") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220330023720.18238-1-qianggui.song@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The kernel test robot reported a warning as below:
>> drivers/pinctrl/meson/pinctrl-meson-s4.c:178:27: warning: unused variable 'tdm_sclk1_c_pins' [-Wunused-const-variable]
   static const unsigned int tdm_sclk1_c_pins[]            = { GPIOC_3 };

Fix it by adding missing description about this pins

Fixes: 775214d389c2 ("pinctrl: meson: add pinctrl driver support for Meson-S4 Soc")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220330023720.18238-1-qianggui.song@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: meson: Replace custom code by gpiochip_node_count() call 2022-04-18T13:18:52+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2022-04-01T10:36:02+00:00 edc5601db66411a8c9c6b08b3aacf7e154a34c6d Since we have generic function to count GPIO controller nodes under a given device, there is no need to open code it. Replace custom code by gpiochip_node_count() call. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> 
Since we have generic function to count GPIO controller nodes
under a given device, there is no need to open code it. Replace
custom code by gpiochip_node_count() call.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
pinctrl: meson: Enable COMPILE_TEST 2022-04-18T13:18:52+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2022-04-01T10:36:01+00:00 6671d0bc17866f71b8ca7ea3fb7e6dfc2a8069d2 Enable COMPILE_TEST for a better test coverage. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> 
Enable COMPILE_TEST for a better test coverage.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
pinctrl: meson: Rename REG_* to MESON_REG_* 2022-04-18T13:18:52+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2022-04-01T10:36:00+00:00 2b2dce809920b3cf92df27a484c0649dda7270b8 Currently compilation test fails on x86 due to name collision. The usual way to fix that is to move both conflicting parts to their own namespaces. Rename REG_* to MESON_REG_* as a prerequisite for enabling COMPILE_TEST. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> 
Currently compilation test fails on x86 due to name collision. The usual
way to fix that is to move both conflicting parts to their own namespaces.

Rename REG_* to MESON_REG_* as a prerequisite for enabling COMPILE_TEST.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
pinctrl: meson: add pinctrl driver support for Meson-S4 Soc 2022-01-30T01:52:45+00:00 Qianggui Song qianggui.song@amlogic.com 2022-01-13T03:10:43+00:00 775214d389c259c77ff2b4de50bdaab5c9bd5db3 Add new pinctrl driver for Amlogic's Meson-S4 SoC which share the same register layout as the previous Meson-A1. Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com> Link: https://lore.kernel.org/r/20220113031044.2665-4-qianggui.song@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add new pinctrl driver for Amlogic's Meson-S4 SoC which share the
same register layout as the previous Meson-A1.

Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
Link: https://lore.kernel.org/r/20220113031044.2665-4-qianggui.song@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: meson-g12a: add more pwm_f options 2022-01-24T00:12:54+00:00 Gary Bisson gary.bisson@boundarydevices.com 2022-01-12T21:16:40+00:00 46f3418926f0404d98a62f3ab58fd893dc33e20c Add missing PWM_F pin muxing for GPIOA_11 and GPIOZ_12. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220112211642.2248901-2-gary.bisson@boundarydevices.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add missing PWM_F pin muxing for GPIOA_11 and GPIOZ_12.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220112211642.2248901-2-gary.bisson@boundarydevices.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl/meson: enable building as modules 2020-11-05T13:51:38+00:00 Kevin Hilman khilman@baylibre.com 2020-10-26T18:30:25+00:00 9c65441ec823c7889fc3cd1f00208401cf7044d8 Enable pinctrl drivers for 64-bit Amlogic SoCs to be built as modules. The default is still built-in, this only adds the option of building as modules. Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20201026183025.31768-1-khilman@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Enable pinctrl drivers for 64-bit Amlogic SoCs to be built as modules.

The default is still built-in, this only adds the option of building
as modules.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201026183025.31768-1-khilman@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: meson: pinctrl-meson-a1: Remove unused const variable 'i2c_slave_groups' 2020-07-16T13:58:12+00:00 Lee Jones lee.jones@linaro.org 2020-07-13T14:49:28+00:00 fb5dd4297d0c7b2d09701defb02795ab3f0a57bf It has never been used. Fixes the following W=1 kernel build warning(s): drivers/pinctrl/meson/pinctrl-meson-a1.c:749:27: warning: ‘i2c_slave_groups’ defined but not used [-Wunused-const-variable=] 749 | static const char const i2c_slave_groups[] = { | ^~~~~~~~~~~~~~~~ Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Qianggui Song <qianggui.song@amlogic.com> Cc: linux-amlogic@lists.infradead.org Link: https://lore.kernel.org/r/20200713144930.1034632-24-lee.jones@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
It has never been used.

Fixes the following W=1 kernel build warning(s):

 drivers/pinctrl/meson/pinctrl-meson-a1.c:749:27: warning: ‘i2c_slave_groups’ defined but not used [-Wunused-const-variable=]
 749 | static const char const i2c_slave_groups[] = {
 | ^~~~~~~~~~~~~~~~

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Qianggui Song <qianggui.song@amlogic.com>
Cc: linux-amlogic@lists.infradead.org
Link: https://lore.kernel.org/r/20200713144930.1034632-24-lee.jones@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: meson: fix drive strength register and bit calculation 2020-07-07T11:15:11+00:00 Hyeonki Hong hhk7734@gmail.com 2020-06-18T02:59:22+00:00 f088ab6d4f4ce49d422c220074b7e605f54e2299 If a GPIO bank has greater than 16 pins, PAD_DS_REG is split into two or more registers. However, when register and bit were calculated, the first register defined in the bank was used, and the bit was calculated based on the first pin. This causes problems in setting the driving strength. The following method was used to solve this problem: A bit is calculated first using predefined strides. Then, If the bit is 32 or more, the register is changed by the quotient of the bit divided by 32. And the bit is set to the remainder. Signed-off-by: Hyeonki Hong <hhk7734@gmail.com> Link: https://lore.kernel.org/r/20200618025916.GA19368@home-desktop Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
If a GPIO bank has greater than 16 pins, PAD_DS_REG is split into two
or more registers. However, when register and bit were calculated, the
first register defined in the bank was used, and the bit was calculated
based on the first pin. This causes problems in setting the driving
strength.

The following method was used to solve this problem:
A bit is calculated first using predefined strides. Then, If the bit is
32 or more, the register is changed by the quotient of the bit divided
by 32. And the bit is set to the remainder.

Signed-off-by: Hyeonki Hong <hhk7734@gmail.com>
Link: https://lore.kernel.org/r/20200618025916.GA19368@home-desktop
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>