linux-stable.git/drivers/pinctrl/meson, branch linux-4.15.y

pinctrl: meson: rework pinmux ops

2017-10-16T21:14:10+00:00

This change prepare the introduction of new meson SoC. This new SoC will
share the same gpio/pinconf registers but the pinmux part will be
different. While the format of the data associated with each pinmux group
will change, the way to handle pinmuxing will be similar.

To deal with this new situation, the meson_pmx_struture is kept but the
data associated to it is now generic. This allows to reuse the basic
functions which would otherwise be copy/pasted in each pinmux driver
(such as getting the name a count of groups and functions) Only the
functions actually using this specific data is taken out of the common
code and is handling the SoC pinmuxing

Reviewed-by: Neil Armstrong 
Reviewed-by: Kevin Hilman 
Signed-off-by: Jerome Brunet 
Signed-off-by: Linus Walleij

pinctrl: meson: separate soc drivers

2017-10-16T21:14:10+00:00

When meson pinctrl is enabled, all meson platforms pinctrl drivers are
built in the kernel, with a significant amount of data.

This leads to situation where pinctrl drivers targeting an architecture
are also compiled and shipped on another one (ex: meson8 - ARM - compiled
and shipped on ARM64 builds). This is a waste of memory we can easily
avoid.

This change makes 4 pinctrl drivers (1 per SoC) out the original single
driver, allowing to compile and ship only the ones required.

Reviewed-by: Neil Armstrong 
Reviewed-by: Kevin Hilman 
Signed-off-by: Jerome Brunet 
Signed-off-by: Linus Walleij

pinctrl: meson: remove unused pin_base

2017-10-11T07:54:14+00:00

While removing the need to have pin_base defined in meson pinctrl
drivers, I forgot to remove the corresponding field from the
pinctrl_data structure.

Fixing this now.

Fixes: 70e5ecb1b994 ("pinctrl: meson: get rid of pin_base")
Signed-off-by: Jerome Brunet 
Reviewed-by: Kevin Hilman 
Signed-off-by: Linus Walleij

pinctrl: meson-gx: add TEST_N i2s pinmux

2017-10-11T07:53:00+00:00

Add TEST_N pinmux for channel 6 and 7 of the i2s output

Signed-off-by: Jerome Brunet 
Reviewed-by: Kevin Hilman 
Signed-off-by: Linus Walleij

pinctrl: meson-gxbb: add missing GPIOX_22 pin

2017-10-05T21:11:02+00:00

GPIOX_22 is declared as a gpio but the id is no present in the pin
table. This hole trigger an error while reading the pingroup debugfs entry

GPIOX_22 is no routed externally. For all we know, it could an internal
pin of SoC

Signed-off-by: Jerome Brunet 
Signed-off-by: Linus Walleij

pinctrl: meson-gx: TEST_N belongs to the AO controller

2017-10-05T21:11:02+00:00

On meson-gx platforms, TEST_N has been incorrectly declared in the EE
controller while it belongs to AO controller.

Move the pin to the appropriate controller

Signed-off-by: Jerome Brunet 
Signed-off-by: Linus Walleij

pinctrl: meson: get rid of pin_base

2017-10-05T21:11:01+00:00

pin_base was used with the manually set pin offset in meson pinctrl. This
is no longer the case, pin_base is 0 on every meson pinctrl controllers
and should go away.

Tested-by: Martin Blumenstingl 
Signed-off-by: Jerome Brunet 
Signed-off-by: Linus Walleij

pinctrl: meson: remove offset from pinctrl

2017-10-05T21:10:49+00:00

Offset on meson pinctrl and gpios is something that was carried from the
vendor driver, where there is a weird link between the 2
controllers. Since these 2 controllers are independent, this offset adds
an unnecessary complexity.

This patch remove this manually set offset and rely on pinctrl to figure
out the gpio base offset

Tested-by: Martin Blumenstingl 
Signed-off-by: Jerome Brunet 
Signed-off-by: Linus Walleij

pinctrl: meson: fix incorrect usage of ENOSYS

2017-09-21T12:18:12+00:00

ENOSYS is special and should only be used for incorrect syscall number.
It is not the case here. let's use ENOTSUPP instead.

Signed-off-by: Jerome Brunet 
Signed-off-by: Linus Walleij

pinctrl: meson-gxl: add tsin_a pins

2017-06-16T09:08:49+00:00

Add Tsin A pins to bank DV and X.
We don't have a driver for the tsin yet but since the tsin A pinmux is
enabled by default at boot time, declaring this pinmux is required to
properly operate on GPIOX.

Without this change, GPIOX 8, 9, 10 and 11 can't be driven as GPIO output
as the tsin A seems to have priority.

Signed-off-by: Jerome Brunet 
Acked-by: Neil Armstrong 
Signed-off-by: Linus Walleij