linux-stable.git/drivers/pinctrl/mediatek, branch v6.10 Linux kernel stable tree Merge tag 'pinctrl-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 2024-05-20T15:51:53+00:00 Linus Torvalds torvalds@linux-foundation.org 2024-05-20T15:51:53+00:00 2de68638aa7c0da594d23b1aa025fc5a801c427e Pull pin control updates from Linus Walleij: "Core changes: - Use DEFINE_SHOW_STORE_ATTRIBUTE() in debugfs entries New drivers: - Qualcomm PMIH0108, PMD8028, PMXR2230 and PM6450 pin control support Improvements: - Serious cleanup of the recently merged aw9523 driver - Fix PIN_CONFIG_BIAS_DISABLE handling in pinctrl-single - A slew of device tree binding cleanups - Support a bus clock in the Samsung driver" * tag 'pinctrl-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits) pinctrl: bcm2835: Make pin freeing behavior configurable dt-bindings: pinctrl: qcom,pmic-gpio: Fix "comptaible" typo for PMIH0108 pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs dt-bindings: pinctrl: mediatek: mt7622: add "antsel" function dt-bindings: pinctrl: mediatek: mt7622: fix array properties pinctrl: samsung: drop redundant drvdata assignment pinctrl: samsung: support a bus clock dt-bindings: pinctrl: samsung: google,gs101-pinctrl needs a clock pinctrl: renesas: rzg2l: Limit 2.5V power supply to Ethernet interfaces pinctrl: renesas: r8a779h0: Add INTC-EX pins, groups, and function pinctrl: renesas: r8a779h0: Fix IRQ suffixes pinctrl: renesas: rzg2l: Remove extra space in function parameter dt-bindings: pinctrl: qcom,pmic-mpp: add support for PM8901 pinctrl: pinconf-generic: print hex value pinctrl: realtek: fix module autoloading pinctrl: qcom: sm7150: fix module autoloading pinctrl: loongson2: fix module autoloading pinctrl: mediatek: fix module autoloading pinctrl: freescale: imx8ulp: fix module autoloading dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes ... 
Pull pin control updates from Linus Walleij:
 "Core changes:

   - Use DEFINE_SHOW_STORE_ATTRIBUTE() in debugfs entries

  New drivers:

   - Qualcomm PMIH0108, PMD8028, PMXR2230 and PM6450 pin control support

  Improvements:

   - Serious cleanup of the recently merged aw9523 driver

   - Fix PIN_CONFIG_BIAS_DISABLE handling in pinctrl-single

   - A slew of device tree binding cleanups

   - Support a bus clock in the Samsung driver"

* tag 'pinctrl-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits)
  pinctrl: bcm2835: Make pin freeing behavior configurable
  dt-bindings: pinctrl: qcom,pmic-gpio: Fix "comptaible" typo for PMIH0108
  pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs
  dt-bindings: pinctrl: mediatek: mt7622: add "antsel" function
  dt-bindings: pinctrl: mediatek: mt7622: fix array properties
  pinctrl: samsung: drop redundant drvdata assignment
  pinctrl: samsung: support a bus clock
  dt-bindings: pinctrl: samsung: google,gs101-pinctrl needs a clock
  pinctrl: renesas: rzg2l: Limit 2.5V power supply to Ethernet interfaces
  pinctrl: renesas: r8a779h0: Add INTC-EX pins, groups, and function
  pinctrl: renesas: r8a779h0: Fix IRQ suffixes
  pinctrl: renesas: rzg2l: Remove extra space in function parameter
  dt-bindings: pinctrl: qcom,pmic-mpp: add support for PM8901
  pinctrl: pinconf-generic: print hex value
  pinctrl: realtek: fix module autoloading
  pinctrl: qcom: sm7150: fix module autoloading
  pinctrl: loongson2: fix module autoloading
  pinctrl: mediatek: fix module autoloading
  pinctrl: freescale: imx8ulp: fix module autoloading
  dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes
  ...
pinctrl: mediatek: fix module autoloading 2024-04-17T08:43:50+00:00 Krzysztof Kozlowski krzk@kernel.org 2024-04-11T06:46:11+00:00 d42005c03a48fbb49d7a5c808992618f398963ca Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20240411064614.7409-2-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded
based on the alias from of_device_id table.  Pin controllers are
considered core components, so usually they are built-in, however these
can be built and used as modules on some generic kernel.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Message-ID: <20240411064614.7409-2-krzk@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: mediatek: paris: Rework support for PIN_CONFIG_{INPUT,OUTPUT}_ENABLE 2024-04-04T13:27:35+00:00 Chen-Yu Tsai wenst@chromium.org 2024-03-27T09:13:34+00:00 c5d3b64c568a344e998830e0e94a7c04e372f89b There is a misinterpretation of some of the PIN_CONFIG_* options in this driver library. PIN_CONFIG_OUTPUT_ENABLE should refer to a buffer or switch in the output direction of the electrical path. The MediaTek hardware does not have such a thing. The driver incorrectly maps this option to the GPIO function's direction. Likewise, PIN_CONFIG_INPUT_ENABLE should refer to a buffer or switch in the input direction. The hardware does have such a mechanism, and is mapped to the IES bit. The driver however sets the direction in addition to the IES bit, which is incorrect. On readback, the IES bit isn't even considered. Ironically, the driver does not support readback for PIN_CONFIG_OUTPUT, while its readback of PIN_CONFIG_{INPUT,OUTPUT}_ENABLE is what it should be doing for PIN_CONFIG_OUTPUT. Rework support for these three options, so that PIN_CONFIG_OUTPUT_ENABLE is completely removed, PIN_CONFIG_INPUT_ENABLE is only linked to the IES bit, and PIN_CONFIG_OUTPUT is linked to the GPIO function's direction and output level. Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20240327091336.3434141-3-wenst@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
There is a misinterpretation of some of the PIN_CONFIG_* options in this
driver library. PIN_CONFIG_OUTPUT_ENABLE should refer to a buffer or
switch in the output direction of the electrical path. The MediaTek
hardware does not have such a thing. The driver incorrectly maps this
option to the GPIO function's direction.

Likewise, PIN_CONFIG_INPUT_ENABLE should refer to a buffer or switch in
the input direction. The hardware does have such a mechanism, and is
mapped to the IES bit. The driver however sets the direction in addition
to the IES bit, which is incorrect. On readback, the IES bit isn't even
considered.

Ironically, the driver does not support readback for PIN_CONFIG_OUTPUT,
while its readback of PIN_CONFIG_{INPUT,OUTPUT}_ENABLE is what it should
be doing for PIN_CONFIG_OUTPUT.

Rework support for these three options, so that PIN_CONFIG_OUTPUT_ENABLE
is completely removed, PIN_CONFIG_INPUT_ENABLE is only linked to the IES
bit, and PIN_CONFIG_OUTPUT is linked to the GPIO function's direction
and output level.

Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Message-ID: <20240327091336.3434141-3-wenst@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: mediatek: paris: Fix PIN_CONFIG_INPUT_SCHMITT_ENABLE readback 2024-04-04T13:27:18+00:00 Chen-Yu Tsai wenst@chromium.org 2024-03-27T09:13:33+00:00 08f66a8edd08f6f7cfa769c81634b29a2b123908 In the generic pin config library, readback of some options are handled differently compared to the setting of those options: the argument value is used to convey enable/disable of an option in the set path, but success or -EINVAL is used to convey if an option is enabled or disabled in the debugfs readback path. PIN_CONFIG_INPUT_SCHMITT_ENABLE is one such option. Fix the readback of the option in the mediatek-paris library, so that the debugfs dump is not showing "input schmitt enabled" for pins that don't have it enabled. Fixes: 1bea6afbc842 ("pinctrl: mediatek: Refine mtk_pinconf_get()") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20240327091336.3434141-2-wenst@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
In the generic pin config library, readback of some options are handled
differently compared to the setting of those options: the argument value
is used to convey enable/disable of an option in the set path, but
success or -EINVAL is used to convey if an option is enabled or disabled
in the debugfs readback path.

PIN_CONFIG_INPUT_SCHMITT_ENABLE is one such option. Fix the readback of
the option in the mediatek-paris library, so that the debugfs dump is
not showing "input schmitt enabled" for pins that don't have it enabled.

Fixes: 1bea6afbc842 ("pinctrl: mediatek: Refine mtk_pinconf_get()")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Message-ID: <20240327091336.3434141-2-wenst@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: mediatek: Drop bogus slew rate register range for MT8192 2024-02-07T10:47:49+00:00 Chen-Yu Tsai wenst@chromium.org 2024-01-31T07:19:08+00:00 e15ab05a6b3ed42f2f43f8bd1a1abdbde64afecd The MT8192 does not support configuring pin slew rate. This is evident from both the datasheet, and the fact that the driver points the slew rate register range at the GPIO direction register range. Drop the bogus setting. Fixes: d32f38f2a8fc ("pinctrl: mediatek: Add pinctrl driver for mt8192") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240131071910.3950450-2-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The MT8192 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.

Drop the bogus setting.

Fixes: d32f38f2a8fc ("pinctrl: mediatek: Add pinctrl driver for mt8192")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240131071910.3950450-2-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: mediatek: Drop bogus slew rate register range for MT8186 2024-02-07T10:47:49+00:00 Chen-Yu Tsai wenst@chromium.org 2024-01-31T07:19:07+00:00 3a29c87548809405bcbc66acc69cbe6f15184d94 The MT8186 does not support configuring pin slew rate. This is evident from both the datasheet, and the fact that the driver points the slew rate register range at the GPIO direction register range. Drop the bogus setting. Fixes: 8b483bda1e46 ("pinctrl: add pinctrl driver on mt8186") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240131071910.3950450-1-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The MT8186 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.

Drop the bogus setting.

Fixes: 8b483bda1e46 ("pinctrl: add pinctrl driver on mt8186")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240131071910.3950450-1-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: mediatek: mt7981: add additional emmc groups 2024-01-27T23:52:31+00:00 Jean Thomas jean.thomas@wifirst.fr 2024-01-17T14:55:47+00:00 8714b3414dd6070609fabdd73a70e5f818f77f24 Add new emmc groups in the pinctrl driver for the MediaTek MT7981 SoC: * emmc reset, with pin 15. * emmc 4-bit bus-width, with pins 16 to 19, and 24 to 25. * emmc 8-bit bus-width, with pins 16 to 25. The existing emmc_45 group is kept for legacy reasons, even if this is the union of emmc_reset and emmc_8 groups. Signed-off-by: Jean Thomas <jean.thomas@wifirst.fr> Reviewed-by: Daniel Golle <daniel@makrotopia.org> Link: https://lore.kernel.org/r/20240117145547.3354242-1-jean.thomas@wifirst.fr Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add new emmc groups in the pinctrl driver for the
MediaTek MT7981 SoC:
* emmc reset, with pin 15.
* emmc 4-bit bus-width, with pins 16 to 19, and 24 to 25.
* emmc 8-bit bus-width, with pins 16 to 25.

The existing emmc_45 group is kept for legacy reasons, even
if this is the union of emmc_reset and emmc_8 groups.

Signed-off-by: Jean Thomas <jean.thomas@wifirst.fr>
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/20240117145547.3354242-1-jean.thomas@wifirst.fr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: mediatek: mt7981: add additional uart group 2024-01-27T23:52:08+00:00 Jean Thomas jean.thomas@wifirst.fr 2024-01-17T12:42:33+00:00 398f914bf0022dcde82050aab72a2bd842ee1709 Add uart1_3 (pins 26, 27) group to the pinctrl driver for the MediaTek MT7981 SoC. Signed-off-by: Jean Thomas <jean.thomas@wifirst.fr> Reviewed-by: Daniel Golle <daniel@makrotopia.org> Link: https://lore.kernel.org/r/20240117124234.3137050-1-jean.thomas@wifirst.fr Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add uart1_3 (pins 26, 27) group to the pinctrl driver for the
MediaTek MT7981 SoC.

Signed-off-by: Jean Thomas <jean.thomas@wifirst.fr>
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/20240117124234.3137050-1-jean.thomas@wifirst.fr
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: mt7986: excise kernel-doc warnings 2024-01-27T23:36:50+00:00 Randy Dunlap rdunlap@infradead.org 2024-01-11T04:51:26+00:00 13931e5d8faf72609688092252140efd21269bde Fix kernel-doc warnings for enum (anonymous): the enum values are not documented, so don't indicate that the comment contains kernel-doc notation. pinctrl-mt7986.c:68: warning: Enum value 'GPIO_BASE' not described in enum '(anonymous)' pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_RT_BASE' not described in enum '(anonymous)' pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_RB_BASE' not described in enum '(anonymous)' pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_LT_BASE' not described in enum '(anonymous)' pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_LB_BASE' not described in enum '(anonymous)' pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_TR_BASE' not described in enum '(anonymous)' pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_TL_BASE' not described in enum '(anonymous)' Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312110210.x3vxq42A-lkp@intel.com/ Cc: Linus Walleij <linus.walleij@linaro.org> Cc: <linux-gpio@vger.kernel.org> Cc: Sean Wang <sean.wang@kernel.org> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: <linux-mediatek@lists.infradead.org> Cc: <linux-arm-kernel@lists.infradead.org> Link: https://lore.kernel.org/r/20240111045126.13768-1-rdunlap@infradead.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Fix kernel-doc warnings for enum (anonymous): the enum values are not
documented, so don't indicate that the comment contains kernel-doc
notation.

pinctrl-mt7986.c:68: warning: Enum value 'GPIO_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_RT_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_RB_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_LT_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_LB_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_TR_BASE' not described in enum '(anonymous)'
pinctrl-mt7986.c:68: warning: Enum value 'IOCFG_TL_BASE' not described in enum '(anonymous)'

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202312110210.x3vxq42A-lkp@intel.com/
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc:  <linux-gpio@vger.kernel.org>
Cc: Sean Wang <sean.wang@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc:  <linux-mediatek@lists.infradead.org>
Cc:  <linux-arm-kernel@lists.infradead.org>
Link: https://lore.kernel.org/r/20240111045126.13768-1-rdunlap@infradead.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: mediatek: Convert to use grp member 2023-12-11T23:47:52+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2023-12-11T18:58:03+00:00 a1cf1a5f9b60fbccd96b24ec295e50a84cc0c503 Convert drivers to use grp member embedded in struct group_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin group description. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231211190321.307330-11-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Convert drivers to use grp member embedded in struct group_desc,
because other members will be removed to avoid duplication and
desynchronisation of the generic pin group description.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20231211190321.307330-11-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>