linux-stable.git/drivers/pinctrl/mediatek, branch linux-6.0.y

pinctrl: mediatek: fix the pinconf register offset of some pins

2022-12-31T12:25:57+00:00

[ Upstream commit 3476b354c65db442580ef355885c69e60c546ef0 ]

Correct the bias-pull-up, bias-pull-down and bias-disable register
offset of mt7986 pin-42 to pin-49, in the original driver, the
relative offset value was erroneously decremented by 1.

Fixes: 360de6728064 ("pinctrl: mediatek: add support for MT7986 SoC")
Signed-off-by: Sam Shih 
Signed-off-by: Frank Wunderlich 
Reviewed-by: AngeloGioacchino Del Regno 
Link: https://lore.kernel.org/r/20221106080114.7426-5-linux@fw-web.de
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: meditatek: Startup with the IRQs disabled

2022-12-19T11:41:02+00:00

[ Upstream commit 11780e37565db4dd064d3243ca68f755c13f65b4 ]

If the system is restarted via kexec(), the peripherals do not start
with a known state.

If the previous system had enabled an IRQs we will receive unexected
IRQs that can lock the system.

[   28.109251] watchdog: BUG: soft lockup - CPU#0 stuck for 26s!
[swapper/0:0]
[   28.109263] Modules linked in:
[   28.109273] CPU: 0 PID: 0 Comm: swapper/0 Not tainted
5.15.79-14458-g4b9edf7b1ac6 #1 9f2e76613148af94acccd64c609a552fb4b4354b
[   28.109284] Hardware name: Google Elm (DT)
[   28.109290] pstate: 40400005 (nZcv daif +PAN -UAO -TCO -DIT -SSBS
		BTYPE=--)
[   28.109298] pc : __do_softirq+0xa0/0x388
[   28.109309] lr : __do_softirq+0x70/0x388
[   28.109316] sp : ffffffc008003ee0
[   28.109321] x29: ffffffc008003f00 x28: 000000000000000a x27:
0000000000000080
[   28.109334] x26: 0000000000000001 x25: ffffffefa7b350c0 x24:
ffffffefa7b47480
[   28.109346] x23: ffffffefa7b3d000 x22: 0000000000000000 x21:
ffffffefa7b0fa40
[   28.109358] x20: ffffffefa7b005b0 x19: ffffffefa7b47480 x18:
0000000000065b6b
[   28.109370] x17: ffffffefa749c8b0 x16: 000000000000018c x15:
00000000000001b8
[   28.109382] x14: 00000000000d3b6b x13: 0000000000000006 x12:
0000000000057e91
[   28.109394] x11: 0000000000000000 x10: 0000000000000000 x9 :
ffffffefa7b47480
[   28.109406] x8 : 00000000000000e0 x7 : 000000000f424000 x6 :
0000000000000000
[   28.109418] x5 : ffffffefa7dfaca0 x4 : ffffffefa7dfadf0 x3 :
000000000000000f
[   28.109429] x2 : 0000000000000000 x1 : 0000000000000100 x0 :
0000000001ac65c5
[   28.109441] Call trace:
[   28.109447]  __do_softirq+0xa0/0x388
[   28.109454]  irq_exit+0xc0/0xe0
[   28.109464]  handle_domain_irq+0x68/0x90
[   28.109473]  gic_handle_irq+0xac/0xf0
[   28.109480]  call_on_irq_stack+0x28/0x50
[   28.109488]  do_interrupt_handler+0x44/0x58
[   28.109496]  el1_interrupt+0x30/0x58
[   28.109506]  el1h_64_irq_handler+0x18/0x24
[   28.109512]  el1h_64_irq+0x7c/0x80
[   28.109519]  arch_local_irq_enable+0xc/0x18
[   28.109529]  default_idle_call+0x40/0x140
[   28.109539]  do_idle+0x108/0x290
[   28.109547]  cpu_startup_entry+0x2c/0x30
[   28.109554]  rest_init+0xe8/0xf8
[   28.109562]  arch_call_rest_init+0x18/0x24
[   28.109571]  start_kernel+0x338/0x42c
[   28.109578]  __primary_switched+0xbc/0xc4
[   28.109588] Kernel panic - not syncing: softlockup: hung tasks

Signed-off-by: Ricardo Ribalda 
Link: https://lore.kernel.org/r/20221122-mtk-pinctrl-v1-1-bedf5655a3d2@chromium.org
Reviewed-by: AngeloGioacchino Del Regno 
Reviewed-by: Matthias Brugger 
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: mediatek: common-v2: Fix bias-disable for PULL_PU_PD_RSEL_TYPE

2022-11-26T08:27:30+00:00

[ Upstream commit fed74d75277da865da9ba334d3f5d5e3e327971d ]

In pinctrl-paris we're calling the .bias_set_combo() callback when we
are asked to set the pin bias to either pull up/down or pull disable.

On newer platforms, this callback is mtk_pinconf_bias_set_combo(),
located in pinctrl-mtk-common-v2.c: this will check the "pull type"
assigned to the requested pin and in case said pin's pull type is
MTK_PULL_PU_PD_RSEL_TYPE, this function will set RSEL first, PUPD
last, which is fine.

The issue comes when we're requesting PIN_CONFIG_BIAS_DISABLE, as
this does *not* require setting RSEL but only PU_PD: in this case,
the arg is MTK_DISABLE (zero), which is not a supported RSEL, due
to which function mtk_pinconf_bias_set_rsel() returns a failure;
because of that, mtk_pinconf_bias_set_pu_pd() is never called,
hence the pin bias is never set to DISABLE.

To fix this issue, add a check to mtk_pinconf_bias_set_rsel(): if
we are entering that function with no pullup requested and at the
same time the arg is MTK_DISABLE, this means that we're trying to
disable pin bias, hence it's safe to return cleanly without ever
setting any RSEL register.
This makes mtk_pinconf_bias_set_combo() happy, going on with setting
the PU_PD registers, which is the only action to actually take to
disable bias on a pin/pingroup.

Fixes: fb34a9ae383a ("pinctrl: mediatek: support rsel feature")
Signed-off-by: AngeloGioacchino Del Regno 
Link: https://lore.kernel.org/r/20221104105605.33720-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij 
Signed-off-by: Sasha Levin

pinctrl: mediatek: mt8192: Fix compile warnings

2022-06-26T23:56:52+00:00

After applying patches I get these warnings:

  drivers/pinctrl/mediatek/pinctrl-mt8192.c:1302:56:
  warning: "/*" within comment [-Wcomment]
  drivers/pinctrl/mediatek/pinctrl-mt8192.c:1362:56:
  warning: "/*" within comment [-Wcomment]

Something is wrong with the missing end-slashes. Add them.

Cc: Guodong Liu 
Cc: Nícolas F. R. A. Prado 
Signed-off-by: Linus Walleij

pinctrl: mediatek: fix the pinconf definition of some GPIO pins

2022-06-25T23:25:14+00:00

Remove pin definitions that do not support the R0 & R1 pinconfig property.

Signed-off-by: Guodong Liu 
Reviewed-by: Nícolas F. R. A. Prado 
Tested-by: Nícolas F. R. A. Prado 
Link: https://lore.kernel.org/r/20220624133700.15487-6-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij

pinctrl: mediatek: dropping original advanced drive configuration function

2022-06-25T23:25:13+00:00

Function bias_combo getter/setters already handle all cases advanced drive
configuration, include drive for I2C related pins.

Signed-off-by: Guodong Liu 
Reviewed-by: Nícolas F. R. A. Prado 
Tested-by: Nícolas F. R. A. Prado 
Link: https://lore.kernel.org/r/20220624133700.15487-5-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij

pinctrl: mediatek: add rsel setting on mt8192

2022-06-25T23:25:13+00:00

1. I2C pins's resistance value can be controlled by rsel register.
This patch provides rsel (resistance selection) setting on mt8192.
2. Also add the missing pull type array for mt8192 to document the
pull type of each pin and prevent invalid pull type settings.

Signed-off-by: Guodong Liu 
Reviewed-by: Nícolas F. R. A. Prado 
Tested-by: Nícolas F. R. A. Prado 
Link: https://lore.kernel.org/r/20220624133700.15487-4-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij

pinctrl: mediatek: add drive for I2C related pins on mt8192

2022-06-25T23:25:13+00:00

This patch provides the advanced drive raw data setting version
for I2C used pins on mt8192.

Signed-off-by: Guodong Liu 
Reviewed-by: Nícolas F. R. A. Prado 
Tested-by: Nícolas F. R. A. Prado 
Link: https://lore.kernel.org/r/20220624133700.15487-3-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij

pinctrl: mediatek: add generic driving setup property on mt8192

2022-06-25T23:25:13+00:00

1. The dt-binding expects that drive-strength arguments be passed
in mA, but the driver was expecting raw values. And that this
commit changes the driver so that it is aligned with the binding.
2. This commit provides generic driving setup, which support
2/4/6/8/10/12/14/16mA driving, original driver just set raw data
setup setting when use drive-strength property.

Signed-off-by: Guodong Liu 
Reviewed-by: Nícolas F. R. A. Prado 
Tested-by: Nícolas F. R. A. Prado 
Link: https://lore.kernel.org/r/20220624133700.15487-2-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij

Merge tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2022-05-28T18:15:54+00:00

Pull pin control updates from Linus Walleij:
"Pretty big this time. Mostly due to (nice) Renesas refactorings.

Core changes:

- New helpers from Andy such as for_each_gpiochip_node() affecting
both GPIO and pin control, improving a bunch of drivers in the
process.

- Pulled in Marc Zyngiers work to make IRQ chips immutable, and
started to apply fixups on top.

New drivers:

- New driver for Marvell MVEBU 98DX2530.

- New driver for Mediatek MT8195.

- Support Qualcomm PMX65 and PM6125.

- New driver for Qualcomm SC7280 LPASS pin control.

- New driver for Rockchip RK3588.

- New driver for NXP Freescale i.MXRT1170.

- New driver for Mediatek MT6795 Helio X10.

Improvements:

- Several Aspeed G6 cleanups and non-critical fixes.

- Thorought refactoring of some of the ever improving Renesas
drivers.

- Clean up Mediatek MT8192 bindings a bit.

- PWM output and clock monitoring in the Ocelot LAN966x driver.

- Thorough refactoring and cleanup of the Ralink drivers such as
RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into
proper sub-drivers"

* tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (161 commits)
pinctrl: apple: Use a raw spinlock for the regmap
pinctrl: berlin: bg4ct: Use devm_platform_*ioremap_resource() APIs
pinctrl: intel: Fix kernel doc format, i.e. add return sections
dt-bindings: pinctrl: qcom: Drop 'maxItems' on 'wakeup-parent'
pinctrl: starfive: Make the irqchip immutable
pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10
dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings
pinctrl: freescale: Add i.MXRT1170 pinctrl driver support
dt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation
dt-bindings: pinctrl: rockchip: increase max amount of device functions
dt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges'
dt-bindings: pinctrl: qcom,pmic-gpio: add 'input-disable'
dt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names
dt-bindings: pinctrl: qcom,pmic-gpio: fix matching pin config
dt-bindings: pinctrl: qcom,pmic-gpio: document PM8150L and PMM8155AU
pinctrl: qcom: spmi-gpio: Add pm6125 compatible
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm6125 compatible
pinctrl: intel: Drop unused irqchip member in struct intel_pinctrl
pinctrl: intel: make irq_chip immutable
pinctrl: cherryview: Use GPIO chip pointer in chv_gpio_irq_mask_unmask()
...