linux-stable.git/drivers/pinctrl/intel, branch v5.3.11

pinctrl: cherryview: Fix irq_valid_mask calculation

2019-11-12T18:28:20+00:00

[ Upstream commit 63bdef6cd6941917c823b9cc9aa0219d19fcb716 ]

Commit 03c4749dd6c7 ("gpio / ACPI: Drop unnecessary ACPI GPIO to Linux
GPIO translation") has made the cherryview gpio numbers sparse, to get
a 1:1 mapping between ACPI pin numbers and gpio numbers in Linux.

This has greatly simplified things, but the code setting the
irq_valid_mask was not updated for this, so the valid mask is still in
the old "compressed" numbering with the gaps in the pin numbers skipped,
which is wrong as irq_valid_mask needs to be expressed in gpio numbers.

This results in the following error on devices using pin 24 (0x0018) on
the north GPIO controller as an ACPI event source:

[    0.422452] cherryview-pinctrl INT33FF:01: Failed to translate GPIO to IRQ

This has been reported (by email) to be happening on a Caterpillar CAT T20
tablet and I've reproduced this myself on a Medion Akoya e2215t 2-in-1.

This commit uses the pin number instead of the compressed index into
community->pins to clear the correct bits in irq_valid_mask for GPIOs
using GPEs for interrupts, fixing these errors and in case of the
Medion Akoya e2215t also fixing the LID switch not working.

Cc: stable@vger.kernel.org
Fixes: 03c4749dd6c7 ("gpio / ACPI: Drop unnecessary ACPI GPIO to Linux GPIO translation")
Signed-off-by: Hans de Goede 
Reviewed-by: Andy Shevchenko 
Signed-off-by: Mika Westerberg 
Signed-off-by: Sasha Levin

pinctrl: intel: Avoid potential glitches if pin is in GPIO mode

2019-11-12T18:27:00+00:00

commit 29c2c6aa32405dfee4a29911a51ba133edcedb0f upstream.

When consumer requests a pin, in order to be on the safest side,
we switch it first to GPIO mode followed by immediate transition
to the input state. Due to posted writes it's luckily to be a single
I/O transaction.

However, if firmware or boot loader already configures the pin
to the GPIO mode, user expects no glitches for the requested pin.
We may check if the pin is pre-configured and leave it as is
till the actual consumer toggles its state to avoid glitches.

Fixes: 7981c0015af2 ("pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support")
Depends-on: f5a26acf0162 ("pinctrl: intel: Initialize GPIO properly when used through irqchip")
Cc: stable@vger.kernel.org
Cc: fei.yang@intel.com
Reported-by: Oliver Barta 
Reported-by: Malin Jonsson 
Signed-off-by: Andy Shevchenko 
Signed-off-by: Mika Westerberg 
Signed-off-by: Greg Kroah-Hartman

pinctrl: intel: Allocate IRQ chip dynamic

2019-11-10T10:33:51+00:00

[ Upstream commit 57ff2df1b952c7934d7b0e1d3a2ec403ec76edec ]

Keeping the IRQ chip definition static shares it with multiple instances of
the GPIO chip in the system. This is bad and now we get this warning from
GPIO library:

"detected irqchip that is shared with multiple gpiochips: please fix the driver."

Hence, move the IRQ chip definition from being driver static into the struct
intel_pinctrl. So a unique IRQ chip is used for each GPIO chip instance.

Fixes: ee1a6ca43dba ("pinctrl: intel: Add Intel Broxton pin controller support")
Depends-on: 5ff56b015e85 ("pinctrl: intel: Disable GPIO pin interrupts in suspend")
Reported-by: Federico Ricchiuto 
Suggested-by: Mika Westerberg 
Signed-off-by: Andy Shevchenko 
Signed-off-by: Mika Westerberg 
Signed-off-by: Sasha Levin

pinctrl: cherryview: restore Strago DMI workaround for all versions

2019-10-29T08:22:41+00:00

commit 260996c30f4f3a732f45045e3e0efe27017615e4 upstream.

This is essentially a revert of:

e3f72b749da2 pinctrl: cherryview: fix Strago DMI workaround
86c5dd6860a6 pinctrl: cherryview: limit Strago DMI workarounds to version 1.0

because even with 1.1 versions of BIOS there are some pins that are
configured as interrupts but not claimed by any driver, and they
sometimes fire up and result in interrupt storms that cause touchpad
stop functioning and other issues.

Given that we are unlikely to qualify another firmware version for a
while it is better to keep the workaround active on all Strago boards.

Reported-by: Alex Levin 
Fixes: 86c5dd6860a6 ("pinctrl: cherryview: limit Strago DMI workarounds to version 1.0")
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Torokhov 
Reviewed-by: Andy Shevchenko 
Tested-by: Alex Levin 
Signed-off-by: Mika Westerberg 
Signed-off-by: Greg Kroah-Hartman

Merge tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2019-07-13T22:02:27+00:00

Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.3 kernel cycle:

Core changes:

- Device links can optionally be added between a pin control producer
and its consumers. This will affect how the system power management
is handled: a pin controller will not suspend before all of its
consumers have been suspended.

This was necessary for the ST Microelectronics STMFX expander and
need to be tested on other systems as well: it makes sense to make
this default in the long run.

Right now it is opt-in per driver.

- Drive strength can be specified in microamps. With decreases in
silicon technology, milliamps isn't granular enough, let's make it
possible to select drive strengths in microamps.

Right now the Meson (AMlogic) driver needs this.

New drivers:

- New subdriver for the Tegra 194 SoC.

- New subdriver for the Qualcomm SDM845.

- New subdriver for the Qualcomm SM8150.

- New subdriver for the Freescale i.MX8MN (Freescale is now a product
line of NXP).

- New subdriver for Marvell MV98DX1135.

Driver improvements:

- The Bitmain BM1880 driver now supports pin config in addition to
muxing.

- The Qualcomm drivers can now reserve some GPIOs as taken aside and
not usable for users. This is used in ACPI systems to take out some
GPIO lines used by the BIOS so that noone else (neither kernel nor
userspace) will play with them by mistake and crash the machine.

- A slew of refurbishing around the Aspeed drivers (board management
controllers for servers) in preparation for the new Aspeed AST2600
SoC.

- A slew of improvements over the SH PFC drivers as usual.

- Misc cleanups and fixes"

* tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits)
pinctrl: aspeed: Strip moved macros and structs from private header
pinctrl: aspeed: Fix missed include
pinctrl: baytrail: Use GENMASK() consistently
pinctrl: baytrail: Re-use data structures from pinctrl-intel.h
pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux()
pinctrl: qcom: Add SM8150 pinctrl driver
dt-bindings: pinctrl: qcom: Add SM8150 pinctrl binding
dt-bindings: pinctrl: qcom: Document missing gpio nodes
pinctrl: aspeed: Add implementation-related documentation
pinctrl: aspeed: Split out pinmux from general pinctrl
pinctrl: aspeed: Clarify comment about strapping W1C
pinctrl: aspeed: Correct comment that is no longer true
MAINTAINERS: Add entry for ASPEED pinctrl drivers
dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema
dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema
dt-bindings: pinctrl: aspeed: Split bindings document in two
pinctrl: qcom: Add irq_enable callback for msm gpio
pinctrl: madera: Fixup SPDX headers
pinctrl: qcom: sdm845: Fix CONFIG preprocessor guard
pinctrl: tegra: Add bitmask support for parked bits
...

pinctrl: baytrail: Use GENMASK() consistently

2019-07-04T07:58:13+00:00

Use GENMASK() macro for all definitions where it's appropriate.
No functional change intended.

Signed-off-by: Andy Shevchenko 
Link: https://lore.kernel.org/r/20190703151554.30454-1-andriy.shevchenko@linux.intel.com
Acked-by: Mika Westerberg 
Signed-off-by: Linus Walleij

pinctrl: baytrail: Re-use data structures from pinctrl-intel.h

2019-07-04T07:51:24+00:00

We have some data structures duplicated across the drivers.
Let's deduplicate them by using ones that being provided by
pinctrl-intel.h.

Signed-off-by: Andy Shevchenko 
Link: https://lore.kernel.org/r/20190703003018.75186-2-andriy.shevchenko@linux.intel.com
Acked-by: Mika Westerberg 
Signed-off-by: Linus Walleij

pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux()

2019-07-04T07:48:49+00:00

By the fact byt_get_gpio_mux() returns a value of mux settings as
it is represented in hardware. Use defined macro instead of magic numbers
to clarify this.

Signed-off-by: Andy Shevchenko 
Link: https://lore.kernel.org/r/20190703003018.75186-1-andriy.shevchenko@linux.intel.com
Reviewed-By: Enrico Weigelt 
Acked-by: Mika Westerberg 
Signed-off-by: Linus Walleij

pinctrl: intel: Clear interrupt status in mask/unmask callback

2019-05-20T12:04:25+00:00

Commit a939bb57cd47 ("pinctrl: intel: implement gpio_irq_enable") was
added because clearing interrupt status bit is required to avoid
unexpected behavior.

Turns out the unmask callback also needs the fix, which can solve weird
IRQ triggering issues on I2C touchpad ELAN1200.

Signed-off-by: Kai-Heng Feng 
Signed-off-by: Andy Shevchenko

pinctrl: intel: Use GENMASK() consistently

2019-05-20T12:04:25+00:00

Use GENMASK() macro for all definitions.
No functional change intended.

Signed-off-by: Andy Shevchenko