<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/pinctrl/Makefile, branch v4.1</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>pinctrl: add AMD GPIO driver support.</title>
<updated>2015-03-18T01:02:21+00:00</updated>
<author>
<name>Ken Xue</name>
<email>Ken.Xue@amd.com</email>
</author>
<published>2015-03-10T07:02:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=dbad75dd1f25e0107c643d42774a7f9a8ba85e9b'/>
<id>dbad75dd1f25e0107c643d42774a7f9a8ba85e9b</id>
<content type='text'>
KERNCZ GPIO is a new IP from AMD. it can be implemented in both x86 and ARM.
Current driver patch only support GPIO in x86.

Signed-off-by: Ken Xue &lt;Ken.Xue@amd.com&gt;
[Moved back to &lt;linux/gpio.h&gt; header]
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
KERNCZ GPIO is a new IP from AMD. it can be implemented in both x86 and ARM.
Current driver patch only support GPIO in x86.

Signed-off-by: Ken Xue &lt;Ken.Xue@amd.com&gt;
[Moved back to &lt;linux/gpio.h&gt; header]
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: mediatek: Add Pinctrl/GPIO driver for mt8135.</title>
<updated>2015-03-18T01:02:14+00:00</updated>
<author>
<name>Hongzhou Yang</name>
<email>hongzhou.yang@mediatek.com</email>
</author>
<published>2015-01-21T05:28:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a6df410d420aa4ff316797d352f69e7ebae5ff98'/>
<id>a6df410d420aa4ff316797d352f69e7ebae5ff98</id>
<content type='text'>
The mediatek SoCs have GPIO controller that handle both the muxing and GPIOs.

The GPIO controller have pinmux, pull enable, pull select, direction and output high/low control.

This driver include common driver and mt8135 part.
The common driver include the pinctrl driver and GPIO driver.
The mt8135 part contain its special device data.

Signed-off-by: Hongzhou Yang &lt;hongzhou.yang@mediatek.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The mediatek SoCs have GPIO controller that handle both the muxing and GPIOs.

The GPIO controller have pinmux, pull enable, pull select, direction and output high/low control.

This driver include common driver and mt8135 part.
The common driver include the pinctrl driver and GPIO driver.
The mt8135 part contain its special device data.

Signed-off-by: Hongzhou Yang &lt;hongzhou.yang@mediatek.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: bcm: consolidate Broadcom pinctrl drivers</title>
<updated>2015-03-18T01:02:12+00:00</updated>
<author>
<name>Ray Jui</name>
<email>rjui@broadcom.com</email>
</author>
<published>2015-03-05T00:35:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b17f2f9b86f4d44b1d90abf5f1d8de423a74c772'/>
<id>b17f2f9b86f4d44b1d90abf5f1d8de423a74c772</id>
<content type='text'>
Consolidate Broadcom pinctrl drivers into drivers/pinctrl/bcm/*

Signed-off-by: Ray Jui &lt;rjui@broadcom.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Consolidate Broadcom pinctrl drivers into drivers/pinctrl/bcm/*

Signed-off-by: Ray Jui &lt;rjui@broadcom.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: tegra: add a driver for Tegra210</title>
<updated>2015-03-09T17:10:59+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2015-02-24T21:00:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9184f756908ace8213099f21870b07491a7138a9'/>
<id>9184f756908ace8213099f21870b07491a7138a9</id>
<content type='text'>
Tegra210's pinmux supports a different set of pins/options than earlier
SoCs, so requires its own driver (well, table of pin-specific data).

Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Tested-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tegra210's pinmux supports a different set of pins/options than earlier
SoCs, so requires its own driver (well, table of pin-specific data).

Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Tested-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: add driver for Amlogic Meson SoCs</title>
<updated>2015-01-26T08:13:00+00:00</updated>
<author>
<name>Beniamino Galvani</name>
<email>b.galvani@gmail.com</email>
</author>
<published>2015-01-17T18:15:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=6ac730951104a437bf828683bcf9ba66336c4fa7'/>
<id>6ac730951104a437bf828683bcf9ba66336c4fa7</id>
<content type='text'>
This is a driver for the pinmux and GPIO controller available in
Amlogic Meson SoCs. It currently supports only Meson8, however the
common code should be generic enough to work also for other SoCs after
having defined the proper set of functions and groups.

GPIO interrupts are not supported at the moment due to lack of
documentation.

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is a driver for the pinmux and GPIO controller available in
Amlogic Meson SoCs. It currently supports only Meson8, however the
common code should be generic enough to work also for other SoCs after
having defined the proper set of functions and groups.

GPIO interrupts are not supported at the moment due to lack of
documentation.

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: Add driver for Zynq</title>
<updated>2015-01-11T21:35:19+00:00</updated>
<author>
<name>Soren Brinkmann</name>
<email>soren.brinkmann@xilinx.com</email>
</author>
<published>2015-01-09T15:43:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=add958cee967df0a6d003e59b104ba9a6f263e00'/>
<id>add958cee967df0a6d003e59b104ba9a6f263e00</id>
<content type='text'>
This adds a pin-control driver for Zynq.

Changes since v2:
- driver-specific DT properties are passed to the core in two arrays,
  one for the actual DT parsing one for the debugfs representation.
  Issue a compiler warning when the number of entries is not the same
  for both arrays.

Changes since v1:
 - fix EMIO_SD1_CD pin name
 - add USB to pinmux options

changes since RFCv2:
 - let Zynq select PINCTRL_ZYNQ. Boot hangs when pinctrl information is
   present in DT but no driver available.
 - add #defines to get rid of magical constants
 - add commas at end of initializers
 - separate changes in mach-zynq in separate patch
 - add driver specific io-standard DT property
 - refactored pinconf set function to not require arguments for
   argument-less properties
 - squash other patches in
   - support for IO-standard property
   - support for low-power mode property
   - migration to pinconf_generic_dt_node_to_map_all()
 - use newly created infrastructure to add pass driver-specific DT
   params to pinconf-generic

changes since RFC:
 - use syscon/regmap to access registers in SLCR space
 - rebase to 3.18: rename enable -&gt; set_mux
 - add kernel-doc
 - support pinconf
   - supported attributes
     - pin-bias: pull up, tristate, disable
     - slew-rate: 0 == slow, 1 == fast; generic pinconf does not display
       argument

Signed-off-by: Soren Brinkmann &lt;soren.brinkmann@xilinx.com&gt;
Tested-by: Andreas FÃ¤rber &lt;afaerber@suse.de&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds a pin-control driver for Zynq.

Changes since v2:
- driver-specific DT properties are passed to the core in two arrays,
  one for the actual DT parsing one for the debugfs representation.
  Issue a compiler warning when the number of entries is not the same
  for both arrays.

Changes since v1:
 - fix EMIO_SD1_CD pin name
 - add USB to pinmux options

changes since RFCv2:
 - let Zynq select PINCTRL_ZYNQ. Boot hangs when pinctrl information is
   present in DT but no driver available.
 - add #defines to get rid of magical constants
 - add commas at end of initializers
 - separate changes in mach-zynq in separate patch
 - add driver specific io-standard DT property
 - refactored pinconf set function to not require arguments for
   argument-less properties
 - squash other patches in
   - support for IO-standard property
   - support for low-power mode property
   - migration to pinconf_generic_dt_node_to_map_all()
 - use newly created infrastructure to add pass driver-specific DT
   params to pinconf-generic

changes since RFC:
 - use syscon/regmap to access registers in SLCR space
 - rebase to 3.18: rename enable -&gt; set_mux
 - add kernel-doc
 - support pinconf
   - supported attributes
     - pin-bias: pull up, tristate, disable
     - slew-rate: 0 == slow, 1 == fast; generic pinconf does not display
       argument

Signed-off-by: Soren Brinkmann &lt;soren.brinkmann@xilinx.com&gt;
Tested-by: Andreas FÃ¤rber &lt;afaerber@suse.de&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: pass -DDEBUG in subdirs</title>
<updated>2015-01-10T21:52:01+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2015-01-10T21:47:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e2821bee40bec00aed5abffa446a5ac3738b041e'/>
<id>e2821bee40bec00aed5abffa446a5ac3738b041e</id>
<content type='text'>
When drivers are compiled in subdirectories the -DDEBUG flag need
to be passed in the individual Makefiles.

Reported-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Suggested-by: Yingjoe Chen &lt;yingjoe.chen@mediatek.com&gt;
Cc: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When drivers are compiled in subdirectories the -DDEBUG flag need
to be passed in the individual Makefiles.

Reported-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Suggested-by: Yingjoe Chen &lt;yingjoe.chen@mediatek.com&gt;
Cc: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: Move Intel Baytrail pinctrl driver under intel directory</title>
<updated>2014-10-29T09:35:20+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2014-10-24T12:16:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=5fae8b86fdf083bc43bf759abad6661be9d0b9ac'/>
<id>5fae8b86fdf083bc43bf759abad6661be9d0b9ac</id>
<content type='text'>
We are going to have more pinctrl drivers for Intel hardware so separate
all our pin controller drivers to own directory.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We are going to have more pinctrl drivers for Intel hardware so separate
all our pin controller drivers to own directory.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: imx/mxs: move freescale drivers to subdir</title>
<updated>2014-09-04T08:05:28+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2014-09-03T11:37:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=edad3b2a57082f6166b4f13445f70e8d3fc415fb'/>
<id>edad3b2a57082f6166b4f13445f70e8d3fc415fb</id>
<content type='text'>
This moves all the Freescale-related drivers (i.MX and MXS) to
its own subdirectory to clear the view.

Cc: Alexander Shiyan &lt;shc_work@mail.ru&gt;
Cc: Anson Huang &lt;b20788@freescale.com&gt;
Cc: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Cc: Denis Carikli &lt;denis@eukrea.com&gt;
Cc: Markus Pargmann &lt;mpa@pengutronix.de&gt;
Cc: Greg Ungerer &lt;gerg@uclinux.org&gt;
Cc: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Acked-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This moves all the Freescale-related drivers (i.MX and MXS) to
its own subdirectory to clear the view.

Cc: Alexander Shiyan &lt;shc_work@mail.ru&gt;
Cc: Anson Huang &lt;b20788@freescale.com&gt;
Cc: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Cc: Denis Carikli &lt;denis@eukrea.com&gt;
Cc: Markus Pargmann &lt;mpa@pengutronix.de&gt;
Cc: Greg Ungerer &lt;gerg@uclinux.org&gt;
Cc: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Acked-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: use a saner Kconfig symbol</title>
<updated>2014-09-02T08:53:05+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2014-08-29T12:39:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a198420028bb6ddb1930dddc3602a3e9b4803ed5'/>
<id>a198420028bb6ddb1930dddc3602a3e9b4803ed5</id>
<content type='text'>
There is currently a kludge to get the Makefile to move down
to sh-pfc:s drivers: the arch definitions are used twice to
get it done. However we can very well use the Kconfig symbol
for the SH PFC pin control feature itself: it doesn't matter
that it comes from a lower leaf in the Kconfig hierarchy which
is completely orthogonal.

Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is currently a kludge to get the Makefile to move down
to sh-pfc:s drivers: the arch definitions are used twice to
get it done. However we can very well use the Kconfig symbol
for the SH PFC pin control feature itself: it doesn't matter
that it comes from a lower leaf in the Kconfig hierarchy which
is completely orthogonal.

Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
