linux-stable.git/drivers/pinctrl/Makefile, branch linux-3.14.y Linux kernel stable tree ARM: pinctrl: Add Broadcom Capri pinctrl driver 2014-01-16T13:25:38+00:00 Sherman Yin syin@broadcom.com 2013-12-21T02:13:35+00:00 54b1aa5a5b166f3e0863adde6cf9d14442fa244c Adds pinctrl driver for Broadcom Capri (BCM281xx) SoCs. v4: - PINCTRL selected in Kconfig, PINCTRL_CAPRI selected in bcm_defconfig - make use of regmap - change CAPRI_PIN_UPDATE from macro to inline function. - Handle pull-up strength arg in Ohm instead of enum v3: Re-work driver to be based on generic pin config. Moved config selection from Kconfig to bcm_defconfig. v2: Use hyphens instead of underscore in DT property names. Signed-off-by: Sherman Yin <syin@broadcom.com> Reviewed-by: Christian Daudt <bcm@fixthebug.org> Reviewed-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Adds pinctrl driver for Broadcom Capri (BCM281xx) SoCs.

v4: - PINCTRL selected in Kconfig, PINCTRL_CAPRI selected in bcm_defconfig
    - make use of regmap
    - change CAPRI_PIN_UPDATE from macro to inline function.
    - Handle pull-up strength arg in Ohm instead of enum
v3: Re-work driver to be based on generic pin config. Moved config selection
    from Kconfig to bcm_defconfig.
v2: Use hyphens instead of underscore in DT property names.

Signed-off-by: Sherman Yin <syin@broadcom.com>
Reviewed-by: Christian Daudt <bcm@fixthebug.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: tegra: add pinmux controller driver for Tegra124 2013-12-12T21:28:06+00:00 Ashwini Ghuge aghuge@nvidia.com 2013-12-10T07:10:56+00:00 1a16bee6bce39ca31724cf928dce19bd48d78df5 This adds a driver for the Tegra124 pinmux, and required parameterization data for Tegra124. The driver uses the common Tegra pincontrol driver utility functions to implement the majority of the driver. This driver is not compatible with the earlier NVIDIA's SoCs, hence add new compatibile as "nvidia,tegra124-pinmux". Originally written by Ashwini Gguhe. Thierry: - Cleanups in patches. ldewangan: - Fix some entries for groups. - Fix MUX enums and group sequence. Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> CC: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
This adds a driver for the Tegra124 pinmux, and required
parameterization data for Tegra124.

The driver uses the common Tegra pincontrol driver utility
functions to implement the majority of the driver.

This driver is not compatible with the earlier NVIDIA's SoCs,
hence add new compatibile as "nvidia,tegra124-pinmux".

Originally written by Ashwini Gguhe.
Thierry:
 - Cleanups in patches.
ldewangan:
 - Fix some entries for groups.
 - Fix MUX enums and group sequence.

Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
CC: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: Add msm8x74 configuration 2013-12-06T13:58:34+00:00 Bjorn Andersson bjorn.andersson@sonymobile.com 2013-12-06T02:10:04+00:00 55aaf8342db44c1d0d8bb911c50774f6eaeefbf3 Add initial definition of parameters for pinctrl-msm for the msm8x74 platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add initial definition of parameters for pinctrl-msm for the msm8x74
platform.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: Add Qualcomm TLMM driver 2013-12-06T13:58:33+00:00 Bjorn Andersson bjorn.andersson@sonymobile.com 2013-12-06T02:10:03+00:00 f365be0925729508fd8e62f8bdb504ef896cb6e0 This adds a pinctrl, pinmux, pinconf and gpiolib driver for the Qualcomm TLMM block. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
This adds a pinctrl, pinmux, pinconf and gpiolib driver for the
Qualcomm TLMM block.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: pinctrl-imx: add imx25 pinctrl driver 2013-11-25T08:08:30+00:00 Denis Carikli denis@eukrea.com 2013-11-06T08:52:15+00:00 b4a87c9b966f71922e54a336e90b485a5fba19b8 This is mostly cut and paste from the imx35 pinctrl driver. The data was generated using sed and awk on arch/arm/plat-mxc/include/mach/iomux-mx25.h. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: devicetree@vger.kernel.org Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Russell King <linux@arm.linux.org.uk> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: Denis Carikli <denis@eukrea.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
This is mostly cut and paste from the imx35 pinctrl driver.
The data was generated using sed and awk on
  arch/arm/plat-mxc/include/mach/iomux-mx25.h.

Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Eric Bénard <eric@eukrea.com>
Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: imx50: add pinctrl support code for the IMX50 SoC 2013-11-06T09:06:59+00:00 Greg Ungerer gerg@uclinux.org 2013-11-05T13:11:51+00:00 9da8312048edcf246ac1d7ab6aa0293f252de559 Add code to support the specific pin arrangements of the Freescale IMX50 SoC. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Add code to support the specific pin arrangements of the Freescale IMX50 SoC.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: imx27: imx27 pincontrol driver 2013-10-29T15:58:06+00:00 Markus Pargmann mpa@pengutronix.de 2013-10-29T14:32:19+00:00 e16dbf6011137343f51685c1e0c5be36a68fc501 imx27 pincontrol driver using the imx1 core driver. The DT bindings are similar to other imx pincontrol drivers. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
imx27 pincontrol driver using the imx1 core driver. The DT bindings are
similar to other imx pincontrol drivers.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: imx1 core driver 2013-10-29T13:54:37+00:00 Markus Pargmann mpa@pengutronix.de 2013-10-28T09:00:36+00:00 30612cd90005d8c4a3c53c7acadcf934a46c13df Core driver for register formats of imx1/imx21/imx27 processors. The pins of those processors are grouped into ports. Each port has 32 pins. The pins mux configuration is controlled by registers with 1 or 2 bit per pin, depending on the specific control register. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
Core driver for register formats of imx1/imx21/imx27 processors.

The pins of those processors are grouped into ports. Each port has 32
pins. The pins mux configuration is controlled by registers with 1 or 2
bit per pin, depending on the specific control register.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pinctrl: add TB10x pin control driver 2013-10-16T13:33:51+00:00 Christian Ruppert christian.ruppert@abilis.com 2013-10-15T13:39:38+00:00 5aad0db1c1ebb0f5be79f0adbecc16a2f0259b21 The pinmux driver of the Abilis Systems TB10x platform based on ARC700 CPUs. Used to control the pinmux and is a prerequisite for the GPIO driver. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The pinmux driver of the Abilis Systems TB10x platform based on ARC700 CPUs.
Used to control the pinmux and is a prerequisite for the GPIO driver.

Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
pincntrl: add support for ams AS3722 pin control driver 2013-10-10T15:38:29+00:00 Laxman Dewangan ldewangan@nvidia.com 2013-10-02T15:50:29+00:00 c8ce878206076b159ee9488133aa51314570da38 The AS3722 is a compact system PMU suitable for mobile phones, tablets etc. Add a driver to support accessing the GPIO, pinmux and pin configuration of 8 GPIO pins found on the ams AS3722 through pin control driver and gpiolib. The driver will register itself as the pincontrol driver and gpio driver. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 
The AS3722 is a compact system PMU suitable for mobile phones, tablets etc.

Add a driver to support accessing the GPIO, pinmux and pin configuration
of 8 GPIO pins found on the ams AS3722 through pin control driver and
gpiolib.

The driver will register itself as the pincontrol driver and gpio driver.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>