linux-stable.git/drivers/pinctrl/Makefile, branch linux-3.13.y

pinctrl: imx50: add pinctrl support code for the IMX50 SoC

2013-11-06T09:06:59+00:00

Add code to support the specific pin arrangements of the Freescale IMX50 SoC.

Signed-off-by: Greg Ungerer 
Acked-by: Shawn Guo 
Signed-off-by: Linus Walleij

pinctrl: imx27: imx27 pincontrol driver

2013-10-29T15:58:06+00:00

imx27 pincontrol driver using the imx1 core driver. The DT bindings are
similar to other imx pincontrol drivers.

Signed-off-by: Markus Pargmann 
Acked-by: Sascha Hauer 
Acked-by: Shawn Guo 
Signed-off-by: Linus Walleij

pinctrl: imx1 core driver

2013-10-29T13:54:37+00:00

Core driver for register formats of imx1/imx21/imx27 processors.

The pins of those processors are grouped into ports. Each port has 32
pins. The pins mux configuration is controlled by registers with 1 or 2
bit per pin, depending on the specific control register.

Signed-off-by: Markus Pargmann 
Acked-by: Sascha Hauer 
Acked-by: Shawn Guo 
Signed-off-by: Linus Walleij

pinctrl: add TB10x pin control driver

2013-10-16T13:33:51+00:00

The pinmux driver of the Abilis Systems TB10x platform based on ARC700 CPUs.
Used to control the pinmux and is a prerequisite for the GPIO driver.

Signed-off-by: Christian Ruppert 
Signed-off-by: Pierrick Hascoet 
Signed-off-by: Linus Walleij

pincntrl: add support for ams AS3722 pin control driver

2013-10-10T15:38:29+00:00

The AS3722 is a compact system PMU suitable for mobile phones, tablets etc.

Add a driver to support accessing the GPIO, pinmux and pin configuration
of 8 GPIO pins found on the ams AS3722 through pin control driver and
gpiolib.

The driver will register itself as the pincontrol driver and gpio driver.

Signed-off-by: Laxman Dewangan 
Signed-off-by: Linus Walleij

pinctrl: ADI PIN control driver for the GPIO controller on bf54x and bf60x.

2013-09-19T12:37:27+00:00

The new ADI GPIO2 controller was introduced since the BF548 and BF60x
processors. It differs a lot from the old one on BF5xx processors. So,
create a pinctrl driver under the pinctrl framework.

- Define gpio ports and pin interrupt controllers as individual platform
  devices.
- Register a pinctrl driver for the whole GPIO ports and pin interrupt
  devices.
- Probe pint devices before port devices. Put device instances into
  the global gpio and pint lists.
- Define peripheral, irq and gpio reservation bit masks for each gpio
  port as runtime resources.
- Save and restore gpio port and pint status MMRs in syscore PM functions.
- Create the plug-in subdrivers to hold the pinctrl soc data for bf54x
  and bf60x. Add soc data into struct adi_pinctrl. Initialize the soc data
  in pin controller probe function. Get the pin groups and functions via
  the soc data reference.
- Call gpiochip_add_pin_range() in gpio device probe function to register
  range cross reference between gpio device and pin control device.
- Get range by pinctrl_find_gpio_range_from_pin(), find gpio_port object
  by container_of() and find adi_pinctrl by pin control device name.
- Handle peripheral and gpio requests in pinctrl operation functions.
- Demux gpio IRQs via the irq_domain created by each GPIO port.

v2-changes:
- Remove unlinke() directive.

v3-changes:
- Rename struct adi_pmx to adi_pinctrl.
- Fix the comments of struct gpio_pint.
- Remove unused pin_base in struct gpio_port.
- Change pint_assign into bool type.
- Add comments about the relationship between pint device and port device
to the driver header.
- Use BIT macro to shift bit.
- Remove all bitmap reservation help functions. Inline reservation functions
into the actual code.
- Remove gpio and offset mutual reference help functions.
- Remove all help functions to find gpio_port and adi_pinctrl structs. Get
range by pinctrl_find_gpio_range_from_pin(), find gpio_port object by
container_of() and find adi_pinctrl by pin control device name.
- Pass bool type usage variable to port_setup help function.
- Separate long bit operations into several lines and add comments.
- Use debugfs to output all GPIO request information.
- Avoid to set drvdata to NULL
- Add explanation to function adi_gpio_init_int()
- Call gpiochip_add_pin_range() in gpio device probe function to register
range cross reference between gpio device and pin control device.
- Remove the reference to pin control device from the gpio_port struct.
Remove the reference list to gpio device from the adi_pinctrl struct.
Replace the global adi_pinctrl list with adi_gpio_port_list. Walk through
the gpio list to do power suspend and resume operations.
- Remove the global GPIO base from struct adi_pinctrl, define pin base in
the platform data for each GPIO port device.
- Initialize adi_pinctrl_setup in arch_initcall().
- print the status of triggers, whether it is in GPIO mode, if it is
flagged to be used as IRQ, etc in adi_pin_dbg_show().
- Create the plug-in subdrivers to hold the pinctrl soc data for bf54x
and bf60x. Add soc data into struct adi_pinctrl. Initialize the soc data
in pin controller probe function. Get the pin groups and functions via
the soc data reference.

v4-changes:
- remove useless system_state checking.
- replace dev_err with dev_warn in both irq and gpio pin cases.
- comment on relationship between irq type and invert operation.
- It is not necessary to check the reservation mode of the requested
pin in IRQ chip operation. Remove the reservation map.
- Use existing gpio/pinctrl subsystem debugfs files. Remove pinctrl-adi2
driver specific debugfs output.
- Add linkport group and function information for bf60x.
- Separate uart and ctsrts pins into 2 groups.
- Separate APAPI and alternative ATAPI pins into 2 groups.

Signed-off-by: Sonic Zhang 
Signed-off-by: Linus Walleij

pinctrl: palmas: add pincontrol driver

2013-08-14T19:00:42+00:00

TI Palmas series Power Management IC have multiple pins which can be
configured for different functionality. This pins can be configured
for different function. Also their properties like pull up/down,
open drain enable/disable are configurable.

Add support for pincontrol driver Palmas series device like TPS65913,
TPS80036. The driver supports to be register from DT only.

Changes from V1:
- Add generic property for pins and functions in pinconf-generic.
- Add APIs to map the DT and subnode.
- Move common utils APIs to the pinctrl-utils from this file.
- Update the binding document accordingly.
Changes from V2:
- Add ack by Lee.
- Correct the binding docs.

Signed-off-by: Laxman Dewangan 
Acked-by: Lee Jones 
Reviewed-by: Stephen Warren 
Signed-off-by: Linus Walleij

pinctrl: add utility functions for add map/configs

2013-08-14T19:00:41+00:00

Some of pincontrol driver needs the utility function to create map
list. The utility function needed for adding mux, configs etc.

In place of duplicating this in each driver, add the common utility
function in common file and use from device specific driver. This will
reduce the duplicating of code across drivers.

Changes from V1:
- Add this files in this patch and add common utility APIs to here.

Changes from V2:
- Nothing in code.
- Added Reviewed by Stephen.

Signed-off-by: Laxman Dewangan 
Reviewed-by: Stephen Warren 
Signed-off-by: Linus Walleij

Merge tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2013-07-03T18:48:03+00:00

Pull pin control changes from Linus Walleij:

- A large slew of improvements of the Genric pin configuration support,
and deployment in four different platforms: Rockchip, Super-H PFC,
ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing
and debugfs support into shape.

- We also have device tree support with generic naming conventions for
the generic pin configuration.

- Delete the unused and confusing direct pinconf API. Now state
transitions is *the* way to control pins and multiplexing.

- New drivers for Rockchip, TZ1090, and TZ1090 PDC.

- Two pin control states related to power management are now handled in
the device core: "sleep" and "idle", removing a lot of boilerplate
code in drivers. We do not yet know if this is the final word for
pin PM, but it already make things a lot easier to handle.

- Handle sparse GPIO ranges passing a list of disparate pins, and
utilize these in the new BayTrail (x86 Atom SoC) driver.

- Make the sunxi (AllWinner) driver handle external interrupts.

- Make it possible for pinctrl-single to handle the case where several
pins are managed by a single register, and augment it to handle sleep
modes.

- Cleanups and improvements for the abx500 drivers.

- Move Sirf pin control drivers to their own directory, support
save/restore of context and add support for the SiRFatlas6 SoC.

- PMU muxing for the Dove pinctrl driver.

- Finalization and support for VF610 in the i.MX6 pinctrl driver.

- Smoothen out various Exynos rough edges.

- Generic cleanups of various kinds.

* tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits)
pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe()
pinctrl: remove bindings for pinconf options needing more thought
pinctrl: remove slew-rate parameter from tz1090
pinctrl: set unit for debounce time pinconfig to usec
pinctrl: more clarifications for generic pull configs
pinctrl: rip out the direct pinconf API
pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver
pinctrl-tz1090: add TZ1090 pinctrl driver
pinctrl: samsung: Staticize drvdata_list
pinctrl: rockchip: Add missing irq_gc_unlock() call before return error
pinctrl: abx500: rework error path
pinctrl: abx500: suppress hardcoded value
pinctrl: abx500: factorize code
pinctrl: abx500: fix abx500_gpio_get()
pinctrl: abx500: fix abx500_pin_config_set()
pinctrl: abx500: Add device tree support
sh-pfc: Guard DT parsing with #ifdef CONFIG_OF
pinctrl: add Intel BayTrail GPIO/pinctrl support
pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc
pinctrl: Staticize local symbols
...

Conflicts:
drivers/net/ethernet/ti/davinci_mdio.c
drivers/pinctrl/Makefile

Merge tag 'regmap-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap

2013-07-03T18:40:58+00:00

Pull regmap updates from Mark Brown:
 "A small but useful set of regmap updates this time around:

   - An abstraction for bitfields within a register map contributed by
     Srinivas Kandagatla, allowing drivers to cope more easily when
     hardware designers randomly move things about (mainly when talking
     to things like system controllers).

   - Changes from Lars-Peter Clausen to allow the MMIO regmap to be used
     from hard IRQ context.

   - Small improvements to the cache infrastructure and performance,
     including a default cache sync operation so now all regmaps can
     sync easily.

  There's also a pinctrl driver making use of the new bitfield API,
  merged here for dependency reasons.  There will be a simple add/add
  conflict with the pinctrl tree as a result."

* tag 'regmap-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap:
  pinctrl: st: Remove unnecessary use of of_match_ptr macro
  pinctrl: st: fix return value check
  pinctrl: st: Add pinctrl and pinconf support.
  regmap: debugfs: Suppress cache for partial register files
  regmap: Add regmap_field APIs
  regmap: core: Cache all registers by default when cache is enabled
  regmap: Implemented default cache sync operation
  regmap: Make regmap-mmio usable from atomic contexts
  regmap: regcache: Fixup locking for custom lock callbacks
  regmap: debugfs: Fix return from regmap_debugfs_get_dump_start
  regmap: debugfs: Don't mark lockdep as broken due to debugfs write
  regmap: rbtree: Use range information to allocate nodes
  regmap: rbtree: Factor out node allocation
  regmap: Make regmap_check_range_table() a public API
  regmap: Add support for discarding parts of the register cache