linux-stable.git/drivers/phy/rockchip, branch v5.18.2

phy: rockchip: add naneng combo phy for RK3568

2022-02-24T14:43:52+00:00

This patch implements a combo phy driver for Rockchip SoCs
with NaNeng IP block. This phy can be used as pcie-phy, usb3-phy,
sata-phy or sgmii-phy.

Signed-off-by: Yifeng Zhao 
Signed-off-by: Johan Jonker 
Tested-by: Peter Geis 
Tested-by: Frank Wunderlich 
Link: https://lore.kernel.org/r/20220208091326.12495-4-yifeng.zhao@rock-chips.com
Signed-off-by: Vinod Koul

phy: dphy: Correct clk_pre parameter

2022-02-02T05:03:04+00:00

The D-PHY specification (v1.2) explicitly mentions that the T-CLK-PRE
parameter's unit is Unit Interval(UI) and the minimum value is 8.  Also,
kernel doc of the 'clk_pre' member of struct phy_configure_opts_mipi_dphy
mentions that it should be in UI.  However, the dphy core driver wrongly
sets 'clk_pre' to 8000, which seems to hint that it's in picoseconds.

So, let's fix the dphy core driver to correctly reflect the T-CLK-PRE
parameter's minimum value according to the D-PHY specification.

I'm assuming that all impacted custom drivers shall program values in
TxByteClkHS cycles into hardware for the T-CLK-PRE parameter.  The D-PHY
specification mentions that the frequency of TxByteClkHS is exactly 1/8
the High-Speed(HS) bit rate(each HS bit consumes one UI).  So, relevant
custom driver code is changed to program those values as
DIV_ROUND_UP(cfg->clk_pre, BITS_PER_BYTE), then.

Note that I've only tested the patch with RM67191 DSI panel on i.MX8mq EVK.
Help is needed to test with other i.MX8mq, Meson and Rockchip platforms,
as I don't have the hardwares.

Fixes: 2ed869990e14 ("phy: Add MIPI D-PHY configuration options")
Tested-by: Liu Ying  # RM67191 DSI panel on i.MX8mq EVK
Reviewed-by: Andrzej Hajda 
Reviewed-by: Neil Armstrong  # for phy-meson-axg-mipi-dphy.c
Tested-by: Neil Armstrong  # for phy-meson-axg-mipi-dphy.c
Tested-by: Guido Günther  # Librem 5 (imx8mq) with it's rather picky panel
Reviewed-by: Laurent Pinchart 
Signed-off-by: Liu Ying 
Link: https://lore.kernel.org/r/20220124024007.1465018-1-victor.liu@nxp.com
Signed-off-by: Vinod Koul

phy: phy-rockchip-inno-usb2: add rk3568 support

2021-12-23T11:24:48+00:00

The rk3568 usb2phy is a standalone device with a single muxed interrupt.
Add support for the registers to the usb2phy driver.

Signed-off-by: Peter Geis 
Tested-by: Michael Riesch 
Link: https://lore.kernel.org/r/20211215210252.120923-7-pgwipeout@gmail.com
Signed-off-by: Vinod Koul

phy: phy-rockchip-inno-usb2: support muxed interrupts

2021-12-23T11:24:48+00:00

The rk3568 usb2phy has a single muxed interrupt that handles all
interrupts.
Allow the driver to plug in only a single interrupt as necessary.

Signed-off-by: Peter Geis 
Tested-by: Michael Riesch 
Link: https://lore.kernel.org/r/20211215210252.120923-6-pgwipeout@gmail.com
Signed-off-by: Vinod Koul

phy: phy-rockchip-inno-usb2: support standalone phy nodes

2021-12-23T11:24:48+00:00

New Rockchip devices have the usb2 phy devices as standalone nodes
instead of children of the grf node.
Allow the driver to find the grf node from a phandle.

Signed-off-by: Peter Geis 
Tested-by: Michael Riesch 
Link: https://lore.kernel.org/r/20211215210252.120923-5-pgwipeout@gmail.com
Signed-off-by: Vinod Koul

phy: phy-rockchip-inno-usb2: support #address_cells = 2

2021-12-23T11:24:48+00:00

New Rockchip devices have the usb phy nodes as standalone devices.
These nodes have register nodes with #address_cells = 2, but only use 32
bit addresses.

Adjust the driver to check if the returned address is "0", and adjust
the index in that case.

Signed-off-by: Peter Geis 
Tested-by: Michael Riesch 
Link: https://lore.kernel.org/r/20211215210252.120923-4-pgwipeout@gmail.com
Signed-off-by: Vinod Koul

phy: rockchip-inno-usb2: remove redundant assignment to variable delay

2021-12-14T09:15:07+00:00

Variable delay is being assigned to zero and the code falls through to
the next case in a switch statement that returns out of the function.
The variable is never read in this scenario and so the assignment is
redundant and can be removed.

Cleans up scan-build static analysis warning:
drivers/phy/rockchip/phy-rockchip-inno-usb2.c:753:3: warning: Value
stored to 'delay' is never read [deadcode.DeadStores]

Signed-off-by: Colin Ian King 
Link: https://lore.kernel.org/r/20211211180054.525368-1-colin.i.king@gmail.com
Signed-off-by: Vinod Koul

phy: rockchip-inno-usb2: Make use of the helper function devm_add_action_or_reset()

2021-10-01T10:24:23+00:00

The helper function devm_add_action_or_reset() will internally
call devm_add_action(), and gif devm_add_action() fails then it will
execute the action mentioned and return the error code. So
use devm_add_action_or_reset() instead of devm_add_action()
to simplify the error handling, reduce the code.

Signed-off-by: Cai Huoqing 
Link: https://lore.kernel.org/r/20210922130024.745-1-caihuoqing@baidu.com
Signed-off-by: Vinod Koul

phy: rockchip-inno-usb2: fix for_each_child.cocci warnings

2021-08-06T11:22:29+00:00

For_each_available_child_of_node should have of_node_put()
before break around line 1184.  The other jumps out of the
loop do contain the put.

Generated by: scripts/coccinelle/iterators/for_each_child.cocci

CC: Sumera Priyadarsini 
Reported-by: kernel test robot 
Signed-off-by: kernel test robot 
Signed-off-by: Julia Lawall 
Link: https://lore.kernel.org/r/alpine.DEB.2.22.394.2106231617540.99238@hadrien
Signed-off-by: Vinod Koul

phy/rockchip: add Innosilicon-based CSI dphy

2021-06-21T03:56:13+00:00

The CSI dphy found for example on the rk3326/px30 and rk3368 is based
on an IP design from Innosilicon. Add a driver for it.

Signed-off-by: Heiko Stuebner 
Link: https://lore.kernel.org/r/20210610212935.3520341-3-heiko@sntech.de
Signed-off-by: Vinod Koul