linux-stable.git/drivers/phy/freescale, branch linux-6.5.y

phy: lynx-28g: serialize concurrent phy_set_mode_ext() calls to shared registers

2023-10-19T21:10:59+00:00

[ Upstream commit 139ad1143151a07be93bf741d4ea7c89e59f89ce ]

The protocol converter configuration registers PCC8, PCCC, PCCD
(implemented by the driver), as well as others, control protocol
converters from multiple lanes (each represented as a different
struct phy). So, if there are simultaneous calls to phy_set_mode_ext()
to lanes sharing the same PCC register (either for the "old" or for the
"new" protocol), corruption of the values programmed to hardware is
possible, because lynx_28g_rmw() has no locking.

Add a spinlock in the struct lynx_28g_priv shared by all lanes, and take
the global spinlock from the phy_ops :: set_mode() implementation. There
are no other callers which modify PCC registers.

Fixes: 8f73b37cf3fb ("phy: add support for the Layerscape SerDes 28G")
Signed-off-by: Vladimir Oltean 
Signed-off-by: David S. Miller 
Signed-off-by: Sasha Levin

phy: lynx-28g: lock PHY while performing CDR lock workaround

2023-10-19T21:10:59+00:00

[ Upstream commit 0ac87fe54a171d18c5fb5345e3ee8d14e1b06f4b ]

lynx_28g_cdr_lock_check() runs once per second in a workqueue to reset
the lane receiver if the CDR has not locked onto bit transitions in the
RX stream. But the PHY consumer may do stuff with the PHY simultaneously,
and that isn't okay. Block concurrent generic PHY calls by holding the
PHY mutex from this workqueue.

Fixes: 8f73b37cf3fb ("phy: add support for the Layerscape SerDes 28G")
Signed-off-by: Vladimir Oltean 
Signed-off-by: David S. Miller 
Signed-off-by: Sasha Levin

phy: lynx-28g: cancel the CDR check work item on the remove path

2023-10-19T21:10:58+00:00

[ Upstream commit f200bab3756fe81493a1b280180dafa1d9ccdcf7 ]

The blamed commit added the CDR check work item but didn't cancel it on
the remove path. Fix this by adding a remove function which takes care
of it.

Fixes: 8f73b37cf3fb ("phy: add support for the Layerscape SerDes 28G")
Signed-off-by: Ioana Ciornei 
Signed-off-by: Vladimir Oltean 
Signed-off-by: David S. Miller 
Signed-off-by: Sasha Levin

phy: fsl-imx8mp-usb: add support for phy tuning

2023-05-19T17:50:30+00:00

Add USB PHY parameter tuning for USB certifications.

Reviewed-by: Haibo Chen 
Signed-off-by: Li Jun 
[j.zink: ported to v6.3-rc1 from NXP downstream repo + cleanups]
Signed-off-by: Johannes Zink 
Link: https://lore.kernel.org/r/20230516-lustige-usb-phy-dinge-v2-2-3383a0de34ac@pengutronix.de
Signed-off-by: Vinod Koul

phy: freescale: imx8m-pcie: Use devm_platform_ioremap_resource()

2023-05-16T14:21:24+00:00

Convert platform_get_resource(),devm_ioremap_resource() to a single
call to devm_platform_ioremap_resource(), as this is exactly what this
function does.

Signed-off-by: Yang Li 
Link: https://lore.kernel.org/r/20230428052758.38636-1-yang.lee@linux.alibaba.com
Signed-off-by: Vinod Koul

phy: freescale: phy-fsl-imx8qm-lvds-phy: Convert to platform remove callback returning void

2023-03-20T12:44:56+00:00

The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is (mostly) ignored
and this typically results in resource leaks. To improve here there is a
quest to make the remove callback return void. In the first step of this
quest all drivers are converted to .remove_new() which already returns
void.

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Signed-off-by: Uwe Kleine-König 
Link: https://lore.kernel.org/r/20230307115900.2293120-7-u.kleine-koenig@pengutronix.de
Signed-off-by: Vinod Koul

phy: freescale: imx8m-pcie: Add one missing error return

2023-01-13T17:55:38+00:00

There should be one error return when fail to fetch the perst reset.
Add the missing error return.

Fixes: dce9edff16ee ("phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support")

Signed-off-by: Richard Zhu 
Reviewed-by: Marek Vasut 
Link: https://lore.kernel.org/r/1671433941-2037-1-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul

phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support

2022-10-17T05:31:03+00:00

Add i.MX8MP PCIe PHY support.

Signed-off-by: Richard Zhu 
Signed-off-by: Lucas Stach 
Tested-by: Marek Vasut 
Tested-by: Richard Leitner 
Tested-by: Alexander Stein 
Reviewed-by: Lucas Stach 
Reviewed-by: Ahmad Fatoum 
Link: https://lore.kernel.org/r/1665625622-20551-5-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul

phy: freescale: imx8m-pcie: Refine i.MX8MM PCIe PHY driver

2022-10-17T05:31:02+00:00

To make it more flexible and easy to expand. Refine i.MX8MM PCIe PHY
driver.
- Use gpr compatible string to avoid the codes duplications when add
  another platform PCIe PHY support.
- Re-arrange the codes to let it more flexible and easy to expand.
No functional change. Re-arrange the TX tuning, since internal registers
can be wrote through APB interface before assertion of CMN_RST.

Signed-off-by: Richard Zhu 
Signed-off-by: Lucas Stach 
Tested-by: Marek Vasut 
Tested-by: Richard Leitner 
Tested-by: Alexander Stein 
Reviewed-by: Lucas Stach 
Reviewed-by: Ahmad Fatoum 
Link: https://lore.kernel.org/r/1665625622-20551-4-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul

phy: freescale: imx8m-pcie: Refine register definitions

2022-10-17T05:31:02+00:00

No function changes, refine PHY register definitions.
- Keep align with other CMN PHY registers, refine the definitions of
  PHY_CMN_REG75.
- Remove two BIT definitions that are not used at all.

Signed-off-by: Richard Zhu 
Signed-off-by: Lucas Stach 
Tested-by: Marek Vasut 
Tested-by: Richard Leitner 
Tested-by: Alexander Stein 
Reviewed-by: Lucas Stach 
Link: https://lore.kernel.org/r/1665625622-20551-3-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul