<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/phy/freescale, branch linux-6.3.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>phy: freescale: imx8m-pcie: Add one missing error return</title>
<updated>2023-01-13T17:55:38+00:00</updated>
<author>
<name>Richard Zhu</name>
<email>hongxing.zhu@nxp.com</email>
</author>
<published>2022-12-19T07:12:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b574baa64cf84e7793fe79f4491ae36c16e65a0b'/>
<id>b574baa64cf84e7793fe79f4491ae36c16e65a0b</id>
<content type='text'>
There should be one error return when fail to fetch the perst reset.
Add the missing error return.

Fixes: dce9edff16ee ("phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support")

Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Link: https://lore.kernel.org/r/1671433941-2037-1-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There should be one error return when fail to fetch the perst reset.
Add the missing error return.

Fixes: dce9edff16ee ("phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support")

Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Link: https://lore.kernel.org/r/1671433941-2037-1-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: freescale: imx8m-pcie: Add i.MX8MP PCIe PHY support</title>
<updated>2022-10-17T05:31:03+00:00</updated>
<author>
<name>Richard Zhu</name>
<email>hongxing.zhu@nxp.com</email>
</author>
<published>2022-10-13T01:47:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=dce9edff16ee8df20e791e82e0704c4667cc3908'/>
<id>dce9edff16ee8df20e791e82e0704c4667cc3908</id>
<content type='text'>
Add i.MX8MP PCIe PHY support.

Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Tested-by: Marek Vasut &lt;marex@denx.de&gt;
Tested-by: Richard Leitner &lt;richard.leitner@skidata.com&gt;
Tested-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Reviewed-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Ahmad Fatoum &lt;a.fatoum@pengutronix.de&gt;
Link: https://lore.kernel.org/r/1665625622-20551-5-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add i.MX8MP PCIe PHY support.

Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Tested-by: Marek Vasut &lt;marex@denx.de&gt;
Tested-by: Richard Leitner &lt;richard.leitner@skidata.com&gt;
Tested-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Reviewed-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Ahmad Fatoum &lt;a.fatoum@pengutronix.de&gt;
Link: https://lore.kernel.org/r/1665625622-20551-5-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: freescale: imx8m-pcie: Refine i.MX8MM PCIe PHY driver</title>
<updated>2022-10-17T05:31:02+00:00</updated>
<author>
<name>Richard Zhu</name>
<email>hongxing.zhu@nxp.com</email>
</author>
<published>2022-10-13T01:47:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=ca679c49c4463595499a053ba94328acb574fffa'/>
<id>ca679c49c4463595499a053ba94328acb574fffa</id>
<content type='text'>
To make it more flexible and easy to expand. Refine i.MX8MM PCIe PHY
driver.
- Use gpr compatible string to avoid the codes duplications when add
  another platform PCIe PHY support.
- Re-arrange the codes to let it more flexible and easy to expand.
No functional change. Re-arrange the TX tuning, since internal registers
can be wrote through APB interface before assertion of CMN_RST.

Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Tested-by: Marek Vasut &lt;marex@denx.de&gt;
Tested-by: Richard Leitner &lt;richard.leitner@skidata.com&gt;
Tested-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Reviewed-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Ahmad Fatoum &lt;a.fatoum@pengutronix.de&gt;
Link: https://lore.kernel.org/r/1665625622-20551-4-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To make it more flexible and easy to expand. Refine i.MX8MM PCIe PHY
driver.
- Use gpr compatible string to avoid the codes duplications when add
  another platform PCIe PHY support.
- Re-arrange the codes to let it more flexible and easy to expand.
No functional change. Re-arrange the TX tuning, since internal registers
can be wrote through APB interface before assertion of CMN_RST.

Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Tested-by: Marek Vasut &lt;marex@denx.de&gt;
Tested-by: Richard Leitner &lt;richard.leitner@skidata.com&gt;
Tested-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Reviewed-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Ahmad Fatoum &lt;a.fatoum@pengutronix.de&gt;
Link: https://lore.kernel.org/r/1665625622-20551-4-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: freescale: imx8m-pcie: Refine register definitions</title>
<updated>2022-10-17T05:31:02+00:00</updated>
<author>
<name>Richard Zhu</name>
<email>hongxing.zhu@nxp.com</email>
</author>
<published>2022-10-13T01:47:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=e9e7dca53bf5a5bddf70c87157660a29cdcdd2d8'/>
<id>e9e7dca53bf5a5bddf70c87157660a29cdcdd2d8</id>
<content type='text'>
No function changes, refine PHY register definitions.
- Keep align with other CMN PHY registers, refine the definitions of
  PHY_CMN_REG75.
- Remove two BIT definitions that are not used at all.

Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Tested-by: Marek Vasut &lt;marex@denx.de&gt;
Tested-by: Richard Leitner &lt;richard.leitner@skidata.com&gt;
Tested-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Reviewed-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Link: https://lore.kernel.org/r/1665625622-20551-3-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
No function changes, refine PHY register definitions.
- Keep align with other CMN PHY registers, refine the definitions of
  PHY_CMN_REG75.
- Remove two BIT definitions that are not used at all.

Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Tested-by: Marek Vasut &lt;marex@denx.de&gt;
Tested-by: Richard Leitner &lt;richard.leitner@skidata.com&gt;
Tested-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Reviewed-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Link: https://lore.kernel.org/r/1665625622-20551-3-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: freescale: imx8m-pcie: Fix the wrong order of phy_init() and phy_power_on()</title>
<updated>2022-10-03T08:34:46+00:00</updated>
<author>
<name>Richard Zhu</name>
<email>hongxing.zhu@nxp.com</email>
</author>
<published>2022-09-05T02:23:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=cbcf8722b523dcf0970ab67dc3d5ced1ea7b334e'/>
<id>cbcf8722b523dcf0970ab67dc3d5ced1ea7b334e</id>
<content type='text'>
Refer to phy_core driver, phy_init() must be called before phy_power_on().
Fix the wrong order of phy_init() and phy_power_on() here.

Link: https://lore.kernel.org/r/1662344583-18874-1-git-send-email-hongxing.zhu@nxp.com
Fixes: 1aa97b002258 ("phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver")
Tested-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Acked-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Acked-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Refer to phy_core driver, phy_init() must be called before phy_power_on().
Fix the wrong order of phy_init() and phy_power_on() here.

Link: https://lore.kernel.org/r/1662344583-18874-1-git-send-email-hongxing.zhu@nxp.com
Fixes: 1aa97b002258 ("phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver")
Tested-by: Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;
Signed-off-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
Acked-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Acked-by: Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: freescale: Add i.MX8qm Mixel LVDS PHY support</title>
<updated>2022-07-08T05:13:20+00:00</updated>
<author>
<name>Liu Ying</name>
<email>victor.liu@nxp.com</email>
</author>
<published>2022-07-06T03:48:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=06ff622d61d2ff0d06ae964627a8928e5243efc2'/>
<id>06ff622d61d2ff0d06ae964627a8928e5243efc2</id>
<content type='text'>
Add Freescale i.MX8qm LVDS PHY support.
The PHY IP is from Mixel, Inc.

Signed-off-by: Liu Ying &lt;victor.liu@nxp.com&gt;
Link: https://lore.kernel.org/r/20220706034810.2352641-4-victor.liu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add Freescale i.MX8qm LVDS PHY support.
The PHY IP is from Mixel, Inc.

Signed-off-by: Liu Ying &lt;victor.liu@nxp.com&gt;
Link: https://lore.kernel.org/r/20220706034810.2352641-4-victor.liu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: freescale: imx8m-pcie: Handle IMX8_PCIE_REFCLK_PAD_UNUSED</title>
<updated>2022-04-20T09:15:55+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2022-04-13T14:07:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f7f9abc5eab9d10561d74b20b3e284649e07d82f'/>
<id>f7f9abc5eab9d10561d74b20b3e284649e07d82f</id>
<content type='text'>
The 'fsl,refclk-pad-mode' DT property used to select clock source for
PCIe PHY can have either of three values, IMX8_PCIE_REFCLK_PAD_INPUT,
IMX8_PCIE_REFCLK_PAD_OUTPUT, IMX8_PCIE_REFCLK_PAD_UNUSED. The first
two options are handled correctly by the driver, the last one is not,
this patch implements support for the last option.

The IMX8_PCIE_REFCLK_PAD_INPUT means PCIE_RESREF is PHY clock input,
the IMX8_PCIE_REFCLK_PAD_OUTPUT means PHY clock are sourced from SoC
internal PLL and output to PCIE_RESREF external IO pin. The last
IMX8_PCIE_REFCLK_PAD_UNUSED is a combination of previous two, PHY
clock are sourced from SoC internal PLL and not output anywhere.

Reviewed-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Fabio Estevam &lt;festevam@denx.de&gt;
Cc: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Cc: Marcel Ziswiler &lt;marcel.ziswiler@toradex.com&gt;
Cc: NXP Linux Team &lt;linux-imx@nxp.com&gt;
Cc: Peng Fan &lt;peng.fan@nxp.com&gt;
Cc: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Cc: Shawn Guo &lt;shawnguo@kernel.org&gt;
Cc: Vinod Koul &lt;vkoul@kernel.org&gt;
Cc: linux-arm-kernel@lists.infradead.org
To: linux-phy@lists.infradead.org
Link: https://lore.kernel.org/r/20220413140710.10074-1-marex@denx.de
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The 'fsl,refclk-pad-mode' DT property used to select clock source for
PCIe PHY can have either of three values, IMX8_PCIE_REFCLK_PAD_INPUT,
IMX8_PCIE_REFCLK_PAD_OUTPUT, IMX8_PCIE_REFCLK_PAD_UNUSED. The first
two options are handled correctly by the driver, the last one is not,
this patch implements support for the last option.

The IMX8_PCIE_REFCLK_PAD_INPUT means PCIE_RESREF is PHY clock input,
the IMX8_PCIE_REFCLK_PAD_OUTPUT means PHY clock are sourced from SoC
internal PLL and output to PCIE_RESREF external IO pin. The last
IMX8_PCIE_REFCLK_PAD_UNUSED is a combination of previous two, PHY
clock are sourced from SoC internal PLL and not output anywhere.

Reviewed-by: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Fabio Estevam &lt;festevam@denx.de&gt;
Cc: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Cc: Marcel Ziswiler &lt;marcel.ziswiler@toradex.com&gt;
Cc: NXP Linux Team &lt;linux-imx@nxp.com&gt;
Cc: Peng Fan &lt;peng.fan@nxp.com&gt;
Cc: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Cc: Shawn Guo &lt;shawnguo@kernel.org&gt;
Cc: Vinod Koul &lt;vkoul@kernel.org&gt;
Cc: linux-arm-kernel@lists.infradead.org
To: linux-phy@lists.infradead.org
Link: https://lore.kernel.org/r/20220413140710.10074-1-marex@denx.de
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support</title>
<updated>2022-04-20T07:29:50+00:00</updated>
<author>
<name>Liu Ying</name>
<email>victor.liu@nxp.com</email>
</author>
<published>2022-04-19T01:08:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3fbae284887de24c83e88b1ebbb0a5fe8dbe9ac1'/>
<id>3fbae284887de24c83e88b1ebbb0a5fe8dbe9ac1</id>
<content type='text'>
i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports
either a MIPI DSI display or a LVDS display.  The PHY mode is controlled
by SCU firmware and the driver would call a SCU firmware function to
configure the PHY mode.  The single LVDS PHY has 4 data lanes to support
a LVDS display.  Also, with a master LVDS PHY and a slave LVDS PHY, they
may work together to support a LVDS display with 8 data lanes(usually, dual
LVDS link display).  Note that this patch supports the LVDS PHY mode only
for the i.MX8qxp Mixel combo PHY, i.e., the MIPI DPHY mode is yet to be
supported, so for now error would be returned from -&gt;set_mode() if MIPI
DPHY mode is passed over to it for the combo PHY.

Cc: Guido Günther &lt;agx@sigxcpu.org&gt;
Cc: Robert Chiras &lt;robert.chiras@nxp.com&gt;
Cc: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Cc: Vinod Koul &lt;vkoul@kernel.org&gt;
Cc: Shawn Guo &lt;shawnguo@kernel.org&gt;
Cc: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Cc: Pengutronix Kernel Team &lt;kernel@pengutronix.de&gt;
Cc: Fabio Estevam &lt;festevam@gmail.com&gt;
Cc: NXP Linux Team &lt;linux-imx@nxp.com&gt;
Reviewed-by: Guido Günther &lt;agx@sigxcpu.org&gt;
Signed-off-by: Liu Ying &lt;victor.liu@nxp.com&gt;
Link: https://lore.kernel.org/r/20220419010852.452169-6-victor.liu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports
either a MIPI DSI display or a LVDS display.  The PHY mode is controlled
by SCU firmware and the driver would call a SCU firmware function to
configure the PHY mode.  The single LVDS PHY has 4 data lanes to support
a LVDS display.  Also, with a master LVDS PHY and a slave LVDS PHY, they
may work together to support a LVDS display with 8 data lanes(usually, dual
LVDS link display).  Note that this patch supports the LVDS PHY mode only
for the i.MX8qxp Mixel combo PHY, i.e., the MIPI DPHY mode is yet to be
supported, so for now error would be returned from -&gt;set_mode() if MIPI
DPHY mode is passed over to it for the combo PHY.

Cc: Guido Günther &lt;agx@sigxcpu.org&gt;
Cc: Robert Chiras &lt;robert.chiras@nxp.com&gt;
Cc: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Cc: Vinod Koul &lt;vkoul@kernel.org&gt;
Cc: Shawn Guo &lt;shawnguo@kernel.org&gt;
Cc: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Cc: Pengutronix Kernel Team &lt;kernel@pengutronix.de&gt;
Cc: Fabio Estevam &lt;festevam@gmail.com&gt;
Cc: NXP Linux Team &lt;linux-imx@nxp.com&gt;
Reviewed-by: Guido Günther &lt;agx@sigxcpu.org&gt;
Signed-off-by: Liu Ying &lt;victor.liu@nxp.com&gt;
Link: https://lore.kernel.org/r/20220419010852.452169-6-victor.liu@nxp.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: PHY_FSL_LYNX_28G should depend on ARCH_LAYERSCAPE</title>
<updated>2022-03-29T15:45:16+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2022-03-29T12:56:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=37fcacb50be7071d146144a6c5c5bf0194b9a1cf'/>
<id>37fcacb50be7071d146144a6c5c5bf0194b9a1cf</id>
<content type='text'>
Freescale Layerscape Lynx 28G SerDes PHYs are only present on
Freescale/NXP Layerscape SoCs.

Move PHY_FSL_LYNX_28G outside the block for ARCH_MXC, as the latter
is meant for i.MX8 SoCs, which is a different family than Layerscape.
Add a dependency on ARCH_LAYERSCAPE, to prevent asking the user about
this driver when configuring a kernel without Layerscape SoC support.

Fixes: 02e2af20f4f9f2aa ("Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc")
Fixes: 8f73b37cf3fbda67 ("phy: add support for the Layerscape SerDes 28G")
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Freescale Layerscape Lynx 28G SerDes PHYs are only present on
Freescale/NXP Layerscape SoCs.

Move PHY_FSL_LYNX_28G outside the block for ARCH_MXC, as the latter
is meant for i.MX8 SoCs, which is a different family than Layerscape.
Add a dependency on ARCH_LAYERSCAPE, to prevent asking the user about
this driver when configuring a kernel without Layerscape SoC support.

Fixes: 02e2af20f4f9f2aa ("Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc")
Fixes: 8f73b37cf3fbda67 ("phy: add support for the Layerscape SerDes 28G")
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc</title>
<updated>2022-03-28T19:27:35+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-03-28T19:27:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=02e2af20f4f9f2aa0c84e9a30a35c02f0fbb7daa'/>
<id>02e2af20f4f9f2aa0c84e9a30a35c02f0fbb7daa</id>
<content type='text'>
Pull char/misc and other driver updates from Greg KH:
 "Here is the big set of char/misc and other small driver subsystem
  updates for 5.18-rc1.

  Included in here are merges from driver subsystems which contain:

   - iio driver updates and new drivers

   - fsi driver updates

   - fpga driver updates

   - habanalabs driver updates and support for new hardware

   - soundwire driver updates and new drivers

   - phy driver updates and new drivers

   - coresight driver updates

   - icc driver updates

  Individual changes include:

   - mei driver updates

   - interconnect driver updates

   - new PECI driver subsystem added

   - vmci driver updates

   - lots of tiny misc/char driver updates

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (556 commits)
  firmware: google: Properly state IOMEM dependency
  kgdbts: fix return value of __setup handler
  firmware: sysfb: fix platform-device leak in error path
  firmware: stratix10-svc: add missing callback parameter on RSU
  arm64: dts: qcom: add non-secure domain property to fastrpc nodes
  misc: fastrpc: Add dma handle implementation
  misc: fastrpc: Add fdlist implementation
  misc: fastrpc: Add helper function to get list and page
  misc: fastrpc: Add support to secure memory map
  dt-bindings: misc: add fastrpc domain vmid property
  misc: fastrpc: check before loading process to the DSP
  misc: fastrpc: add secure domain support
  dt-bindings: misc: add property to support non-secure DSP
  misc: fastrpc: Add support to get DSP capabilities
  misc: fastrpc: add support for FASTRPC_IOCTL_MEM_MAP/UNMAP
  misc: fastrpc: separate fastrpc device from channel context
  dt-bindings: nvmem: brcm,nvram: add basic NVMEM cells
  dt-bindings: nvmem: make "reg" property optional
  nvmem: brcm_nvram: parse NVRAM content into NVMEM cells
  nvmem: dt-bindings: Fix the error of dt-bindings check
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull char/misc and other driver updates from Greg KH:
 "Here is the big set of char/misc and other small driver subsystem
  updates for 5.18-rc1.

  Included in here are merges from driver subsystems which contain:

   - iio driver updates and new drivers

   - fsi driver updates

   - fpga driver updates

   - habanalabs driver updates and support for new hardware

   - soundwire driver updates and new drivers

   - phy driver updates and new drivers

   - coresight driver updates

   - icc driver updates

  Individual changes include:

   - mei driver updates

   - interconnect driver updates

   - new PECI driver subsystem added

   - vmci driver updates

   - lots of tiny misc/char driver updates

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (556 commits)
  firmware: google: Properly state IOMEM dependency
  kgdbts: fix return value of __setup handler
  firmware: sysfb: fix platform-device leak in error path
  firmware: stratix10-svc: add missing callback parameter on RSU
  arm64: dts: qcom: add non-secure domain property to fastrpc nodes
  misc: fastrpc: Add dma handle implementation
  misc: fastrpc: Add fdlist implementation
  misc: fastrpc: Add helper function to get list and page
  misc: fastrpc: Add support to secure memory map
  dt-bindings: misc: add fastrpc domain vmid property
  misc: fastrpc: check before loading process to the DSP
  misc: fastrpc: add secure domain support
  dt-bindings: misc: add property to support non-secure DSP
  misc: fastrpc: Add support to get DSP capabilities
  misc: fastrpc: add support for FASTRPC_IOCTL_MEM_MAP/UNMAP
  misc: fastrpc: separate fastrpc device from channel context
  dt-bindings: nvmem: brcm,nvram: add basic NVMEM cells
  dt-bindings: nvmem: make "reg" property optional
  nvmem: brcm_nvram: parse NVRAM content into NVMEM cells
  nvmem: dt-bindings: Fix the error of dt-bindings check
  ...
</pre>
</div>
</content>
</entry>
</feed>
