linux-stable.git/drivers/pci, branch v4.4.181

PCI: Mark Atheros AR9462 to avoid bus reset

2019-06-11T10:23:48+00:00

commit 6afb7e26978da5e86e57e540fdce65c8b04f398a upstream.

When using PCI passthrough with this device, the host machine locks up
completely when starting the VM, requiring a hard reboot.  Add a quirk to
avoid bus resets on this device.

Fixes: c3e59ee4e766 ("PCI: Mark Atheros AR93xx to avoid bus reset")
Link: https://lore.kernel.org/linux-pci/20190107213248.3034-1-james.prestwood@linux.intel.com
Signed-off-by: James Prestwood 
Signed-off-by: Bjorn Helgaas 
CC: stable@vger.kernel.org	# v3.14+
Signed-off-by: Greg Kroah-Hartman

PCI: Add function 1 DMA alias quirk for Marvell 9170 SATA controller

2019-04-27T07:33:56+00:00

commit 9cde402a59770a0669d895399c13407f63d7d209 upstream.

There is a Marvell 88SE9170 PCIe SATA controller I found on a board here.
Some quick testing with the ARM SMMU enabled reveals that it suffers from
the same requester ID mixup problems as the other Marvell chips listed
already.

Add the PCI vendor/device ID to the list of chips which need the
workaround.

Signed-off-by: Andre Przywara 
Signed-off-by: Bjorn Helgaas 
CC: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman

PCI: altera: Move retrain from fixup to altera_pcie_host_init()

2019-01-16T21:16:11+00:00

commit ce4f1c7ad490aa7129bde5632d6e53943f8a866c upstream.

Previously we used a PCI early fixup to initiate a link retrain on Altera
devices.  But Altera PCIe IP can be configured as either a Root Port or an
Endpoint, and they might have same vendor ID, so the fixup would be run for
both.

We only want to initiate a link retrain for Altera Root Port devices, not
for Endpoints, so move the link retrain functionality from the fixup to
altera_pcie_host_init().

[bhelgaas: changelog]
Signed-off-by: Ley Foon Tan 
Signed-off-by: Bjorn Helgaas 
Cc: Claudius Heine 
Signed-off-by: Greg Kroah-Hartman

PCI: altera: Rework config accessors for use without a struct pci_bus

2019-01-16T21:16:11+00:00

commit 31fc0ad47e2e0b8417616aa0f1ddcc67edf1e109 upstream.

Rework configs accessors so a future patch can use them in _probe() with
struct altera_pcie instead of struct pci_bus.

Signed-off-by: Ley Foon Tan 
Signed-off-by: Bjorn Helgaas 
Cc: Claudius Heine 
Signed-off-by: Greg Kroah-Hartman

PCI: altera: Poll for link training status after retraining the link

2019-01-16T21:16:11+00:00

commit 411dc32d8810e0a204c799ce5c97cb56990de1cb upstream.

Poll for link training status is cleared before poll for link up status.
This can help to get the reliable link up status, especially when PCIe is
in Gen 3 speed.

Signed-off-by: Ley Foon Tan 
Signed-off-by: Bjorn Helgaas 
Cc: Claudius Heine 
Signed-off-by: Greg Kroah-Hartman

PCI: altera: Poll for link up status after retraining the link

2019-01-16T21:16:11+00:00

commit 3a928e98a833e1a470a60d2fedf3c55502185fb7 upstream.

Some PCIe devices take a long time to reach link up state after retrain.
Poll for link up status after retraining the link.  This is to make sure
the link is up before we access configuration space.

[bhelgaas: changelog]
Signed-off-by: Ley Foon Tan 
Signed-off-by: Bjorn Helgaas 
Cc: Claudius Heine 
Signed-off-by: Greg Kroah-Hartman

PCI: altera: Check link status before retrain link

2019-01-16T21:16:11+00:00

commit c622032ebc538cb3869c312ae3ad235a99da84b6 upstream.

Check the link status before retraining.  If the link is not up, don't
bother trying to retrain it.

[bhelgaas: split code move to separate patch, changelog]
Signed-off-by: Ley Foon Tan 
Signed-off-by: Bjorn Helgaas 
Cc: Claudius Heine 
Signed-off-by: Greg Kroah-Hartman

PCI: altera: Reorder read/write functions

2019-01-16T21:16:11+00:00

commit f8be11ae3d2c9a1338da37ff91ff4c65922d21be upstream.

Move cra_writel(), cra_readl(), and altera_pcie_link_is_up() so a future
patch can use them in altera_pcie_retrain().  No functional change
intended.

Signed-off-by: Bjorn Helgaas 
Cc: Claudius Heine 
Signed-off-by: Greg Kroah-Hartman

PCI: altera: Fix altera_pcie_link_is_up()

2019-01-16T21:16:11+00:00

commit eff31f4002c4e25b9b8c39d0a3a551c6c64c77e8 upstream.

Originally altera_pcie_link_is_up() decided the link was up if any of the
low four bits of the LTSSM register were set.  But the link is only up if
the LTSSM state is L0, so check for that exact value.

[bhelgaas: changelog]
Signed-off-by: Ley Foon Tan 
Signed-off-by: Bjorn Helgaas 
Cc: Claudius Heine 
Signed-off-by: Greg Kroah-Hartman

PCI: Add Device IDs for Intel GPU "spurious interrupt" quirk

2018-11-21T08:27:34+00:00

commit d0c9606b31a21028fb5b753c8ad79626292accfd upstream.

Add Device IDs to the Intel GPU "spurious interrupt" quirk table.

For these devices, unplugging the VGA cable and plugging it in again causes
spurious interrupts from the IGD.  Linux eventually disables the interrupt,
but of course that disables any other devices sharing the interrupt.

The theory is that this is a VGA BIOS defect: it should have disabled the
IGD interrupt but failed to do so.

See f67fd55fa96f ("PCI: Add quirk for still enabled interrupts on Intel
Sandy Bridge GPUs") and 7c82126a94e6 ("PCI: Add new ID for Intel GPU
"spurious interrupt" quirk") for some history.

[bhelgaas: See link below for discussion about how to fix this more
generically instead of adding device IDs for every new Intel GPU.  I hope
this is the last patch to add device IDs.]

Link: https://lore.kernel.org/linux-pci/1537974841-29928-1-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Bin Meng 
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas 
Cc: stable@vger.kernel.org	# v3.4+
Signed-off-by: Greg Kroah-Hartman