linux-stable.git/drivers/pci/switch, branch linux-5.6.y Linux kernel stable tree PCI/switchtec: Fix init_completion race condition with poll_wait() 2020-04-17T14:13:20+00:00 Logan Gunthorpe logang@deltatee.com 2020-03-21T11:25:45+00:00 7673c99bdbb5b2b23285e54f0b287db07248a06f [ Upstream commit efbdc769601f4d50018bf7ca50fc9f7c67392ece ] The call to init_completion() in mrpc_queue_cmd() can theoretically race with the call to poll_wait() in switchtec_dev_poll(). poll() write() switchtec_dev_poll() switchtec_dev_write() poll_wait(&s->comp.wait); mrpc_queue_cmd() init_completion(&s->comp) init_waitqueue_head(&s->comp.wait) To my knowledge, no one has hit this bug. Fix this by using reinit_completion() instead of init_completion() in mrpc_queue_cmd(). Fixes: 080b47def5e5 ("MicroSemi Switchtec management interface driver") Reported-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lkml.kernel.org/r/20200313183608.2646-1-logang@deltatee.com Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit efbdc769601f4d50018bf7ca50fc9f7c67392ece ]

The call to init_completion() in mrpc_queue_cmd() can theoretically
race with the call to poll_wait() in switchtec_dev_poll().

  poll()			write()
    switchtec_dev_poll()   	  switchtec_dev_write()
      poll_wait(&s->comp.wait);      mrpc_queue_cmd()
			               init_completion(&s->comp)
				         init_waitqueue_head(&s->comp.wait)

To my knowledge, no one has hit this bug.

Fix this by using reinit_completion() instead of init_completion() in
mrpc_queue_cmd().

Fixes: 080b47def5e5 ("MicroSemi Switchtec management interface driver")

Reported-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lkml.kernel.org/r/20200313183608.2646-1-logang@deltatee.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
PCI/switchtec: Add Gen4 device IDs 2020-01-15T17:00:40+00:00 Kelvin Cao kelvin.cao@microchip.com 2020-01-15T03:56:48+00:00 7a30ebb9f2a253eae908cc3e1ba7daaa3bfe2bba Now that Gen4 is properly supported, advertise support in the module's device ID table and add the same IDs to the list of switchtec quirks. [logang@deltatee.com: add commit message and quirk IDs] Link: https://lore.kernel.org/r/20200115035648.2578-8-logang@deltatee.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> 
Now that Gen4 is properly supported, advertise support in the module's
device ID table and add the same IDs to the list of switchtec quirks.

[logang@deltatee.com: add commit message and quirk IDs]
Link: https://lore.kernel.org/r/20200115035648.2578-8-logang@deltatee.com
Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com>
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
PCI/switchtec: Add Gen4 MRPC GAS access permission check 2020-01-15T17:00:39+00:00 Kelvin Cao kelvin.cao@microchip.com 2020-01-06T19:03:35+00:00 ce7c88600bf8ec0d12cf8e147907f96cd58eeb2e Gen4 hardware provides new MRPC commands to read and write directly from any address in the PCI BAR (which Microsemi refers to as GAS). Since accessing BARs can be dangerous and break the driver, we don't want unprivileged users to have this ability. Therefore, require CAP_SYS_ADMIN for the local and remote GAS access MRPC commands. Privileged processes will already have access to the BAR through the sysfs resource file so this doesn't give userspace any capabilities it didn't already have. [logang@deltatee.com: rework commit message] Link: https://lore.kernel.org/r/20200106190337.2428-11-logang@deltatee.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> 
Gen4 hardware provides new MRPC commands to read and write directly from
any address in the PCI BAR (which Microsemi refers to as GAS). Since
accessing BARs can be dangerous and break the driver, we don't want
unprivileged users to have this ability.

Therefore, require CAP_SYS_ADMIN for the local and remote GAS access MRPC
commands. Privileged processes will already have access to the BAR through
the sysfs resource file so this doesn't give userspace any capabilities it
didn't already have.

[logang@deltatee.com: rework commit message]
Link: https://lore.kernel.org/r/20200106190337.2428-11-logang@deltatee.com
Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com>
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
PCI/switchtec: Add Gen4 flash information interface support 2020-01-15T17:00:39+00:00 Kelvin Cao kelvin.cao@microchip.com 2020-01-15T03:56:47+00:00 4efa1d2e36976d7b26f2e67f4c838330fbc91299 Add the new flash_info registers struct and the implementation of ioctl_flash_part_info() for the new Gen4 hardware. [logang@deltatee.com: rewrote commit message] Link: https://lore.kernel.org/r/20200115035648.2578-7-logang@deltatee.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> 
Add the new flash_info registers struct and the implementation of
ioctl_flash_part_info() for the new Gen4 hardware.

[logang@deltatee.com: rewrote commit message]
Link: https://lore.kernel.org/r/20200115035648.2578-7-logang@deltatee.com
Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com>
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
PCI/switchtec: Add Gen4 system info register support 2020-01-15T17:00:38+00:00 Logan Gunthorpe logang@deltatee.com 2020-01-15T03:56:46+00:00 a3321ca394082f403b447646d81c18ff6b39f4a6 Add the Gen4-specific system info registers and ensure their usage is guarded by a check on the device's generation. Link: https://lore.kernel.org/r/20200115035648.2578-6-logang@deltatee.com Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> 
Add the Gen4-specific system info registers and ensure their usage is
guarded by a check on the device's generation.

Link: https://lore.kernel.org/r/20200115035648.2578-6-logang@deltatee.com
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
PCI/switchtec: Separate Gen3 register structures into unions 2020-01-15T17:00:38+00:00 Logan Gunthorpe logang@deltatee.com 2020-01-15T03:56:45+00:00 993d208daaebebc3f3ec211e862a413a90e8d69b Since the sys_info and flash_info registers differ significantly in Gen4 hardware, separate out the Gen3 registers into their own structure with a union in the main structure. No functional changes intended. Link: https://lore.kernel.org/r/20200115035648.2578-5-logang@deltatee.com Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> 
Since the sys_info and flash_info registers differ significantly in Gen4
hardware, separate out the Gen3 registers into their own structure with a
union in the main structure.

No functional changes intended.

Link: https://lore.kernel.org/r/20200115035648.2578-5-logang@deltatee.com
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
PCI/switchtec: Factor out Gen3 ioctl_flash_part_info() 2020-01-15T17:00:37+00:00 Logan Gunthorpe logang@deltatee.com 2020-01-15T03:56:44+00:00 6a3d1b542cfafe6241d4de11800d639c9bf69f29 Refactor ioctl_flash_part_info() into a Gen3-specific function because the registers for flash partition information have changed significantly in Gen4 and will require a completely different implementation. No functional changes intended. Co-developed-by: Kelvin Cao <kelvin.cao@microchip.com> Link: https://lore.kernel.org/r/20200115035648.2578-4-logang@deltatee.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> 
Refactor ioctl_flash_part_info() into a Gen3-specific function because the
registers for flash partition information have changed significantly in
Gen4 and will require a completely different implementation.

No functional changes intended.

Co-developed-by: Kelvin Cao <kelvin.cao@microchip.com>
Link: https://lore.kernel.org/r/20200115035648.2578-4-logang@deltatee.com
Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com>
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
PCI/switchtec: Add 'generation' variable 2020-01-15T17:00:37+00:00 Logan Gunthorpe logang@deltatee.com 2020-01-15T03:56:43+00:00 b13313a01a6a607bd92268822d498d5c7356ca71 Add a generation variable passed through the device ID table and test for Gen3-specific registers. This will allow us to add Gen4 and other devices that extend the programming model. Link: https://lore.kernel.org/r/20200115035648.2578-3-logang@deltatee.com Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> 
Add a generation variable passed through the device ID table and test for
Gen3-specific registers.  This will allow us to add Gen4 and other devices
that extend the programming model.

Link: https://lore.kernel.org/r/20200115035648.2578-3-logang@deltatee.com
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
PCI/switchtec: Rename generation-specific constants 2020-01-15T17:00:37+00:00 Logan Gunthorpe logang@deltatee.com 2020-01-15T03:56:42+00:00 fcccd282b633ab9fc7d53ff8ccf82ab5c30a0985 Gen4 hardware will have different values for the SWITCHTEC_X_RUNNING and SWITCHTEC_IOCTL_NUM_PARTITIONS, so rename them with GEN3 in their name. No functional changes intended. Link: https://lore.kernel.org/r/20200115035648.2578-2-logang@deltatee.com Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> 
Gen4 hardware will have different values for the SWITCHTEC_X_RUNNING and
SWITCHTEC_IOCTL_NUM_PARTITIONS, so rename them with GEN3 in their name.

No functional changes intended.

Link: https://lore.kernel.org/r/20200115035648.2578-2-logang@deltatee.com
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
PCI/switchtec: Move check event ID from mask_event() to switchtec_event_isr() 2020-01-15T17:00:36+00:00 Wesley Sheng wesley.sheng@microchip.com 2020-01-06T19:03:30+00:00 2085747d533b9be5f5a51efbc3e86be0164571a2 The event ID check doesn't depend on anything in the mask_all_events() to mask_event() path. Do it in switchtec_event_isr() to avoid the CSR read in mask_event(). Link: https://lore.kernel.org/r/20200106190337.2428-6-logang@deltatee.com Signed-off-by: Wesley Sheng <wesley.sheng@microchip.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> 
The event ID check doesn't depend on anything in the mask_all_events() to
mask_event() path.  Do it in switchtec_event_isr() to avoid the CSR read in
mask_event().

Link: https://lore.kernel.org/r/20200106190337.2428-6-logang@deltatee.com
Signed-off-by: Wesley Sheng <wesley.sheng@microchip.com>
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>