<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/pci/controller, branch v6.14</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Merge tag 'pci-v6.14-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci</title>
<updated>2025-01-26T00:03:40+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-01-26T00:03:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=647d69605c70368d54fc012fce8a43e8e5955b04'/>
<id>647d69605c70368d54fc012fce8a43e8e5955b04</id>
<content type='text'>
Pull pci updates from Bjorn Helgaas:
 "Enumeration:

   - Batch sizing of multiple BARs while memory decoding is disabled
     instead of disabling/enabling decoding for each BAR individually;
     this optimizes virtualized environments where toggling decoding
     enable is expensive (Alex Williamson)

   - Add host bridge .enable_device() and .disable_device() hooks for
     bridges that need to configure things like Requester ID to StreamID
     mapping when enabling devices (Frank Li)

   - Extend struct pci_ecam_ops with .enable_device() and
     .disable_device() hooks so drivers that use pci_host_common_probe()
     instead of their own .probe() have a way to set the
     .enable_device() callbacks (Marc Zyngier)

   - Drop 'No bus range found' message so we don't complain when DTs
     don't specify the default 'bus-range = &lt;0x00 0xff&gt;' (Bjorn Helgaas)

   - Rename the drivers/pci/of_property.c struct of_pci_range to
     of_pci_range_entry to avoid confusion with the global of_pci_range
     in include/linux/of_address.h (Bjorn Helgaas)

  Driver binding:

   - Update resource request API documentation to encourage callers to
     supply a driver name when requesting resources (Philipp Stanner)

   - Export pci_intx_unmanaged() and pcim_intx() (always managed) so
     callers of pci_intx() (which is sometimes managed) can explicitly
     choose the one they need (Philipp Stanner)

   - Convert drivers from pci_intx() to always-managed pcim_intx() or
     never-managed pci_intx_unmanaged(): amd_sfh, ata (ahci, ata_piix,
     pata_rdc, sata_sil24, sata_sis, sata_uli, sata_vsc), bnx2x, bna,
     ntb, qtnfmac, rtsx, tifm_7xx1, vfio, xen-pciback (Philipp Stanner)

   - Remove pci_intx_unmanaged() since pci_intx() is now always
     unmanaged and pcim_intx() is always managed (Philipp Stanner)

  Error handling:

   - Unexport pcie_read_tlp_log() to encourage drivers to use PCI core
     logging rather than building their own (Ilpo Järvinen)

   - Move TLP Log handling to its own file (Ilpo Järvinen)

   - Store number of supported End-End TLP Prefixes always so we can
     read the correct number of DWORDs from the TLP Prefix Log (Ilpo
     Järvinen)

   - Read TLP Prefixes in addition to the Header Log in
     pcie_read_tlp_log() (Ilpo Järvinen)

   - Add pcie_print_tlp_log() to consolidate printing of TLP Header and
     Prefix Log (Ilpo Järvinen)

   - Quirk the Intel Raptor Lake-P PIO log size to accommodate vendor
     BIOSes that don't configure it correctly (Takashi Iwai)

  ASPM:

   - Save parent L1 PM Substates config so when we restore it along with
     an endpoint's config, the parent info isn't junk (Jian-Hong Pan)

  Power management:

   - Avoid D3 for Root Ports on TUXEDO Sirius Gen1 with old BIOS because
     the system can't wake up from suspend (Werner Sembach)

  Endpoint framework:

   - Destroy the EPC device in devm_pci_epc_destroy(), which previously
     didn't call devres_release() (Zijun Hu)

   - Finish virtual EP removal in pci_epf_remove_vepf(), which
     previously caused a subsequent pci_epf_add_vepf() to fail with
     -EBUSY (Zijun Hu)

   - Write BAR_MASK before iATU registers in pci_epc_set_bar() so we
     don't depend on the BAR_MASK reset value being larger than the
     requested BAR size (Niklas Cassel)

   - Prevent changing BAR size/flags in pci_epc_set_bar() to prevent
     reads from bypassing the iATU if we reduced the BAR size (Niklas
     Cassel)

   - Verify address alignment when programming iATU so we don't attempt
     to write bits that are read-only because of the BAR size, which
     could lead to directing accesses to the wrong address (Niklas
     Cassel)

   - Implement artpec6 pci_epc_features so we can rely on all drivers
     supporting it so we can use it in EPC core code (Niklas Cassel)

   - Check for BARs of fixed size to prevent endpoint drivers from
     trying to change their size (Niklas Cassel)

   - Verify that requested BAR size is a power of two when endpoint
     driver sets the BAR (Niklas Cassel)

  Endpoint framework tests:

   - Clear pci-epf-test dma_chan_rx, not dma_chan_tx, after freeing
     dma_chan_rx (Mohamed Khalfella)

   - Correct the DMA MEMCPY test so it doesn't fail if the Endpoint
     supports both DMA_PRIVATE and DMA_MEMCPY (Manivannan Sadhasivam)

   - Add pci-epf-test and pci_endpoint_test support for capabilities
     (Niklas Cassel)

   - Add Endpoint test for consecutive BARs (Niklas Cassel)

   - Remove redundant comparison from Endpoint BAR test because a &gt; 1MB
     BAR can always be exactly covered by iterating with a 1MB buffer
     (Hans Zhang)

   - Move and convert PCI Endpoint tests from tools/pci to Kselftests
     (Manivannan Sadhasivam)

  Apple PCIe controller driver:

   - Convert StreamID mapping configuration from a bus notifier to the
     .enable_device() and .disable_device() callbacks (Marc Zyngier)

  Freescale i.MX6 PCIe controller driver:

   - Add Requester ID to StreamID mapping configuration when enabling
     devices (Frank Li)

   - Use DWC core suspend/resume functions for imx6 (Frank Li)

   - Add suspend/resume support for i.MX8MQ, i.MX8Q, and i.MX95 (Richard
     Zhu)

   - Add DT compatible string 'fsl,imx8q-pcie-ep' and driver support for
     i.MX8Q series (i.MX8QM, i.MX8QXP, and i.MX8DXL) Endpoints (Frank
     Li)

   - Add DT binding for optional i.MX95 Refclk and driver support to
     enable it if the platform hasn't enabled it (Richard Zhu)

   - Configure PHY based on controller being in Root Complex or Endpoint
     mode (Frank Li)

   - Rely on dbi2 and iATU base addresses from DT via
     dw_pcie_get_resources() instead of hardcoding them (Richard Zhu)

   - Deassert apps_reset in imx_pcie_deassert_core_reset() since it is
     asserted in imx_pcie_assert_core_reset() (Richard Zhu)

   - Add missing reference clock enable or disable logic for IMX6SX,
     IMX7D, IMX8MM (Richard Zhu)

   - Remove redundant imx7d_pcie_init_phy() since
     imx7d_pcie_enable_ref_clk() does the same thing (Richard Zhu)

  Freescale Layerscape PCIe controller driver:

   - Simplify by using syscon_regmap_lookup_by_phandle_args() instead
     of syscon_regmap_lookup_by_phandle() followed by
     of_property_read_u32_array() (Krzysztof Kozlowski)

  Marvell MVEBU PCIe controller driver:

   - Add MODULE_DEVICE_TABLE() to enable module autoloading (Liao Chen)

  MediaTek PCIe Gen3 controller driver:

   - Use clk_bulk_prepare_enable() instead of separate
     clk_bulk_prepare() and clk_bulk_enable() (Lorenzo Bianconi)

   - Rearrange reset assert/deassert so they're both done in the
     *_power_up() callbacks (Lorenzo Bianconi)

   - Document that Airoha EN7581 requires PHY init and power-on before
     PHY reset deassert, unlike other MediaTek Gen3 controllers (Lorenzo
     Bianconi)

   - Move Airoha EN7581 post-reset delay from the en7581 clock .enable()
     method to mtk_pcie_en7581_power_up() (Lorenzo Bianconi)

   - Sleep instead of delay during Airoha EN7581 power-up, since this is
     a non-atomic context (Lorenzo Bianconi)

   - Skip PERST# assertion on Airoha EN7581 during probe and
     suspend/resume to avoid a hardware defect (Lorenzo Bianconi)

   - Enable async probe to reduce system startup time (Douglas Anderson)

  Microchip PolarFlare PCIe controller driver:

   - Set up the inbound address translation based on whether the
     platform allows coherent or non-coherent DMA (Daire McNamara)

   - Update DT binding such that platforms are DMA-coherent by default
     and must specify 'dma-noncoherent' if needed (Conor Dooley)

  Mobiveil PCIe controller driver:

   - Convert mobiveil-pcie.txt to YAML and update 'interrupt-names'
     and 'reg-names' (Frank Li)

  Qualcomm PCIe controller driver:

   - Add DT SM8550 and SM8650 optional 'global' interrupt for link
     events (Neil Armstrong)

   - Add DT 'compatible' strings for IPQ5424 PCIe controller (Manikanta
     Mylavarapu)

   - If 'global' IRQ is supported for detection of Link Up events, tell
     DWC core not to wait for link up (Krishna chaitanya chundru)

  Renesas R-Car PCIe controller driver:

   - Avoid passing stack buffer as resource name (King Dix)

  Rockchip PCIe controller driver:

   - Simplify clock and reset handling by using bulk interfaces (Anand
     Moon)

   - Pass typed rockchip_pcie (not void) pointer to
     rockchip_pcie_disable_clocks() (Anand Moon)

   - Return -ENOMEM, not success, when pci_epc_mem_alloc_addr() fails
     (Dan Carpenter)

  Rockchip DesignWare PCIe controller driver:

   - Use dll_link_up IRQ to detect Link Up and enumerate devices so
     users don't have to manually rescan (Niklas Cassel)

   - Tell DWC core not to wait for link up since the 'sys' interrupt is
     required and detects Link Up events (Niklas Cassel)

  Synopsys DesignWare PCIe controller driver:

   - Don't wait for link up in DWC core if driver can detect Link Up
     event (Krishna chaitanya chundru)

   - Update ICC and OPP votes after Link Up events (Krishna chaitanya
     chundru)

   - Always stop link in dw_pcie_suspend_noirq(), which is required at
     least for i.MX8QM to re-establish link on resume (Richard Zhu)

   - Drop racy and unnecessary LTSSM state check before sending
     PME_TURN_OFF message in dw_pcie_suspend_noirq() (Richard Zhu)

   - Add struct of_pci_range.parent_bus_addr for devices that need their
     immediate parent bus address, not the CPU address, e.g., to program
     an internal Address Translation Unit (iATU) (Frank Li)

  TI DRA7xx PCIe controller driver:

   - Simplify by using syscon_regmap_lookup_by_phandle_args() instead of
     syscon_regmap_lookup_by_phandle() followed by
     of_parse_phandle_with_fixed_args() or of_property_read_u32_index()
     (Krzysztof Kozlowski)

  Xilinx Versal CPM PCIe controller driver:

   - Add DT binding and driver support for Xilinx Versal CPM5
     (Thippeswamy Havalige)

  MicroSemi Switchtec management driver:

   - Add Microchip PCI100X device IDs (Rakesh Babu Saladi)

  Miscellaneous:

   - Move reset related sysfs code from pci.c to pci-sysfs.c where other
     similar code lives (Ilpo Järvinen)

   - Simplify reset_method_store() memory management by using __free()
     instead of explicit kfree() cleanup (Ilpo Järvinen)

   - Constify struct bin_attribute for sysfs, VPD, P2PDMA, and the IBM
     ACPI hotplug driver (Thomas Weißschuh)

   - Remove redundant PCI_VSEC_HDR and PCI_VSEC_HDR_LEN_SHIFT (Dongdong
     Zhang)

   - Correct documentation of the 'config_acs=' kernel parameter
     (Akihiko Odaki)"

* tag 'pci-v6.14-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (111 commits)
  PCI: Batch BAR sizing operations
  dt-bindings: PCI: microchip,pcie-host: Allow dma-noncoherent
  PCI: microchip: Set inbound address translation for coherent or non-coherent mode
  Documentation: Fix pci=config_acs= example
  PCI: Remove redundant PCI_VSEC_HDR and PCI_VSEC_HDR_LEN_SHIFT
  PCI: Don't include 'pm_wakeup.h' directly
  selftests: pci_endpoint: Migrate to Kselftest framework
  selftests: Move PCI Endpoint tests from tools/pci to Kselftests
  misc: pci_endpoint_test: Fix IOCTL return value
  dt-bindings: PCI: qcom: Document the IPQ5424 PCIe controller
  dt-bindings: PCI: qcom,pcie-sm8550: Document 'global' interrupt
  dt-bindings: PCI: mobiveil: Convert mobiveil-pcie.txt to YAML
  PCI: switchtec: Add Microchip PCI100X device IDs
  misc: pci_endpoint_test: Remove redundant 'remainder' test
  misc: pci_endpoint_test: Add consecutive BAR test
  misc: pci_endpoint_test: Add support for capabilities
  PCI: endpoint: pci-epf-test: Add support for capabilities
  PCI: endpoint: pci-epf-test: Fix check for DMA MEMCPY test
  PCI: endpoint: pci-epf-test: Set dma_chan_rx pointer to NULL on error
  PCI: dwc: Simplify config resource lookup
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull pci updates from Bjorn Helgaas:
 "Enumeration:

   - Batch sizing of multiple BARs while memory decoding is disabled
     instead of disabling/enabling decoding for each BAR individually;
     this optimizes virtualized environments where toggling decoding
     enable is expensive (Alex Williamson)

   - Add host bridge .enable_device() and .disable_device() hooks for
     bridges that need to configure things like Requester ID to StreamID
     mapping when enabling devices (Frank Li)

   - Extend struct pci_ecam_ops with .enable_device() and
     .disable_device() hooks so drivers that use pci_host_common_probe()
     instead of their own .probe() have a way to set the
     .enable_device() callbacks (Marc Zyngier)

   - Drop 'No bus range found' message so we don't complain when DTs
     don't specify the default 'bus-range = &lt;0x00 0xff&gt;' (Bjorn Helgaas)

   - Rename the drivers/pci/of_property.c struct of_pci_range to
     of_pci_range_entry to avoid confusion with the global of_pci_range
     in include/linux/of_address.h (Bjorn Helgaas)

  Driver binding:

   - Update resource request API documentation to encourage callers to
     supply a driver name when requesting resources (Philipp Stanner)

   - Export pci_intx_unmanaged() and pcim_intx() (always managed) so
     callers of pci_intx() (which is sometimes managed) can explicitly
     choose the one they need (Philipp Stanner)

   - Convert drivers from pci_intx() to always-managed pcim_intx() or
     never-managed pci_intx_unmanaged(): amd_sfh, ata (ahci, ata_piix,
     pata_rdc, sata_sil24, sata_sis, sata_uli, sata_vsc), bnx2x, bna,
     ntb, qtnfmac, rtsx, tifm_7xx1, vfio, xen-pciback (Philipp Stanner)

   - Remove pci_intx_unmanaged() since pci_intx() is now always
     unmanaged and pcim_intx() is always managed (Philipp Stanner)

  Error handling:

   - Unexport pcie_read_tlp_log() to encourage drivers to use PCI core
     logging rather than building their own (Ilpo Järvinen)

   - Move TLP Log handling to its own file (Ilpo Järvinen)

   - Store number of supported End-End TLP Prefixes always so we can
     read the correct number of DWORDs from the TLP Prefix Log (Ilpo
     Järvinen)

   - Read TLP Prefixes in addition to the Header Log in
     pcie_read_tlp_log() (Ilpo Järvinen)

   - Add pcie_print_tlp_log() to consolidate printing of TLP Header and
     Prefix Log (Ilpo Järvinen)

   - Quirk the Intel Raptor Lake-P PIO log size to accommodate vendor
     BIOSes that don't configure it correctly (Takashi Iwai)

  ASPM:

   - Save parent L1 PM Substates config so when we restore it along with
     an endpoint's config, the parent info isn't junk (Jian-Hong Pan)

  Power management:

   - Avoid D3 for Root Ports on TUXEDO Sirius Gen1 with old BIOS because
     the system can't wake up from suspend (Werner Sembach)

  Endpoint framework:

   - Destroy the EPC device in devm_pci_epc_destroy(), which previously
     didn't call devres_release() (Zijun Hu)

   - Finish virtual EP removal in pci_epf_remove_vepf(), which
     previously caused a subsequent pci_epf_add_vepf() to fail with
     -EBUSY (Zijun Hu)

   - Write BAR_MASK before iATU registers in pci_epc_set_bar() so we
     don't depend on the BAR_MASK reset value being larger than the
     requested BAR size (Niklas Cassel)

   - Prevent changing BAR size/flags in pci_epc_set_bar() to prevent
     reads from bypassing the iATU if we reduced the BAR size (Niklas
     Cassel)

   - Verify address alignment when programming iATU so we don't attempt
     to write bits that are read-only because of the BAR size, which
     could lead to directing accesses to the wrong address (Niklas
     Cassel)

   - Implement artpec6 pci_epc_features so we can rely on all drivers
     supporting it so we can use it in EPC core code (Niklas Cassel)

   - Check for BARs of fixed size to prevent endpoint drivers from
     trying to change their size (Niklas Cassel)

   - Verify that requested BAR size is a power of two when endpoint
     driver sets the BAR (Niklas Cassel)

  Endpoint framework tests:

   - Clear pci-epf-test dma_chan_rx, not dma_chan_tx, after freeing
     dma_chan_rx (Mohamed Khalfella)

   - Correct the DMA MEMCPY test so it doesn't fail if the Endpoint
     supports both DMA_PRIVATE and DMA_MEMCPY (Manivannan Sadhasivam)

   - Add pci-epf-test and pci_endpoint_test support for capabilities
     (Niklas Cassel)

   - Add Endpoint test for consecutive BARs (Niklas Cassel)

   - Remove redundant comparison from Endpoint BAR test because a &gt; 1MB
     BAR can always be exactly covered by iterating with a 1MB buffer
     (Hans Zhang)

   - Move and convert PCI Endpoint tests from tools/pci to Kselftests
     (Manivannan Sadhasivam)

  Apple PCIe controller driver:

   - Convert StreamID mapping configuration from a bus notifier to the
     .enable_device() and .disable_device() callbacks (Marc Zyngier)

  Freescale i.MX6 PCIe controller driver:

   - Add Requester ID to StreamID mapping configuration when enabling
     devices (Frank Li)

   - Use DWC core suspend/resume functions for imx6 (Frank Li)

   - Add suspend/resume support for i.MX8MQ, i.MX8Q, and i.MX95 (Richard
     Zhu)

   - Add DT compatible string 'fsl,imx8q-pcie-ep' and driver support for
     i.MX8Q series (i.MX8QM, i.MX8QXP, and i.MX8DXL) Endpoints (Frank
     Li)

   - Add DT binding for optional i.MX95 Refclk and driver support to
     enable it if the platform hasn't enabled it (Richard Zhu)

   - Configure PHY based on controller being in Root Complex or Endpoint
     mode (Frank Li)

   - Rely on dbi2 and iATU base addresses from DT via
     dw_pcie_get_resources() instead of hardcoding them (Richard Zhu)

   - Deassert apps_reset in imx_pcie_deassert_core_reset() since it is
     asserted in imx_pcie_assert_core_reset() (Richard Zhu)

   - Add missing reference clock enable or disable logic for IMX6SX,
     IMX7D, IMX8MM (Richard Zhu)

   - Remove redundant imx7d_pcie_init_phy() since
     imx7d_pcie_enable_ref_clk() does the same thing (Richard Zhu)

  Freescale Layerscape PCIe controller driver:

   - Simplify by using syscon_regmap_lookup_by_phandle_args() instead
     of syscon_regmap_lookup_by_phandle() followed by
     of_property_read_u32_array() (Krzysztof Kozlowski)

  Marvell MVEBU PCIe controller driver:

   - Add MODULE_DEVICE_TABLE() to enable module autoloading (Liao Chen)

  MediaTek PCIe Gen3 controller driver:

   - Use clk_bulk_prepare_enable() instead of separate
     clk_bulk_prepare() and clk_bulk_enable() (Lorenzo Bianconi)

   - Rearrange reset assert/deassert so they're both done in the
     *_power_up() callbacks (Lorenzo Bianconi)

   - Document that Airoha EN7581 requires PHY init and power-on before
     PHY reset deassert, unlike other MediaTek Gen3 controllers (Lorenzo
     Bianconi)

   - Move Airoha EN7581 post-reset delay from the en7581 clock .enable()
     method to mtk_pcie_en7581_power_up() (Lorenzo Bianconi)

   - Sleep instead of delay during Airoha EN7581 power-up, since this is
     a non-atomic context (Lorenzo Bianconi)

   - Skip PERST# assertion on Airoha EN7581 during probe and
     suspend/resume to avoid a hardware defect (Lorenzo Bianconi)

   - Enable async probe to reduce system startup time (Douglas Anderson)

  Microchip PolarFlare PCIe controller driver:

   - Set up the inbound address translation based on whether the
     platform allows coherent or non-coherent DMA (Daire McNamara)

   - Update DT binding such that platforms are DMA-coherent by default
     and must specify 'dma-noncoherent' if needed (Conor Dooley)

  Mobiveil PCIe controller driver:

   - Convert mobiveil-pcie.txt to YAML and update 'interrupt-names'
     and 'reg-names' (Frank Li)

  Qualcomm PCIe controller driver:

   - Add DT SM8550 and SM8650 optional 'global' interrupt for link
     events (Neil Armstrong)

   - Add DT 'compatible' strings for IPQ5424 PCIe controller (Manikanta
     Mylavarapu)

   - If 'global' IRQ is supported for detection of Link Up events, tell
     DWC core not to wait for link up (Krishna chaitanya chundru)

  Renesas R-Car PCIe controller driver:

   - Avoid passing stack buffer as resource name (King Dix)

  Rockchip PCIe controller driver:

   - Simplify clock and reset handling by using bulk interfaces (Anand
     Moon)

   - Pass typed rockchip_pcie (not void) pointer to
     rockchip_pcie_disable_clocks() (Anand Moon)

   - Return -ENOMEM, not success, when pci_epc_mem_alloc_addr() fails
     (Dan Carpenter)

  Rockchip DesignWare PCIe controller driver:

   - Use dll_link_up IRQ to detect Link Up and enumerate devices so
     users don't have to manually rescan (Niklas Cassel)

   - Tell DWC core not to wait for link up since the 'sys' interrupt is
     required and detects Link Up events (Niklas Cassel)

  Synopsys DesignWare PCIe controller driver:

   - Don't wait for link up in DWC core if driver can detect Link Up
     event (Krishna chaitanya chundru)

   - Update ICC and OPP votes after Link Up events (Krishna chaitanya
     chundru)

   - Always stop link in dw_pcie_suspend_noirq(), which is required at
     least for i.MX8QM to re-establish link on resume (Richard Zhu)

   - Drop racy and unnecessary LTSSM state check before sending
     PME_TURN_OFF message in dw_pcie_suspend_noirq() (Richard Zhu)

   - Add struct of_pci_range.parent_bus_addr for devices that need their
     immediate parent bus address, not the CPU address, e.g., to program
     an internal Address Translation Unit (iATU) (Frank Li)

  TI DRA7xx PCIe controller driver:

   - Simplify by using syscon_regmap_lookup_by_phandle_args() instead of
     syscon_regmap_lookup_by_phandle() followed by
     of_parse_phandle_with_fixed_args() or of_property_read_u32_index()
     (Krzysztof Kozlowski)

  Xilinx Versal CPM PCIe controller driver:

   - Add DT binding and driver support for Xilinx Versal CPM5
     (Thippeswamy Havalige)

  MicroSemi Switchtec management driver:

   - Add Microchip PCI100X device IDs (Rakesh Babu Saladi)

  Miscellaneous:

   - Move reset related sysfs code from pci.c to pci-sysfs.c where other
     similar code lives (Ilpo Järvinen)

   - Simplify reset_method_store() memory management by using __free()
     instead of explicit kfree() cleanup (Ilpo Järvinen)

   - Constify struct bin_attribute for sysfs, VPD, P2PDMA, and the IBM
     ACPI hotplug driver (Thomas Weißschuh)

   - Remove redundant PCI_VSEC_HDR and PCI_VSEC_HDR_LEN_SHIFT (Dongdong
     Zhang)

   - Correct documentation of the 'config_acs=' kernel parameter
     (Akihiko Odaki)"

* tag 'pci-v6.14-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (111 commits)
  PCI: Batch BAR sizing operations
  dt-bindings: PCI: microchip,pcie-host: Allow dma-noncoherent
  PCI: microchip: Set inbound address translation for coherent or non-coherent mode
  Documentation: Fix pci=config_acs= example
  PCI: Remove redundant PCI_VSEC_HDR and PCI_VSEC_HDR_LEN_SHIFT
  PCI: Don't include 'pm_wakeup.h' directly
  selftests: pci_endpoint: Migrate to Kselftest framework
  selftests: Move PCI Endpoint tests from tools/pci to Kselftests
  misc: pci_endpoint_test: Fix IOCTL return value
  dt-bindings: PCI: qcom: Document the IPQ5424 PCIe controller
  dt-bindings: PCI: qcom,pcie-sm8550: Document 'global' interrupt
  dt-bindings: PCI: mobiveil: Convert mobiveil-pcie.txt to YAML
  PCI: switchtec: Add Microchip PCI100X device IDs
  misc: pci_endpoint_test: Remove redundant 'remainder' test
  misc: pci_endpoint_test: Add consecutive BAR test
  misc: pci_endpoint_test: Add support for capabilities
  PCI: endpoint: pci-epf-test: Add support for capabilities
  PCI: endpoint: pci-epf-test: Fix check for DMA MEMCPY test
  PCI: endpoint: pci-epf-test: Set dma_chan_rx pointer to NULL on error
  PCI: dwc: Simplify config resource lookup
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/xilinx-cpm'</title>
<updated>2025-01-23T19:05:06+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-01-23T19:05:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4d3bf4e8450cf99667b0938850f72389792082b8'/>
<id>4d3bf4e8450cf99667b0938850f72389792082b8</id>
<content type='text'>
- Add DT binding and driver support for Xilinx Versal CPM5 (Thippeswamy
  Havalige)

* pci/controller/xilinx-cpm:
  PCI: xilinx-cpm: Add support for Versal CPM5 Root Port Controller 1
  dt-bindings: PCI: xilinx-cpm: Add compatible string for CPM5 host1
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Add DT binding and driver support for Xilinx Versal CPM5 (Thippeswamy
  Havalige)

* pci/controller/xilinx-cpm:
  PCI: xilinx-cpm: Add support for Versal CPM5 Root Port Controller 1
  dt-bindings: PCI: xilinx-cpm: Add compatible string for CPM5 host1
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/rockchip'</title>
<updated>2025-01-23T19:05:05+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-01-23T19:05:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=d3f0bec2a4901c0061b4aebadece5be0534a6aa9'/>
<id>d3f0bec2a4901c0061b4aebadece5be0534a6aa9</id>
<content type='text'>
- Add struct rockchip_pcie_ep kernel-doc to fix warnings (Damien Le Moal)

- Simplify clock and reset handling by using bulk interfaces (Anand Moon)

- Pass typed rockchip_pcie (not void) pointer to
  rockchip_pcie_disable_clocks() (Anand Moon)

- Return -ENOMEM, not success, when pci_epc_mem_alloc_addr() fails (Dan
  Carpenter)

* pci/controller/rockchip:
  PCI: rockchip-ep: Fix error code in rockchip_pcie_ep_init_ob_mem()
  PCI: rockchip: Refactor rockchip_pcie_disable_clocks() signature
  PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function
  PCI: rockchip: Simplify clock handling by using clk_bulk*() functions
  PCI: rockchip: Add missing fields descriptions for struct rockchip_pcie_ep
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Add struct rockchip_pcie_ep kernel-doc to fix warnings (Damien Le Moal)

- Simplify clock and reset handling by using bulk interfaces (Anand Moon)

- Pass typed rockchip_pcie (not void) pointer to
  rockchip_pcie_disable_clocks() (Anand Moon)

- Return -ENOMEM, not success, when pci_epc_mem_alloc_addr() fails (Dan
  Carpenter)

* pci/controller/rockchip:
  PCI: rockchip-ep: Fix error code in rockchip_pcie_ep_init_ob_mem()
  PCI: rockchip: Refactor rockchip_pcie_disable_clocks() signature
  PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function
  PCI: rockchip: Simplify clock handling by using clk_bulk*() functions
  PCI: rockchip: Add missing fields descriptions for struct rockchip_pcie_ep
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/rcar-ep'</title>
<updated>2025-01-23T19:05:05+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-01-23T19:05:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a306f01eb5b190d30c51aecac93439fa6ff8c69d'/>
<id>a306f01eb5b190d30c51aecac93439fa6ff8c69d</id>
<content type='text'>
- Avoid passing stack buffer as resource name (King Dix)

* pci/controller/rcar-ep:
  PCI: rcar-ep: Fix incorrect variable used when calling devm_request_mem_region()
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Avoid passing stack buffer as resource name (King Dix)

* pci/controller/rcar-ep:
  PCI: rcar-ep: Fix incorrect variable used when calling devm_request_mem_region()
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/mvebu'</title>
<updated>2025-01-23T19:05:05+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-01-23T19:05:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1854b2e019b4b4b4a809bc3513403d05638654de'/>
<id>1854b2e019b4b4b4a809bc3513403d05638654de</id>
<content type='text'>
- Add MODULE_DEVICE_TABLE() to enable module autoloading (Liao Chen)

* pci/controller/mvebu:
  PCI: mvebu: Enable module autoloading
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Add MODULE_DEVICE_TABLE() to enable module autoloading (Liao Chen)

* pci/controller/mvebu:
  PCI: mvebu: Enable module autoloading
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/microchip'</title>
<updated>2025-01-23T19:05:04+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-01-23T19:05:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8d35c2b0eb22c2607aab3c97d47746d4febfb794'/>
<id>8d35c2b0eb22c2607aab3c97d47746d4febfb794</id>
<content type='text'>
- Set up the inbound address translation based on whether the platform
  allows coherent or non-coherent DMA (Daire McNamara)

- Update DT binding such that platforms are DMA-coherent by default and
  must specify 'dma-noncoherent' if needed (Conor Dooley)

* pci/controller/microchip:
  dt-bindings: PCI: microchip,pcie-host: Allow dma-noncoherent
  PCI: microchip: Set inbound address translation for coherent or non-coherent mode
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Set up the inbound address translation based on whether the platform
  allows coherent or non-coherent DMA (Daire McNamara)

- Update DT binding such that platforms are DMA-coherent by default and
  must specify 'dma-noncoherent' if needed (Conor Dooley)

* pci/controller/microchip:
  dt-bindings: PCI: microchip,pcie-host: Allow dma-noncoherent
  PCI: microchip: Set inbound address translation for coherent or non-coherent mode
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/mediatek'</title>
<updated>2025-01-23T19:05:04+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-01-23T19:05:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1276ad01a25e62a283ebdeec20108aad0204c5d3'/>
<id>1276ad01a25e62a283ebdeec20108aad0204c5d3</id>
<content type='text'>
- Use clk_bulk_prepare_enable() instead of separate clk_bulk_prepare() and
  clk_bulk_enable() (Lorenzo Bianconi)

- Rearrange reset assert/deassert so they're both done in the *_power_up()
  callbacks (Lorenzo Bianconi)

- Document that Airoha EN7581 requires PHY init and power-on before PHY
  reset deassert, unlike other MediaTek Gen3 controllers (Lorenzo Bianconi)

- Move Airoha EN7581 post-reset delay from the en7581 clock .enable()
  method to mtk_pcie_en7581_power_up() (Lorenzo Bianconi)

- Sleep instead of delay during Airoha EN7581 power-up, since this is a
  non-atomic context (Lorenzo Bianconi)

- Skip PERST# assertion on Airoha EN7581 during probe and suspend/resume to
  avoid a hardware defect (Lorenzo Bianconi)

- Enable async probe to reduce system startup time (Douglas Anderson)

* pci/controller/mediatek:
  PCI: mediatek-gen3: Enable async probe by default
  PCI: mediatek-gen3: Avoid PCIe resetting via PERST# for Airoha EN7581 SoC
  PCI: mediatek-gen3: Rely on msleep() in mtk_pcie_en7581_power_up()
  PCI: mediatek-gen3: Move reset delay in mtk_pcie_en7581_power_up()
  PCI: mediatek-gen3: Add comment about initialization order in mtk_pcie_en7581_power_up()
  PCI: mediatek-gen3: Move reset/assert callbacks in .power_up()
  PCI: mediatek-gen3: Rely on clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up()
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Use clk_bulk_prepare_enable() instead of separate clk_bulk_prepare() and
  clk_bulk_enable() (Lorenzo Bianconi)

- Rearrange reset assert/deassert so they're both done in the *_power_up()
  callbacks (Lorenzo Bianconi)

- Document that Airoha EN7581 requires PHY init and power-on before PHY
  reset deassert, unlike other MediaTek Gen3 controllers (Lorenzo Bianconi)

- Move Airoha EN7581 post-reset delay from the en7581 clock .enable()
  method to mtk_pcie_en7581_power_up() (Lorenzo Bianconi)

- Sleep instead of delay during Airoha EN7581 power-up, since this is a
  non-atomic context (Lorenzo Bianconi)

- Skip PERST# assertion on Airoha EN7581 during probe and suspend/resume to
  avoid a hardware defect (Lorenzo Bianconi)

- Enable async probe to reduce system startup time (Douglas Anderson)

* pci/controller/mediatek:
  PCI: mediatek-gen3: Enable async probe by default
  PCI: mediatek-gen3: Avoid PCIe resetting via PERST# for Airoha EN7581 SoC
  PCI: mediatek-gen3: Rely on msleep() in mtk_pcie_en7581_power_up()
  PCI: mediatek-gen3: Move reset delay in mtk_pcie_en7581_power_up()
  PCI: mediatek-gen3: Add comment about initialization order in mtk_pcie_en7581_power_up()
  PCI: mediatek-gen3: Move reset/assert callbacks in .power_up()
  PCI: mediatek-gen3: Rely on clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up()
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/layerscape'</title>
<updated>2025-01-23T19:05:03+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-01-23T19:05:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=09b7c1627b40a649b5960e641718105e32f5b4d4'/>
<id>09b7c1627b40a649b5960e641718105e32f5b4d4</id>
<content type='text'>
- Simplify by using syscon_regmap_lookup_by_phandle_args() instead of
  syscon_regmap_lookup_by_phandle() followed by
  of_property_read_u32_array() (Krzysztof Kozlowski)

* pci/controller/layerscape:
  PCI: layerscape: Use syscon_regmap_lookup_by_phandle_args
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Simplify by using syscon_regmap_lookup_by_phandle_args() instead of
  syscon_regmap_lookup_by_phandle() followed by
  of_property_read_u32_array() (Krzysztof Kozlowski)

* pci/controller/layerscape:
  PCI: layerscape: Use syscon_regmap_lookup_by_phandle_args
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/imx6'</title>
<updated>2025-01-23T19:05:03+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-01-23T19:05:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=5b9c74b635a6941bc320b6a1201ced5ad4e99294'/>
<id>5b9c74b635a6941bc320b6a1201ced5ad4e99294</id>
<content type='text'>
- Add DT compatible string 'fsl,imx8q-pcie-ep' and driver support for
  i.MX8Q series (i.MX8QM, i.MX8QXP, and i.MX8DXL) Endpoints (Frank Li)

- Add DT binding for optional i.MX95 Refclk and driver support to enable it
  if the platform hasn't enabled it (Richard Zhu)

- Configure PHY based on controller being in Root Complex or Endpoint mode
  (Frank Li)

- Rely on dbi2 and iATU base addresses from DT via dw_pcie_get_resources()
  instead of hardcoding them in imx6 (Richard Zhu)

- Skip controller_id computation for i.MX7D since it only has one
  controller (Richard Zhu)

- Deassert apps_reset in imx_pcie_deassert_core_reset() since it is
  asserted in imx_pcie_assert_core_reset() (Richard Zhu)

- Add missing reference clock enable or disable logic for IMX6SX, IMX7D,
  IMX8MM (Richard Zhu)

- Remove redundant imx7d_pcie_init_phy() since imx7d_pcie_enable_ref_clk()
  does the same thing (Richard Zhu)

* pci/controller/imx6:
  PCI: imx6: Clean up comments and whitespace
  PCI: imx6: Remove surplus imx7d_pcie_init_phy() function
  PCI: imx6: Add missing reference clock disable logic
  PCI: imx6: Deassert apps_reset in imx_pcie_deassert_core_reset()
  PCI: imx6: Skip controller_id generation logic for i.MX7D
  PCI: imx6: Fetch dbi2 and iATU base addesses from DT
  PCI: imx6: Configure PHY based on Root Complex or Endpoint mode
  PCI: imx6: Add Refclk for i.MX95 PCIe
  dt-bindings: PCI: fsl,imx6q-pcie: Add Refclk for i.MX95 RC
  PCI: imx6: Add i.MX8Q PCIe Endpoint (EP) support
  dt-bindings: PCI: fsl,imx6q-pcie-ep: Add compatible string fsl,imx8q-pcie-ep

# Conflicts:
#	drivers/pci/controller/dwc/pci-imx6.c
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Add DT compatible string 'fsl,imx8q-pcie-ep' and driver support for
  i.MX8Q series (i.MX8QM, i.MX8QXP, and i.MX8DXL) Endpoints (Frank Li)

- Add DT binding for optional i.MX95 Refclk and driver support to enable it
  if the platform hasn't enabled it (Richard Zhu)

- Configure PHY based on controller being in Root Complex or Endpoint mode
  (Frank Li)

- Rely on dbi2 and iATU base addresses from DT via dw_pcie_get_resources()
  instead of hardcoding them in imx6 (Richard Zhu)

- Skip controller_id computation for i.MX7D since it only has one
  controller (Richard Zhu)

- Deassert apps_reset in imx_pcie_deassert_core_reset() since it is
  asserted in imx_pcie_assert_core_reset() (Richard Zhu)

- Add missing reference clock enable or disable logic for IMX6SX, IMX7D,
  IMX8MM (Richard Zhu)

- Remove redundant imx7d_pcie_init_phy() since imx7d_pcie_enable_ref_clk()
  does the same thing (Richard Zhu)

* pci/controller/imx6:
  PCI: imx6: Clean up comments and whitespace
  PCI: imx6: Remove surplus imx7d_pcie_init_phy() function
  PCI: imx6: Add missing reference clock disable logic
  PCI: imx6: Deassert apps_reset in imx_pcie_deassert_core_reset()
  PCI: imx6: Skip controller_id generation logic for i.MX7D
  PCI: imx6: Fetch dbi2 and iATU base addesses from DT
  PCI: imx6: Configure PHY based on Root Complex or Endpoint mode
  PCI: imx6: Add Refclk for i.MX95 PCIe
  dt-bindings: PCI: fsl,imx6q-pcie: Add Refclk for i.MX95 RC
  PCI: imx6: Add i.MX8Q PCIe Endpoint (EP) support
  dt-bindings: PCI: fsl,imx6q-pcie-ep: Add compatible string fsl,imx8q-pcie-ep

# Conflicts:
#	drivers/pci/controller/dwc/pci-imx6.c
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'pci/controller/dwc'</title>
<updated>2025-01-23T19:04:59+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2025-01-23T19:04:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=349b434b7a191fb120f0f7a96183fc9409b98777'/>
<id>349b434b7a191fb120f0f7a96183fc9409b98777</id>
<content type='text'>
- Fix potential string truncation in dw_pcie_edma_irq_verify() (Niklas
  Cassel)

- Don't wait for link up in DWC core if driver can detect Link Up event
  (Krishna chaitanya chundru)

- If qcom 'global' IRQ is supported for detection of Link Up events, tell
  DWC core not to wait for link up (Krishna chaitanya chundru)

- Update ICC and OPP votes after Link Up events (Krishna chaitanya chundru)

- Use dw-rockchip dll_link_up IRQ to detect Link Up and enumerate devices
  so users don't have to manually rescan (Niklas Cassel)

- In dw-rockchip, the 'sys' interrupt is required and detects Link Up
  events, so tell DWC core not to wait for link up (Niklas Cassel)

- Always stop link in dw_pcie_suspend_noirq(), which is required at least
  for i.MX8QM to re-establish link on resume (Richard Zhu)

- Drop racy and unnecessary LTSSM state check before sending PME_TURN_OFF
  message in dw_pcie_suspend_noirq() (Richard Zhu)

- Add stubs for dw_pcie_suspend_noirq() dw_pcie_resume_noirq() when
  CONFIG_PCIE_DW_HOST is not defined so drivers don't need #ifdefs (Bjorn
  Helgaas)

- Use DWC core suspend/resume functions for imx6 (Frank Li)

- Add imx6 suspend/resume support for i.MX8MQ, i.MX8Q, and i.MX95 (Richard
  Zhu)

- Add struct of_pci_range.parent_bus_addr for devices that need their
  immediate parent bus address, not the CPU address, e.g., to program an
  internal Address Translation Unit (iATU) (Frank Li)

* pci/controller/dwc:
  PCI: dwc: Simplify config resource lookup
  of: address: Add parent_bus_addr to struct of_pci_range
  PCI: imx6: Add i.MX8MQ, i.MX8Q and i.MX95 PM support
  PCI: imx6: Use DWC common suspend resume method
  PCI: dwc: Add dw_pcie_suspend_noirq(), dw_pcie_resume_noirq() stubs for !CONFIG_PCIE_DW_HOST
  PCI: dwc: Remove LTSSM state test in dw_pcie_suspend_noirq()
  PCI: dwc: Always stop link in the dw_pcie_suspend_noirq
  PCI: dw-rockchip: Don't wait for link since we can detect Link Up
  PCI: dw-rockchip: Enumerate endpoints based on dll_link_up IRQ
  PCI: qcom: Update ICC and OPP values after Link Up event
  PCI: qcom: Don't wait for link if we can detect Link Up
  PCI: dwc: Don't wait for link up if driver can detect Link Up event
  PCI: dwc: Fix potential truncation in dw_pcie_edma_irq_verify()

# Conflicts:
#	drivers/pci/controller/dwc/pci-imx6.c
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
- Fix potential string truncation in dw_pcie_edma_irq_verify() (Niklas
  Cassel)

- Don't wait for link up in DWC core if driver can detect Link Up event
  (Krishna chaitanya chundru)

- If qcom 'global' IRQ is supported for detection of Link Up events, tell
  DWC core not to wait for link up (Krishna chaitanya chundru)

- Update ICC and OPP votes after Link Up events (Krishna chaitanya chundru)

- Use dw-rockchip dll_link_up IRQ to detect Link Up and enumerate devices
  so users don't have to manually rescan (Niklas Cassel)

- In dw-rockchip, the 'sys' interrupt is required and detects Link Up
  events, so tell DWC core not to wait for link up (Niklas Cassel)

- Always stop link in dw_pcie_suspend_noirq(), which is required at least
  for i.MX8QM to re-establish link on resume (Richard Zhu)

- Drop racy and unnecessary LTSSM state check before sending PME_TURN_OFF
  message in dw_pcie_suspend_noirq() (Richard Zhu)

- Add stubs for dw_pcie_suspend_noirq() dw_pcie_resume_noirq() when
  CONFIG_PCIE_DW_HOST is not defined so drivers don't need #ifdefs (Bjorn
  Helgaas)

- Use DWC core suspend/resume functions for imx6 (Frank Li)

- Add imx6 suspend/resume support for i.MX8MQ, i.MX8Q, and i.MX95 (Richard
  Zhu)

- Add struct of_pci_range.parent_bus_addr for devices that need their
  immediate parent bus address, not the CPU address, e.g., to program an
  internal Address Translation Unit (iATU) (Frank Li)

* pci/controller/dwc:
  PCI: dwc: Simplify config resource lookup
  of: address: Add parent_bus_addr to struct of_pci_range
  PCI: imx6: Add i.MX8MQ, i.MX8Q and i.MX95 PM support
  PCI: imx6: Use DWC common suspend resume method
  PCI: dwc: Add dw_pcie_suspend_noirq(), dw_pcie_resume_noirq() stubs for !CONFIG_PCIE_DW_HOST
  PCI: dwc: Remove LTSSM state test in dw_pcie_suspend_noirq()
  PCI: dwc: Always stop link in the dw_pcie_suspend_noirq
  PCI: dw-rockchip: Don't wait for link since we can detect Link Up
  PCI: dw-rockchip: Enumerate endpoints based on dll_link_up IRQ
  PCI: qcom: Update ICC and OPP values after Link Up event
  PCI: qcom: Don't wait for link if we can detect Link Up
  PCI: dwc: Don't wait for link up if driver can detect Link Up event
  PCI: dwc: Fix potential truncation in dw_pcie_edma_irq_verify()

# Conflicts:
#	drivers/pci/controller/dwc/pci-imx6.c
</pre>
</div>
</content>
</entry>
</feed>
