<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/pci/controller, branch v5.3</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>Merge branch 'pci/trivial'</title>
<updated>2019-07-12T22:08:41+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-07-12T22:08:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=7b4b0f6b34d893be569da81ffad865a9d3a7d014'/>
<id>7b4b0f6b34d893be569da81ffad865a9d3a7d014</id>
<content type='text'>
  - Fix typos and whitespace errors (Bjorn Helgaas)

* pci/trivial:
  PCI: Fix typos and whitespace errors
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  - Fix typos and whitespace errors (Bjorn Helgaas)

* pci/trivial:
  PCI: Fix typos and whitespace errors
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/xilinx'</title>
<updated>2019-07-12T22:08:38+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-07-12T22:08:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=916f12e494d7ff7c786144ac62807bd37755efb3'/>
<id>916f12e494d7ff7c786144ac62807bd37755efb3</id>
<content type='text'>
  - Fix Xilinx NWL multi-MSI vector aliasing issue (Bharat Kumar Gogada)

* remotes/lorenzo/pci/xilinx:
  PCI: xilinx-nwl: Fix Multi MSI data programming
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  - Fix Xilinx NWL multi-MSI vector aliasing issue (Bharat Kumar Gogada)

* remotes/lorenzo/pci/xilinx:
  PCI: xilinx-nwl: Fix Multi MSI data programming
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/tegra'</title>
<updated>2019-07-12T22:08:37+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-07-12T22:08:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=6bfc0c07cdb775ff5648df4afbe3ac7ce1c766ab'/>
<id>6bfc0c07cdb775ff5648df4afbe3ac7ce1c766ab</id>
<content type='text'>
  - Reorganize Tegra AFI/PHY/REFCLK/etc functions (Manikanta Maddireddy)

  - Mask Tegra AFI_INTR in runtime suspend (Manikanta Maddireddy)

  - Fix Tegra AFI/PCIe powerup sequence (Manikanta Maddireddy)

  - Add Tegra124, Tegra132, Tegra210, and Tegra186 support for Gen2 link
    speed (Manikanta Maddireddy)

  - Advertise Tegra AER support (Manikanta Maddireddy)

  - Program Tegra210 UPHY settings (Manikanta Maddireddy)

  - Enable Tegra opportunistic UpdateFC and ACK (Manikanta Maddireddy)

  - Disable Tegra AFI dynamic clock gating (Manikanta Maddireddy)

  - Process Tegra pending DLL transactions before entering L1 or L2 to
    prevent receiver errors (Manikanta Maddireddy)

  - Enable Tegra xclk clock clamping in L1 (Manikanta Maddireddy)

  - Increase Tegra deskew retry time (Manikanta Maddireddy)

  - Work around Tegra hardware RAW erratum (Manikanta Maddireddy)

  - Update Tegra210 flow control timer frequency (Manikanta Maddireddy)

  - Work around Tegra Gen1/Gen2 link number negotiation issue (Manikanta
    Maddireddy)

  - Work around Tegra PLLE power down issue (Manikanta Maddireddy)

  - Program Tegra20 to support cacheable upstream transactions (Manikanta
    Maddireddy)

  - Log Tegra PRSNT_SENSE_IRQ as debug, not err (Manikanta Maddireddy)

  - Add register offset for third Root Port on Tegra186 and Tegra30
    (Manikanta Maddireddy)

  - Document Tegra PCIe DPD pinctrl property (Manikanta Maddireddy)

  - Put Tegra PEX CLK &amp; BIAS pads in DPD mode to reduce power usage when
    powergated (Manikanta Maddireddy)

  - Add generic DT binding for "reset-gpios" property (Manikanta
    Maddireddy)

  - Add Tegra support for GPIO-based PERST# (Manikanta Maddireddy)

  - Enable Relaxed Ordering only for Tegra20 &amp; Tegra30 (Vidya Sagar)

* remotes/lorenzo/pci/tegra:
  PCI: tegra: Enable Relaxed Ordering only for Tegra20 &amp; Tegra30
  PCI: tegra: Change link retry log level to debug
  PCI: tegra: Add support for GPIO based PERST#
  PCI: Add DT binding for "reset-gpios" property
  PCI: tegra: Put PEX CLK &amp; BIAS pads in DPD mode
  dt-bindings: pci: tegra: Document PCIe DPD pinctrl optional prop
  PCI: tegra: Add AFI_PEX2_CTRL reg offset as part of SoC struct
  PCI: tegra: Change PRSNT_SENSE IRQ log to debug
  PCI: tegra: Program AFI_CACHE_BAR_{0,1}_{ST,SZ} registers only for Tegra20
  PCI: tegra: Fix PLLE power down issue due to CLKREQ# signal
  PCI: tegra: Set target speed as Gen1 before starting LTSSM
  PCI: tegra: Update flow control timer frequency in Tegra210
  PCI: tegra: Add SW fixup for RAW violations
  PCI: tegra: Increase the deskew retry time
  PCI: tegra: Enable PCIe xclk clock clamping
  PCI: tegra: Process pending DLL transactions before entering L1 or L2
  PCI: tegra: Disable AFI dynamic clock gating
  PCI: tegra: Enable opportunistic UpdateFC and ACK
  PCI: tegra: Program UPHY electrical settings for Tegra210
  PCI: tegra: Advertise PCIe Advanced Error Reporting (AER) capability
  PCI: tegra: Add PCIe Gen2 link speed support
  PCI: tegra: Fix PCIe host power up sequence
  PCI: tegra: Mask AFI_INTR in runtime suspend
  PCI: tegra: Rearrange Tegra PCIe driver functions
  PCI: tegra: Handle failure cases in tegra_pcie_power_on()
  soc/tegra: pmc: Export tegra_powergate_power_on()
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  - Reorganize Tegra AFI/PHY/REFCLK/etc functions (Manikanta Maddireddy)

  - Mask Tegra AFI_INTR in runtime suspend (Manikanta Maddireddy)

  - Fix Tegra AFI/PCIe powerup sequence (Manikanta Maddireddy)

  - Add Tegra124, Tegra132, Tegra210, and Tegra186 support for Gen2 link
    speed (Manikanta Maddireddy)

  - Advertise Tegra AER support (Manikanta Maddireddy)

  - Program Tegra210 UPHY settings (Manikanta Maddireddy)

  - Enable Tegra opportunistic UpdateFC and ACK (Manikanta Maddireddy)

  - Disable Tegra AFI dynamic clock gating (Manikanta Maddireddy)

  - Process Tegra pending DLL transactions before entering L1 or L2 to
    prevent receiver errors (Manikanta Maddireddy)

  - Enable Tegra xclk clock clamping in L1 (Manikanta Maddireddy)

  - Increase Tegra deskew retry time (Manikanta Maddireddy)

  - Work around Tegra hardware RAW erratum (Manikanta Maddireddy)

  - Update Tegra210 flow control timer frequency (Manikanta Maddireddy)

  - Work around Tegra Gen1/Gen2 link number negotiation issue (Manikanta
    Maddireddy)

  - Work around Tegra PLLE power down issue (Manikanta Maddireddy)

  - Program Tegra20 to support cacheable upstream transactions (Manikanta
    Maddireddy)

  - Log Tegra PRSNT_SENSE_IRQ as debug, not err (Manikanta Maddireddy)

  - Add register offset for third Root Port on Tegra186 and Tegra30
    (Manikanta Maddireddy)

  - Document Tegra PCIe DPD pinctrl property (Manikanta Maddireddy)

  - Put Tegra PEX CLK &amp; BIAS pads in DPD mode to reduce power usage when
    powergated (Manikanta Maddireddy)

  - Add generic DT binding for "reset-gpios" property (Manikanta
    Maddireddy)

  - Add Tegra support for GPIO-based PERST# (Manikanta Maddireddy)

  - Enable Relaxed Ordering only for Tegra20 &amp; Tegra30 (Vidya Sagar)

* remotes/lorenzo/pci/tegra:
  PCI: tegra: Enable Relaxed Ordering only for Tegra20 &amp; Tegra30
  PCI: tegra: Change link retry log level to debug
  PCI: tegra: Add support for GPIO based PERST#
  PCI: Add DT binding for "reset-gpios" property
  PCI: tegra: Put PEX CLK &amp; BIAS pads in DPD mode
  dt-bindings: pci: tegra: Document PCIe DPD pinctrl optional prop
  PCI: tegra: Add AFI_PEX2_CTRL reg offset as part of SoC struct
  PCI: tegra: Change PRSNT_SENSE IRQ log to debug
  PCI: tegra: Program AFI_CACHE_BAR_{0,1}_{ST,SZ} registers only for Tegra20
  PCI: tegra: Fix PLLE power down issue due to CLKREQ# signal
  PCI: tegra: Set target speed as Gen1 before starting LTSSM
  PCI: tegra: Update flow control timer frequency in Tegra210
  PCI: tegra: Add SW fixup for RAW violations
  PCI: tegra: Increase the deskew retry time
  PCI: tegra: Enable PCIe xclk clock clamping
  PCI: tegra: Process pending DLL transactions before entering L1 or L2
  PCI: tegra: Disable AFI dynamic clock gating
  PCI: tegra: Enable opportunistic UpdateFC and ACK
  PCI: tegra: Program UPHY electrical settings for Tegra210
  PCI: tegra: Advertise PCIe Advanced Error Reporting (AER) capability
  PCI: tegra: Add PCIe Gen2 link speed support
  PCI: tegra: Fix PCIe host power up sequence
  PCI: tegra: Mask AFI_INTR in runtime suspend
  PCI: tegra: Rearrange Tegra PCIe driver functions
  PCI: tegra: Handle failure cases in tegra_pcie_power_on()
  soc/tegra: pmc: Export tegra_powergate_power_on()
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/qcom'</title>
<updated>2019-07-12T22:08:35+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-07-12T22:08:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=757410bd97ca102cacf30ab9b686f3f5f0c58c6a'/>
<id>757410bd97ca102cacf30ab9b686f3f5f0c58c6a</id>
<content type='text'>
  - Move qcom driver to bulk clock API (Bjorn Andersson)

  - Add Qualcomm QCS404 PCIe controller support (Bjorn Andersson)

  - Ensure Qualcomm PERST is asserted for at least 100ms (Niklas Cassel)

* remotes/lorenzo/pci/qcom:
  PCI: qcom: Ensure that PERST is asserted for at least 100 ms
  PCI: qcom: Add QCS404 PCIe controller support
  dt-bindings: PCI: qcom: Add QCS404 to the binding
  PCI: qcom: Use clk bulk API for 2.4.0 controllers
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  - Move qcom driver to bulk clock API (Bjorn Andersson)

  - Add Qualcomm QCS404 PCIe controller support (Bjorn Andersson)

  - Ensure Qualcomm PERST is asserted for at least 100ms (Niklas Cassel)

* remotes/lorenzo/pci/qcom:
  PCI: qcom: Ensure that PERST is asserted for at least 100 ms
  PCI: qcom: Add QCS404 PCIe controller support
  dt-bindings: PCI: qcom: Add QCS404 to the binding
  PCI: qcom: Use clk bulk API for 2.4.0 controllers
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/mobiveil'</title>
<updated>2019-07-12T22:08:34+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-07-12T22:08:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3d663fc0f2b0edc2fb0967f36f035a5dcbcb03c5'/>
<id>3d663fc0f2b0edc2fb0967f36f035a5dcbcb03c5</id>
<content type='text'>
  - Unify mobiveil register accessors (Hou Zhiqiang)

  - Remove MSI_FLAG_MULTI_PCI_MSI since mobiveil hardware doesn't support
    Multiple MSI (Hou Zhiqiang)

  - Program outbound windows with base address from DT instead of assuming
    zero (Hou Zhiqiang)

  - Skip "safe" list traversal when it's unnecessary (Hou Zhiqiang)

  - Initialize WIN_NUM_0 explicitly for CFG outbound transactions (Hou
    Zhiqiang)

  - Use WIN_NUM_0 for MEM inbound transactions (Hou Zhiqiang)

  - Fix up mobiveil Class Code to PCI_CLASS_BRIDGE_PCI (Hou Zhiqiang)

  - Wait for link-up before enumerating devices, not while initializing
    host (Hou Zhiqiang)

  - Move IRQ chained handler setup out of DT code (Hou Zhiqiang)

  - Set primary/secondary/subordinate bus numbers (Hou Zhiqiang)

  - Fix "valid device" check to allow root bus device 0 to be
    multi-function (Hou Zhiqiang)

  - Make DT "gpio_slave" and "apb_csr" properties optional (Hou Zhiqiang)

  - Refactor MEM/IO outbound window initialization (Hou Zhiqiang)

  - Fix validity check for inbound/outbound window programming (Hou
    Zhiqiang)

  - Initialize and preserve window control bits (Hou Zhiqiang)

  - Fix 64-bit outbound window setup (both CPU and PCI addresses) (Hou
    Zhiqiang)

  - Move IO port setup to host init (Hou Zhiqiang)

  - Fix infinite loop in INTx ISR (Hou Zhiqiang)

  - Fix INTx interrupt clearing to avoid missed interrupts (Hou Zhiqiang)

* remotes/lorenzo/pci/mobiveil:
  PCI: mobiveil: Fix INTx interrupt clearing in mobiveil_pcie_isr()
  PCI: mobiveil: Fix infinite-loop in the INTx handling function
  PCI: mobiveil: Move PCIe PIO enablement out of inbound window routine
  PCI: mobiveil: Add upper 32-bit PCI base address setup in inbound window
  PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound window
  PCI: mobiveil: Mask out hardcoded bits in inbound/outbound windows setup
  PCI: mobiveil: Clear the control fields before updating it
  PCI: mobiveil: Add configured inbound windows counter
  PCI: mobiveil: Fix the valid check for inbound and outbound windows
  PCI: mobiveil: Clean-up program_{ib/ob}_windows()
  PCI: mobiveil: Remove an unnecessary return value check
  PCI: mobiveil: Fix error return values
  PCI: mobiveil: Refactor the MEM/IO outbound window initialization
  PCI: mobiveil: Make some register updates more readable
  PCI: mobiveil: Reformat the code for readability
  dt-bindings: PCI: mobiveil: Change gpio_slave and apb_csr to optional
  PCI: mobiveil: Fix devfn check in mobiveil_pcie_valid_device()
  PCI: mobiveil: Initialize Primary/Secondary/Subordinate bus numbers
  PCI: mobiveil: Move IRQ chained handler setup out of DT parse
  PCI: mobiveil: Move the link up waiting out of mobiveil_host_init()
  PCI: mobiveil: Fix the Class Code field
  PCI: mobiveil: Use the 1st inbound window for MEM inbound transactions
  PCI: mobiveil: Use WIN_NUM_0 explicitly for CFG outbound window
  PCI: mobiveil: Update the resource list traversal function
  PCI: mobiveil: Fix PCI base address in MEM/IO outbound windows
  PCI: mobiveil: Remove the flag MSI_FLAG_MULTI_PCI_MSI
  PCI: mobiveil: Unify register accessors
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  - Unify mobiveil register accessors (Hou Zhiqiang)

  - Remove MSI_FLAG_MULTI_PCI_MSI since mobiveil hardware doesn't support
    Multiple MSI (Hou Zhiqiang)

  - Program outbound windows with base address from DT instead of assuming
    zero (Hou Zhiqiang)

  - Skip "safe" list traversal when it's unnecessary (Hou Zhiqiang)

  - Initialize WIN_NUM_0 explicitly for CFG outbound transactions (Hou
    Zhiqiang)

  - Use WIN_NUM_0 for MEM inbound transactions (Hou Zhiqiang)

  - Fix up mobiveil Class Code to PCI_CLASS_BRIDGE_PCI (Hou Zhiqiang)

  - Wait for link-up before enumerating devices, not while initializing
    host (Hou Zhiqiang)

  - Move IRQ chained handler setup out of DT code (Hou Zhiqiang)

  - Set primary/secondary/subordinate bus numbers (Hou Zhiqiang)

  - Fix "valid device" check to allow root bus device 0 to be
    multi-function (Hou Zhiqiang)

  - Make DT "gpio_slave" and "apb_csr" properties optional (Hou Zhiqiang)

  - Refactor MEM/IO outbound window initialization (Hou Zhiqiang)

  - Fix validity check for inbound/outbound window programming (Hou
    Zhiqiang)

  - Initialize and preserve window control bits (Hou Zhiqiang)

  - Fix 64-bit outbound window setup (both CPU and PCI addresses) (Hou
    Zhiqiang)

  - Move IO port setup to host init (Hou Zhiqiang)

  - Fix infinite loop in INTx ISR (Hou Zhiqiang)

  - Fix INTx interrupt clearing to avoid missed interrupts (Hou Zhiqiang)

* remotes/lorenzo/pci/mobiveil:
  PCI: mobiveil: Fix INTx interrupt clearing in mobiveil_pcie_isr()
  PCI: mobiveil: Fix infinite-loop in the INTx handling function
  PCI: mobiveil: Move PCIe PIO enablement out of inbound window routine
  PCI: mobiveil: Add upper 32-bit PCI base address setup in inbound window
  PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound window
  PCI: mobiveil: Mask out hardcoded bits in inbound/outbound windows setup
  PCI: mobiveil: Clear the control fields before updating it
  PCI: mobiveil: Add configured inbound windows counter
  PCI: mobiveil: Fix the valid check for inbound and outbound windows
  PCI: mobiveil: Clean-up program_{ib/ob}_windows()
  PCI: mobiveil: Remove an unnecessary return value check
  PCI: mobiveil: Fix error return values
  PCI: mobiveil: Refactor the MEM/IO outbound window initialization
  PCI: mobiveil: Make some register updates more readable
  PCI: mobiveil: Reformat the code for readability
  dt-bindings: PCI: mobiveil: Change gpio_slave and apb_csr to optional
  PCI: mobiveil: Fix devfn check in mobiveil_pcie_valid_device()
  PCI: mobiveil: Initialize Primary/Secondary/Subordinate bus numbers
  PCI: mobiveil: Move IRQ chained handler setup out of DT parse
  PCI: mobiveil: Move the link up waiting out of mobiveil_host_init()
  PCI: mobiveil: Fix the Class Code field
  PCI: mobiveil: Use the 1st inbound window for MEM inbound transactions
  PCI: mobiveil: Use WIN_NUM_0 explicitly for CFG outbound window
  PCI: mobiveil: Update the resource list traversal function
  PCI: mobiveil: Fix PCI base address in MEM/IO outbound windows
  PCI: mobiveil: Remove the flag MSI_FLAG_MULTI_PCI_MSI
  PCI: mobiveil: Unify register accessors
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/hv'</title>
<updated>2019-07-12T22:08:33+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-07-12T22:08:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=caa98440ac537872f26792598471c658b5a2f599'/>
<id>caa98440ac537872f26792598471c658b5a2f599</id>
<content type='text'>
  - Fix Hyper-V use-after-free in eject path (Dexuan Cui)

* remotes/lorenzo/pci/hv:
  PCI: hv: Fix a use-after-free bug in hv_eject_device_work()
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  - Fix Hyper-V use-after-free in eject path (Dexuan Cui)

* remotes/lorenzo/pci/hv:
  PCI: hv: Fix a use-after-free bug in hv_eject_device_work()
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/dwc'</title>
<updated>2019-07-12T22:08:32+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-07-12T22:08:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=6c90132f0e5f6c522ac3f6bd1f91961cb77fb9b6'/>
<id>6c90132f0e5f6c522ac3f6bd1f91961cb77fb9b6</id>
<content type='text'>
  - Add dwc API support to de-initialize host (Vidya Sagar)

  - Clean up dwc DBI,ATU read and write APIs (Vidya Sagar)

  - Export dwc APIs to support .remove() so drivers can be modular (Vidya
    Sagar)

  - Simplify imx6 Kconfig dependencies (Leonard Crestez)

  - Fix dra7xx build error when !CONFIG_GPIOLIB (YueHaibing)

* remotes/lorenzo/pci/dwc:
  PCI: dwc: pci-dra7xx: Fix compilation when !CONFIG_GPIOLIB
  PCI: imx6: Simplify Kconfig depends on
  PCI: dwc: Export APIs to support .remove() implementation
  PCI: dwc: Cleanup DBI,ATU read and write APIs
  PCI: dwc: Add API support to de-initialize host
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  - Add dwc API support to de-initialize host (Vidya Sagar)

  - Clean up dwc DBI,ATU read and write APIs (Vidya Sagar)

  - Export dwc APIs to support .remove() so drivers can be modular (Vidya
    Sagar)

  - Simplify imx6 Kconfig dependencies (Leonard Crestez)

  - Fix dra7xx build error when !CONFIG_GPIOLIB (YueHaibing)

* remotes/lorenzo/pci/dwc:
  PCI: dwc: pci-dra7xx: Fix compilation when !CONFIG_GPIOLIB
  PCI: imx6: Simplify Kconfig depends on
  PCI: dwc: Export APIs to support .remove() implementation
  PCI: dwc: Cleanup DBI,ATU read and write APIs
  PCI: dwc: Add API support to de-initialize host
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'remotes/lorenzo/pci/armada'</title>
<updated>2019-07-12T22:08:31+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-07-12T22:08:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=8e7bc41cdcfe64f891a3e1b4913e1a4c107a3465'/>
<id>8e7bc41cdcfe64f891a3e1b4913e1a4c107a3465</id>
<content type='text'>
  - Add Armada8k PHYs support (Miquel Raynal)

* remotes/lorenzo/pci/armada:
  PCI: armada8k: Add PHYs support
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  - Add Armada8k PHYs support (Miquel Raynal)

* remotes/lorenzo/pci/armada:
  PCI: armada8k: Add PHYs support
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: dwc: pci-dra7xx: Fix compilation when !CONFIG_GPIOLIB</title>
<updated>2019-07-09T16:25:13+00:00</updated>
<author>
<name>YueHaibing</name>
<email>yuehaibing@huawei.com</email>
</author>
<published>2019-06-14T15:40:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=381ed79c8655a40268ee7391f716edd90c5c3a97'/>
<id>381ed79c8655a40268ee7391f716edd90c5c3a97</id>
<content type='text'>
If CONFIG_GPIOLIB is not selected the compilation results in the
following build errors:

drivers/pci/controller/dwc/pci-dra7xx.c:
 In function dra7xx_pcie_probe:
drivers/pci/controller/dwc/pci-dra7xx.c:777:10:
 error: implicit declaration of function devm_gpiod_get_optional;
 did you mean devm_regulator_get_optional? [-Werror=implicit-function-declaration]

  reset = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH);

drivers/pci/controller/dwc/pci-dra7xx.c:778:45: error: ‘GPIOD_OUT_HIGH’
undeclared (first use in this function); did you mean ‘GPIOF_INIT_HIGH’?
  reset = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH);
                                             ^~~~~~~~~~~~~~
                                             GPIOF_INIT_HIGH

Fix them by including the appropriate header file.

Reported-by: Hulk Robot &lt;hulkci@huawei.com&gt;
Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
[lorenzo.pieralisi@arm.com: commit log]
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If CONFIG_GPIOLIB is not selected the compilation results in the
following build errors:

drivers/pci/controller/dwc/pci-dra7xx.c:
 In function dra7xx_pcie_probe:
drivers/pci/controller/dwc/pci-dra7xx.c:777:10:
 error: implicit declaration of function devm_gpiod_get_optional;
 did you mean devm_regulator_get_optional? [-Werror=implicit-function-declaration]

  reset = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH);

drivers/pci/controller/dwc/pci-dra7xx.c:778:45: error: ‘GPIOD_OUT_HIGH’
undeclared (first use in this function); did you mean ‘GPIOF_INIT_HIGH’?
  reset = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH);
                                             ^~~~~~~~~~~~~~
                                             GPIOF_INIT_HIGH

Fix them by including the appropriate header file.

Reported-by: Hulk Robot &lt;hulkci@huawei.com&gt;
Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
[lorenzo.pieralisi@arm.com: commit log]
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Fix typos and whitespace errors</title>
<updated>2019-07-09T12:24:53+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-05-30T13:05:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=f6b6aefee70aa5261deec7feab80c249bf58397f'/>
<id>f6b6aefee70aa5261deec7feab80c249bf58397f</id>
<content type='text'>
Fix typos in drivers/pci.  Comment and whitespace changes only.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Reviewed-by: Randy Dunlap &lt;rdunlap@infradead.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix typos in drivers/pci.  Comment and whitespace changes only.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Reviewed-by: Randy Dunlap &lt;rdunlap@infradead.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
