linux-stable.git/drivers/pci/controller, branch v5.0.4

PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags

2019-03-23T19:11:27+00:00

commit 33776d059630e5045ea9ccf756c74de8f9cc86de upstream.

Depending on the capabilities of the PCI controller/platform, the
PCI-to-PCI bridge emulation behavior might need to be different. For
example, on platforms that use the pci-mvebu code, we currently don't
support prefetchable memory BARs, so the corresponding fields in the
PCI-to-PCI bridge configuration space should be read-only.

To implement this, extend pci_bridge_emul_init() to take a "flags"
argument, with currently one flag supported:

PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR

that will make the prefetchable memory base and limit registers
read-only.

The pci-mvebu and pci-aardvark drivers are updated accordingly.

Fixes: 1f08673eef123 ("PCI: mvebu: Convert to PCI emulated bridge config space")
Reported-by: Luís Mendes 
Reported-by: Leigh Brown 
Tested-by: Leigh Brown 
Tested-by: Luis Mendes 
Signed-off-by: Thomas Petazzoni 
Signed-off-by: Lorenzo Pieralisi 
Cc: stable@vger.kernel.org
Cc: Luís Mendes 
Cc: Leigh Brown 
Signed-off-by: Greg Kroah-Hartman

PCI: dwc: skip MSI init if MSIs have been explicitly disabled

2019-03-23T19:11:27+00:00

commit 3afc8299f39a27b60e1519a28e18878ce878e7dd upstream.

Since 7c5925afbc58 (PCI: dwc: Move MSI IRQs allocation to IRQ domains
hierarchical API) the MSI init claims one of the controller IRQs as a
chained IRQ line for the MSI controller. On some designs, like the i.MX6,
this line is shared with a PCIe legacy IRQ. When the line is claimed for
the MSI domain, any device trying to use this legacy IRQs will fail to
request this IRQ line.

As MSI and legacy IRQs are already mutually exclusive on the DWC core,
as the core won't forward any legacy IRQs once any MSI has been enabled,
users wishing to use legacy IRQs already need to explictly disable MSI
support (usually via the pci=nomsi kernel commandline option). To avoid
any issues with MSI conflicting with legacy IRQs, just skip all of the
DWC MSI initalization, including the IRQ line claim, when MSI is disabled.

Fixes: 7c5925afbc58 ("PCI: dwc: Move MSI IRQs allocation to IRQ domains hierarchical API")
Tested-by: Tim Harvey 
Signed-off-by: Lucas Stach 
Signed-off-by: Lorenzo Pieralisi 
Acked-by: Gustavo Pimentel 
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman

PCI: qcom: Don't deassert reset GPIO during probe

2019-03-23T19:11:27+00:00

commit 02b485e31d98265189b91f3e69c43df2ed50610c upstream.

Acquiring the reset GPIO low means that reset is being deasserted, this
is followed almost immediately with qcom_pcie_host_init() asserting it,
initializing it and then finally deasserting it again, for the link to
come up.

Some PCIe devices requires a minimum time between the initial deassert
and subsequent reset cycles. In a platform that boots with the reset
GPIO asserted this requirement is being violated by this deassert/assert
pulse.

Acquire the reset GPIO high to prevent this situation by matching the
state to the subsequent asserted state.

Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Bjorn Andersson 
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi 
Acked-by: Stanimir Varbanov 
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman

Merge tag 'pci-v5.0-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

2019-02-01T07:06:17+00:00

Pull PCI fixes from Bjorn Helgaas:

 - Revert armada8k GPIO reset change that broke Macchiatobin booting
   (Baruch Siach)

 - Use actual size config reads on ARM cns3xxx (Koen Vandeputte)

 - Fix ARM cns3xxx config write alignment issue (Koen Vandeputte)

 - Fix imx6 PHY device link error checking (Leonard Crestez)

 - Fix imx6 probe failure on chips without separate PCI power domain
   (Leonard Crestez)

* tag 'pci-v5.0-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  Revert "PCI: armada8k: Add support for gpio controlled reset signal"
  ARM: cns3xxx: Use actual size reads for PCIe
  ARM: cns3xxx: Fix writing to wrong PCI config registers after alignment
  PCI: imx: Fix checking pd_pcie_phy device link addition
  PCI: imx: Fix probe failure without power domain

Revert "PCI: armada8k: Add support for gpio controlled reset signal"

2019-01-31T21:07:29+00:00

Revert commit 3d71746c42 ("PCI: armada8k: Add support for gpio controlled
reset signal").

That commit breaks boot on Macchiatobin board when a Mellanox NIC is
present in the PCIe slot.

It turns out that full reset cycle requires first comphy serdes
initialization. Reset signal toggle without comphy initialization makes
access to PCI configuration registers stall indefinitely. U-Boot toggles
the Macchiatobin PCIe reset line already at boot, after initializing the
comphy serdes.

So while commit 3d71746c42 ("PCI: armada8k: Add support for gpio controlled
reset signal") enables PCIe on platforms that U-Boot does not touch the
reset line (like Clearfog GT-8K), it breaks PCIe (and boot) on the
Macchiatobin board.

Revert commit 3d71746c42 ("PCI: armada8k: Add support for gpio controlled
reset signal") entirely to fix the Macchiatobin regression.

Reported-by: Sven Auhagen 
Signed-off-by: Baruch Siach 
Signed-off-by: Lorenzo Pieralisi

PCI: imx: Fix checking pd_pcie_phy device link addition

2019-01-31T21:01:01+00:00

The check on the device_link_add() return value is wrong;
this leads to erroneous code execution, so fix it.

Fixes: 3f7cceeab895 ("PCI: imx: Add multi-pd support")
Signed-off-by: Leonard Crestez 
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi

PCI: imx: Fix probe failure without power domain

2019-01-31T20:59:50+00:00

On chips without a separate power domain for PCI (such as 6q/6qp) the
imx6_pcie_attach_pd() function incorrectly returns an error.

Fix by returning 0 if dev_pm_domain_attach_by_name() does not find
anything.

Fixes: 3f7cceeab895 ("PCI: imx: Add multi-pd support")
Reported-by: Lukas F.Hartmann 
Signed-off-by: Leonard Crestez 
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi

Merge tag 'remove-dma_zalloc_coherent-5.0' of git://git.infradead.org/users/hch/dma-mapping

2019-01-12T18:52:40+00:00

Pull dma_zalloc_coherent() removal from Christoph Hellwig:
 "We've always had a weird situation around dma_zalloc_coherent. To
  safely support mapping the allocations to userspace major
  architectures like x86 and arm have always zeroed allocations from
  dma_alloc_coherent, but a couple other architectures were missing that
  zeroing either always or in corner cases.

  Then later we grew anothe dma_zalloc_coherent interface to explicitly
  request zeroing, but that just added __GFP_ZERO to the allocation
  flags, which for some allocators that didn't end up using the page
  allocator ended up being a no-op and still not zeroing the
  allocations.

  So for this merge window I fixed up all remaining architectures to
  zero the memory in dma_alloc_coherent, and made dma_zalloc_coherent a
  no-op wrapper around dma_alloc_coherent, which fixes all of the above
  issues.

  dma_zalloc_coherent is now pointless and can go away, and Luis helped
  me writing a cocchinelle script and patch series to kill it, which I
  think we should apply now just after -rc1 to finally settle these
  issue"

* tag 'remove-dma_zalloc_coherent-5.0' of git://git.infradead.org/users/hch/dma-mapping:
  dma-mapping: remove dma_zalloc_coherent()
  cross-tree: phase out dma_zalloc_coherent() on headers
  cross-tree: phase out dma_zalloc_coherent()

PCI: amlogic: Fix build failure due to missing gpio header

2019-01-08T15:01:44+00:00

Building the driver when GPIOLIB=n is not selected is causing the following
compilation failure:

  drivers/pci/controller/dwc/pci-meson.c: In function 'meson_pcie_assert_reset':
  drivers/pci/controller/dwc/pci-meson.c:290:2: error: implicit declaration of function 'gpiod_set_value_cansleep'; did you mean 'gpio_set_value_cansleep'? [-Werror=implicit-function-declaration]
    gpiod_set_value_cansleep(mp->reset_gpio, 0);
    ^~~~~~~~~~~~~~~~~~~~~~~~
    gpio_set_value_cansleep
  drivers/pci/controller/dwc/pci-meson.c: In function 'meson_pcie_probe':
  drivers/pci/controller/dwc/pci-meson.c:540:19: error: implicit declaration of function 'devm_gpiod_get'; did you mean 'devm_gpio_free'? [-Werror=implicit-function-declaration]
    mp->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
		     ^~~~~~~~~~~~~~
		     devm_gpio_free
  drivers/pci/controller/dwc/pci-meson.c:540:48: error: 'GPIOD_OUT_LOW' undeclared (first use in this function); did you mean 'GPIOF_INIT_LOW'?
    mp->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
						  ^~~~~~~~~~~~~
						  GPIOF_INIT_LOW

Add the missing linux/gpio/consumer.h header to fix it.

Fixes: 9c0ef6d34fdb ("PCI: amlogic: Add the Amlogic Meson PCIe controller driver")
Signed-off-by: Corentin Labbe 
[lorenzo.pieralisi@arm.com: commit log]
Signed-off-by: Lorenzo Pieralisi 
Signed-off-by: Bjorn Helgaas

cross-tree: phase out dma_zalloc_coherent()

2019-01-08T12:58:37+00:00

We already need to zero out memory for dma_alloc_coherent(), as such
using dma_zalloc_coherent() is superflous. Phase it out.

This change was generated with the following Coccinelle SmPL patch:

@ replace_dma_zalloc_coherent @
expression dev, size, data, handle, flags;
@@

-dma_zalloc_coherent(dev, size, handle, flags)
+dma_alloc_coherent(dev, size, handle, flags)

Suggested-by: Christoph Hellwig 
Signed-off-by: Luis Chamberlain 
[hch: re-ran the script on the latest tree]
Signed-off-by: Christoph Hellwig