<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/nvmem, branch linux-4.11.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>nvmem: core: fix leaks on registration errors</title>
<updated>2017-07-21T05:00:13+00:00</updated>
<author>
<name>Johan Hovold</name>
<email>johan@kernel.org</email>
</author>
<published>2017-06-09T09:59:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9b5eaef15cfc272707a71e4176c714eedcd8a093'/>
<id>9b5eaef15cfc272707a71e4176c714eedcd8a093</id>
<content type='text'>
commit 3360acdf839170b612f5b212539694c20e3f16d0 upstream.

Make sure to deregister and release the nvmem device and underlying
memory on registration errors.

Note that the private data must be freed using put_device() once the
struct device has been initialised.

Also note that there's a related reference leak in the deregistration
function as reported by Mika Westerberg which is being fixed separately.

Fixes: b6c217ab9be6 ("nvmem: Add backwards compatibility support for older EEPROM drivers.")
Fixes: eace75cfdcf7 ("nvmem: Add a simple NVMEM framework for nvmem providers")
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Cc: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Cc: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Johan Hovold &lt;johan@kernel.org&gt;
Acked-by: Andrey Smirnov &lt;andrew.smirnov@gmail.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 3360acdf839170b612f5b212539694c20e3f16d0 upstream.

Make sure to deregister and release the nvmem device and underlying
memory on registration errors.

Note that the private data must be freed using put_device() once the
struct device has been initialised.

Also note that there's a related reference leak in the deregistration
function as reported by Mika Westerberg which is being fixed separately.

Fixes: b6c217ab9be6 ("nvmem: Add backwards compatibility support for older EEPROM drivers.")
Fixes: eace75cfdcf7 ("nvmem: Add a simple NVMEM framework for nvmem providers")
Cc: Andrew Lunn &lt;andrew@lunn.ch&gt;
Cc: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Cc: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Johan Hovold &lt;johan@kernel.org&gt;
Acked-by: Andrey Smirnov &lt;andrew.smirnov@gmail.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>nvmem: core: Allow getting nvmem cell with a NULL cell id</title>
<updated>2017-01-25T10:49:39+00:00</updated>
<author>
<name>Vivek Gautam</name>
<email>vivek.gautam@codeaurora.org</email>
</author>
<published>2017-01-22T23:02:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=fd0c478c0dd800449e2d70025ef742679a16a8de'/>
<id>fd0c478c0dd800449e2d70025ef742679a16a8de</id>
<content type='text'>
The nvmem cell with a NULL cell name/id should be the one
with no accompanying 'nvmem-cell-names' property, and thus
will be the cell at index 0 in the device tree.
So, we default to index 0 and update the cell index only when
nvmem cell name id exists.

Suggested-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The nvmem cell with a NULL cell name/id should be the one
with no accompanying 'nvmem-cell-names' property, and thus
will be the cell at index 0 in the device tree.
So, we default to index 0 and update the cell index only when
nvmem cell name id exists.

Suggested-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nvmem: core: Correct a bunch of function documentations</title>
<updated>2017-01-25T10:49:39+00:00</updated>
<author>
<name>Vivek Gautam</name>
<email>vivek.gautam@codeaurora.org</email>
</author>
<published>2017-01-22T23:02:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=29143268ec7d292ae4531bdf8deb6e55239a0051'/>
<id>29143268ec7d292ae4531bdf8deb6e55239a0051</id>
<content type='text'>
Correct the documentation for arguments to a number
of functions.

Signed-off-by: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Correct the documentation for arguments to a number
of functions.

Signed-off-by: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nvmem: core: Allow ignoring length when reading a cell</title>
<updated>2017-01-25T10:49:39+00:00</updated>
<author>
<name>Vivek Gautam</name>
<email>vivek.gautam@codeaurora.org</email>
</author>
<published>2017-01-22T23:02:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=3b4a687726f0019115bd903d9724db6cdcbb00fe'/>
<id>3b4a687726f0019115bd903d9724db6cdcbb00fe</id>
<content type='text'>
nvmem_cell_read() API fills in the argument 'len' with
the number of bytes read from the cell. Many users don't
care about this length value. So allow users to pass a
NULL pointer to this len field.

Signed-off-by: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
nvmem_cell_read() API fills in the argument 'len' with
the number of bytes read from the cell. Many users don't
care about this length value. So allow users to pass a
NULL pointer to this len field.

Signed-off-by: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nvmem: octop: Add support for imx6ul</title>
<updated>2017-01-25T10:49:39+00:00</updated>
<author>
<name>Bai Ping</name>
<email>ping.bai@nxp.com</email>
</author>
<published>2017-01-22T23:02:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=4aa2b480204638c3b8801132efa9cb4af6000a05'/>
<id>4aa2b480204638c3b8801132efa9cb4af6000a05</id>
<content type='text'>
i.MX6UL is an new SOC of i.MX6 family. Enable ocotp
driver support for this SOC.

Signed-off-by: Bai Ping &lt;ping.bai@nxp.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
i.MX6UL is an new SOC of i.MX6 family. Enable ocotp
driver support for this SOC.

Signed-off-by: Bai Ping &lt;ping.bai@nxp.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nvmem: fix nvmem_cell_read() return type doc</title>
<updated>2017-01-04T17:22:47+00:00</updated>
<author>
<name>Brian Norris</name>
<email>briannorris@chromium.org</email>
</author>
<published>2017-01-04T16:18:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=b577fafc4366eb82334518c552912652328c74fa'/>
<id>b577fafc4366eb82334518c552912652328c74fa</id>
<content type='text'>
nvmem_cell_read() returns void *, not char *. This is a cleanup that got
left out of commit a6c50912508d ("nvmem: Declare nvmem_cell_read()
consistently").

Signed-off-by: Brian Norris &lt;briannorris@chromium.org&gt;
Fixes: a6c50912508d ("nvmem: Declare nvmem_cell_read() consistently")
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
nvmem_cell_read() returns void *, not char *. This is a cleanup that got
left out of commit a6c50912508d ("nvmem: Declare nvmem_cell_read()
consistently").

Signed-off-by: Brian Norris &lt;briannorris@chromium.org&gt;
Fixes: a6c50912508d ("nvmem: Declare nvmem_cell_read() consistently")
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nvmem: imx-ocotp: Fix wrong register size</title>
<updated>2017-01-04T17:22:47+00:00</updated>
<author>
<name>Daniel Schultz</name>
<email>d.schultz@phytec.de</email>
</author>
<published>2017-01-04T16:18:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=14ba972842f9e84e6d3264bc0302101b8a792288'/>
<id>14ba972842f9e84e6d3264bc0302101b8a792288</id>
<content type='text'>
All i.MX6 SoCs have an OCOTP Controller with 4kbit fuses. The i.MX6SL is
an exception and has only 2kbit fuses.

In the TRM for the i.MX6DQ (IMX6QDRM - Rev 2, 06/2014) the fuses size is
described in chapter 46.1.1 with:
"32-bit word restricted program and read to 4Kbits of eFuse OTP(512x8)."

In the TRM for the i.MX6SL (IMX6SLRM - Rev 2, 06/2015) the fuses size is
described in chapter 34.1.1 with:
"32-bit word restricted program and read to 2 kbit of eFuse OTP(128x8)."

Since the Freescale Linux kernel OCOTP driver works with a fuses size of
2 kbit for the i.MX6SL, it looks like the TRM is wrong and the formula
to calculate the correct fuses size has to be 256x8.

Signed-off-by: Daniel Schultz &lt;d.schultz@phytec.de&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All i.MX6 SoCs have an OCOTP Controller with 4kbit fuses. The i.MX6SL is
an exception and has only 2kbit fuses.

In the TRM for the i.MX6DQ (IMX6QDRM - Rev 2, 06/2014) the fuses size is
described in chapter 46.1.1 with:
"32-bit word restricted program and read to 4Kbits of eFuse OTP(512x8)."

In the TRM for the i.MX6SL (IMX6SLRM - Rev 2, 06/2015) the fuses size is
described in chapter 34.1.1 with:
"32-bit word restricted program and read to 2 kbit of eFuse OTP(128x8)."

Since the Freescale Linux kernel OCOTP driver works with a fuses size of
2 kbit for the i.MX6SL, it looks like the TRM is wrong and the formula
to calculate the correct fuses size has to be 256x8.

Signed-off-by: Daniel Schultz &lt;d.schultz@phytec.de&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nvmem: qfprom: Allow single byte accesses for read/write</title>
<updated>2017-01-04T17:22:47+00:00</updated>
<author>
<name>Vivek Gautam</name>
<email>vivek.gautam@codeaurora.org</email>
</author>
<published>2017-01-04T16:18:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=01d0d2c42a14cee8f619d3e9d571ce3469f5ef51'/>
<id>01d0d2c42a14cee8f619d3e9d571ce3469f5ef51</id>
<content type='text'>
The nvmem core driver supports to read and write single
byte. So, allow qfprom to support this feature.
This change helps in extracting a required value based
on bit-offset and number of bits for the required value
in the nvmem cell.

Signed-off-by: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Cc: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The nvmem core driver supports to read and write single
byte. So, allow qfprom to support this feature.
This change helps in extracting a required value based
on bit-offset and number of bits for the required value
in the nvmem cell.

Signed-off-by: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Cc: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nvmem: Add the Broadcom OTP controller driver</title>
<updated>2016-11-10T14:34:56+00:00</updated>
<author>
<name>Jonathan Richardson</name>
<email>jonathar@broadcom.com</email>
</author>
<published>2016-10-31T14:45:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=9d59c6e8ae27638fc733fe759b1a013775e745ee'/>
<id>9d59c6e8ae27638fc733fe759b1a013775e745ee</id>
<content type='text'>
Add support for 32 and 64-bit versions of Broadcom's On-Chip OTP
controller. These controllers are used on SoC's such as Cygnus and
Stingray.

Reviewed-by: Ray Jui &lt;ray.jui@broadcom.com&gt;
Tested-by: Jonathan Richardson &lt;jonathan.richardson@broadcom.com&gt;
Signed-off-by: Scott Branden &lt;scott.branden@broadcom.com&gt;
Signed-off-by: Oza Pawandeep &lt;oza@broadcom.com&gt;
Signed-off-by: Jonathan Richardson &lt;jonathan.richardson@broadcom.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for 32 and 64-bit versions of Broadcom's On-Chip OTP
controller. These controllers are used on SoC's such as Cygnus and
Stingray.

Reviewed-by: Ray Jui &lt;ray.jui@broadcom.com&gt;
Tested-by: Jonathan Richardson &lt;jonathan.richardson@broadcom.com&gt;
Signed-off-by: Scott Branden &lt;scott.branden@broadcom.com&gt;
Signed-off-by: Oza Pawandeep &lt;oza@broadcom.com&gt;
Signed-off-by: Jonathan Richardson &lt;jonathan.richardson@broadcom.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nvmem: add NXP LPC18xx OTP driver</title>
<updated>2016-11-10T14:34:55+00:00</updated>
<author>
<name>Joachim Eastwood</name>
<email>manabian@gmail.com</email>
</author>
<published>2016-10-31T14:45:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=88806daf10f4eeaf7d5b41f360e37592bd9a759c'/>
<id>88806daf10f4eeaf7d5b41f360e37592bd9a759c</id>
<content type='text'>
Add simple read only driver for the internal OTP (One Time Programmable)
memory found on all NXP LPC18xx and LPC43xx devices.

The OTP memory is split into 4 banks each with 4 32-bits word. Some of
the banks contain predefined data while others are for general purpose
and user programmable via the OTP API in ROM. Note that writing to the
OTP memory is not yet supported.

Signed-off-by: Joachim Eastwood &lt;manabian@gmail.com&gt;
Tested-by: Vladimir Zapolskiy &lt;vz@mleia.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add simple read only driver for the internal OTP (One Time Programmable)
memory found on all NXP LPC18xx and LPC43xx devices.

The OTP memory is split into 4 banks each with 4 32-bits word. Some of
the banks contain predefined data while others are for general purpose
and user programmable via the OTP API in ROM. Note that writing to the
OTP memory is not yet supported.

Signed-off-by: Joachim Eastwood &lt;manabian@gmail.com&gt;
Tested-by: Vladimir Zapolskiy &lt;vz@mleia.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
