linux-stable.git/drivers/net/phy/micrel.c, branch linux-4.3.y

phy: micrel: Fix finding PHY properties in MAC node.

2016-01-23T04:55:46+00:00

[ Upstream commit 651df2183543bc92f5dbcf99cd9e236ead0bc4c5 ]

commit 8b63ec1837fa ("phylib: Make PHYs children of their MDIO bus,
not the bus' parent.")  changed the parenting of PHY devices, making
them a child of the MDIO bus, instead of the MAC device. This broken
the Micrel PHY driver which has a deprecated feature of allowing PHY
properties to be placed into the MAC node.

In order to find the MAC node, we need to walk up the tree of devices
until we find one with an OF node attached.

Reported-by: Dinh Nguyen 
Suggested-by: David Daney 
Acked-by: David Daney 
Fixes: 8b63ec1837fa ("phylib: Make PHYs children of their MDIO bus, not the bus' parent.")
Signed-off-by: Andrew Lunn 
Tested-by: Dinh Nguyen 
Acked-by: Florian Fainelli 
Signed-off-by: David S. Miller 
Signed-off-by: Greg Kroah-Hartman

net/phy: micrel: Add workaround for bad autoneg

2015-10-23T09:57:26+00:00

Very rarely, the KSZ9031 will appear to complete autonegotiation, but
will drop all traffic afterwards.  When this happens, the idle error
count will read 0xFF after autonegotiation completes.  Reset the PHY
when in that state.

Signed-off-by: Nathan Sullivan 
Signed-off-by: David S. Miller

net/phy: micrel: Center FLP timing at 16ms

2015-06-08T07:50:48+00:00

Link failures have been observed when using the KSZ9031 with HP 1810-8G
and HP 1910-8G network switches. Center the FLP timing at 16ms to help
avoid intermittent link failures.

>From the KSZ9031RNX and KSZ9031MNX data sheets revision 2.2, section
"Auto-Negotiation Timing":
	The KSZ9031[RNX or MNX] Fast Link Pulse (FLP) burst-to-burst
	transmit timing for Auto-Negotiation defaults to 8ms. IEEE 802.3
	Standard specifies this timing to be 16ms +/-8ms. Some PHY link
	partners need to receive the FLP with 16ms centered timing;
	otherwise, there can be intermittent link failures and long
	link-up times.

The PHY data sheet recommends configuring the FLP burst registers after
power-up/reset and immediately thereafter restarting auto-negotiation, so
we center the FLP timing at 16ms and then restart auto-negotiation in the
config_init for KSZ9031.

Signed-off-by: Jaeden Amero 
Signed-off-by: David S. Miller

net/phy: micrel: Comment MMD address of extended registers

2015-06-08T07:50:48+00:00

There are some defines for a few pad skew related extended registers.
Specify for which MMD Address (dev_addr) they are for.

Signed-off-by: Jaeden Amero 
Signed-off-by: David S. Miller

net/phy: micrel: Be more const correct

2015-06-08T07:50:48+00:00

In a few places in this driver, we weren't using const where we could
have. Use const more.

In addition, change the arrays of strings in ksz9031_config_init() to be
not only const, but also static.

Signed-off-by: Jaeden Amero 
Signed-off-by: David S. Miller

net: phy: micrel: Fix regression in kszphy_probe

2015-05-13T03:18:40+00:00

Don't do clock-mode-select if clk == NULL,
since when building without CONFIG_HAVE_CLK,
clk_get returns NULL and clk_get_rate returns 0.

Doing clock-mode-select in this cause causes kszphy_probe to
return -EINVAL and thus prevents the device from being probed.

The original code (before regression) would return 0
when building without CONFIG_HAVE_CLK.

Cc: stable  # 3.18+
Fixes: 1fadee0c3645 ("net/phy: micrel: Add clock support for
KSZ8021/KSZ8031")
Reviewed-by: Fabio Estevam 
Reviewed-by: Johan Hovold 
Signed-off-by: Niklas Cassel 
Signed-off-by: David S. Miller

net: phy: micrel: disable NAND-tree for KSZ8021, KSZ8031, KSZ8051, KSZ8081

2015-02-15T04:30:55+00:00

NAND-tree is used to check wiring between MAC and PHY using NAND gates
on the PHY side, hence the name.

NAND-tree initial status is latched at reset by probing the IRQ pin.
However some devices are sharing the PHY IRQ pin with other peripherals
such as Atmel SAMA5D[34]x-EK boards when using the optional TM7000
display module, therefore they are switching the PHY in NAND-tree test
mode depending on the current IRQ line status at reset.

This patch ensure PHY is not in NAND-tree test mode for all Micrel PHYs
using IRQ line as a NAND-tree toggle mode at reset.

Signed-off-by: Sylvain Rochet 
Signed-off-by: Boris Brezillon 
Signed-off-by: David S. Miller

net: phy: micrel: use generic config_init for KSZ8021/KSZ8031

2014-12-26T21:19:50+00:00

Use generic config_init callback also for KSZ8021 and KSZ8031.

This has been avoided this far due to commit b838b4aced99 ("phy/micrel:
KSZ8031RNL RMII clock reconfiguration bug"), which claims that the PHY
becomes unresponsive if the broadcast-disable flag is set before
configuring the clock mode.

Turns out that the problem seemingly worked-around by the above
mentioned commit was really due to a hardware-configuration issue, where
the PHY was in fact strapped to address 3 rather than 0.

Tested-by: Bruno Thomsen 
Signed-off-by: Johan Hovold 
Signed-off-by: David S. Miller

net: phy: micrel: add copyright entry

2014-11-21T19:08:57+00:00

Add myself to the list of copyright holders.

Signed-off-by: Johan Hovold 
Signed-off-by: David S. Miller

net: phy: micrel: refactor interrupt config

2014-11-21T19:08:57+00:00

Add generic interrupt-config callback and store interrupt-level bitmask
in type data for PHY types not using bit 9.

Signed-off-by: Johan Hovold 
Signed-off-by: David S. Miller