linux-stable.git/drivers/net/phy/Makefile, branch v5.8

net: phy: mdio: add IPQ4019 MDIO driver

2020-04-30T19:11:14+00:00

This patch adds the driver for the MDIO interface
inside of Qualcomm IPQ40xx series SoC-s.

Signed-off-by: Christian Lamparter 
Signed-off-by: Robert Marko 
Reviewed-by: Andrew Lunn 
Reviewed-by: Florian Fainelli 
Cc: Luka Perkov 
Signed-off-by: David S. Miller

net: phy: add Broadcom BCM54140 support

2020-04-22T19:14:18+00:00

The Broadcom BCM54140 is a Quad SGMII/QSGMII Copper/Fiber Gigabit
Ethernet transceiver.

This also adds support for tunables to set and get downshift and
energy detect auto power-down.

The PHY has four ports and each port has its own PHY address.
There are per-port registers as well as global registers.
Unfortunately, the global registers can only be accessed by reading
and writing from/to the PHY address of the first port. Further,
there is no way to find out what port you actually are by just
reading the per-port registers. We therefore, have to scan the
bus on the PHY probe to determine the port and thus what address
we need to access the global registers.

Signed-off-by: Michael Walle 
Reviewed-by: Andrew Lunn 
Signed-off-by: David S. Miller

net: phy: add marvell usb to mdio controller

2020-03-27T02:49:34+00:00

An MDIO controller present on development boards for Marvell switches
from the Link Street (88E6xxx) family.

Using this module, you can use the following setup as a development
platform for switchdev and DSA related work.

   .-------.      .-----------------.
   |      USB----USB                |
   |  SoC  |      |  88E6390X-DB  ETH1-10
   |      ETH----ETH0               |
   '-------'      '-----------------'

Signed-off-by: Tobias Waldekranz 
Reviewed-by: Greg Kroah-Hartman 
Reviewed-by: Andrew Lunn 
Reviewed-by: Florian Fainelli 
Signed-off-by: David S. Miller

net: phy: move the mscc driver to its own directory

2020-03-15T04:06:45+00:00

The MSCC PHY driver is growing, with lots of space consuming features
(firmware support, full initialization, MACsec...). It's becoming hard
to read and navigate in its source code. This patch moves the MSCC
driver to its own directory, without modifying anything, as a
preparation for splitting up its features into dedicated files.

Signed-off-by: Antoine Tenart 
Reviewed-by: Andrew Lunn 
Signed-off-by: David S. Miller

net: phy: Add Synopsys DesignWare XPCS MDIO module

2020-03-10T03:13:16+00:00

Synopsys DesignWare XPCS is an MMD that can manage link status,
auto-negotiation, link training, ...

In this commit we add basic support for XPCS using USXGMII interface and
Clause 73 Auto-negotiation.

This is highly tied with PHYLINK and can't be used without it. A given
ethernet driver can use the provided callbacks to add the support for
XPCS.

Signed-off-by: Jose Abreu 
Signed-off-by: David S. Miller

net: mdio: add ipq8064 mdio driver

2020-03-07T06:07:05+00:00

Currently ipq806x soc use generic bitbang driver to
comunicate with the gmac ethernet interface.
Add a dedicated driver created by chunkeey to fix this.

Co-developed-by: Christian Lamparter 
Signed-off-by: Christian Lamparter 
Signed-off-by: Ansuel Smith 
Signed-off-by: David S. Miller

net: add helpers to resolve negotiated flow control

2020-02-17T03:39:44+00:00

Add a couple of helpers to resolve negotiated flow control. Two helpers
are provided:

- linkmode_resolve_pause() which takes the link partner and local
  advertisements, and decodes whether we should enable TX or RX pause
  at the MAC. This is useful outside of phylib, e.g. in phylink.
- phy_get_pause(), which returns the TX/RX enablement status for the
  current negotiation results of the PHY.

This allows us to centralise the flow control resolution, rather than
spreading it around.

Signed-off-by: Russell King 
Reviewed-by: Andrew Lunn 
Signed-off-by: David S. Miller

net: Add a layer for non-PHY MII time stamping drivers.

2019-12-26T03:51:33+00:00

While PHY time stamping drivers can simply attach their interface
directly to the PHY instance, stand alone drivers require support in
order to manage their services.  Non-PHY MII time stamping drivers
have a control interface over another bus like I2C, SPI, UART, or via
a memory mapped peripheral.  The controller device will be associated
with one or more time stamping channels, each of which sits snoops in
on a MII bus.

This patch provides a glue layer that will enable time stamping
channels to find their controlling device.

Signed-off-by: Richard Cochran 
Reviewed-by: Andrew Lunn 
Signed-off-by: David S. Miller

net: phy: add Broadcom BCM84881 PHY driver

2019-12-11T19:53:42+00:00

Add a rudimentary Clause 45 driver for the BCM84881 PHY, found on
Methode DM7052 SFPs.

Reviewed-by: Florian Fainelli 
Signed-off-by: Russell King 
Signed-off-by: David S. Miller

net: phy: dp83869: Add TI dp83869 phy

2019-11-15T01:42:43+00:00

Add support for the TI DP83869 Gigabit ethernet phy
device.

The DP83869 is a robust, low power, fully featured
Physical Layer transceiver with integrated PMD
sublayers to support 10BASE-T, 100BASE-TX and
1000BASE-T Ethernet protocols.

Signed-off-by: Dan Murphy 
Signed-off-by: David S. Miller