linux-stable.git/drivers/net/phy/Makefile, branch v5.7 Linux kernel stable tree net: phy: add marvell usb to mdio controller 2020-03-27T02:49:34+00:00 Tobias Waldekranz tobias@waldekranz.com 2020-03-23T10:14:14+00:00 04e37d92fbed45c6b57263c0cb262cf8fa5df0e2 An MDIO controller present on development boards for Marvell switches from the Link Street (88E6xxx) family. Using this module, you can use the following setup as a development platform for switchdev and DSA related work. .-------. .-----------------. | USB----USB | | SoC | | 88E6390X-DB ETH1-10 | ETH----ETH0 | '-------' '-----------------' Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> 
An MDIO controller present on development boards for Marvell switches
from the Link Street (88E6xxx) family.

Using this module, you can use the following setup as a development
platform for switchdev and DSA related work.

   .-------.      .-----------------.
   |      USB----USB                |
   |  SoC  |      |  88E6390X-DB  ETH1-10
   |      ETH----ETH0               |
   '-------'      '-----------------'

Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
net: phy: move the mscc driver to its own directory 2020-03-15T04:06:45+00:00 Antoine Tenart antoine.tenart@bootlin.com 2020-03-13T09:48:00+00:00 da80aa52d07462850f02c19631a918995f9f11f4 The MSCC PHY driver is growing, with lots of space consuming features (firmware support, full initialization, MACsec...). It's becoming hard to read and navigate in its source code. This patch moves the MSCC driver to its own directory, without modifying anything, as a preparation for splitting up its features into dedicated files. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net> 
The MSCC PHY driver is growing, with lots of space consuming features
(firmware support, full initialization, MACsec...). It's becoming hard
to read and navigate in its source code. This patch moves the MSCC
driver to its own directory, without modifying anything, as a
preparation for splitting up its features into dedicated files.

Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
net: phy: Add Synopsys DesignWare XPCS MDIO module 2020-03-10T03:13:16+00:00 Jose Abreu Jose.Abreu@synopsys.com 2020-03-09T08:36:26+00:00 fcb26bd2b6cab573f06e5855638368cf88e99c2b Synopsys DesignWare XPCS is an MMD that can manage link status, auto-negotiation, link training, ... In this commit we add basic support for XPCS using USXGMII interface and Clause 73 Auto-negotiation. This is highly tied with PHYLINK and can't be used without it. A given ethernet driver can use the provided callbacks to add the support for XPCS. Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net> 
Synopsys DesignWare XPCS is an MMD that can manage link status,
auto-negotiation, link training, ...

In this commit we add basic support for XPCS using USXGMII interface and
Clause 73 Auto-negotiation.

This is highly tied with PHYLINK and can't be used without it. A given
ethernet driver can use the provided callbacks to add the support for
XPCS.

Signed-off-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
net: mdio: add ipq8064 mdio driver 2020-03-07T06:07:05+00:00 Ansuel Smith ansuelsmth@gmail.com 2020-03-04T21:38:32+00:00 caaa71fac36ec8c19145dbf8262a9b77ab09f1a1 Currently ipq806x soc use generic bitbang driver to comunicate with the gmac ethernet interface. Add a dedicated driver created by chunkeey to fix this. Co-developed-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> 
Currently ipq806x soc use generic bitbang driver to
comunicate with the gmac ethernet interface.
Add a dedicated driver created by chunkeey to fix this.

Co-developed-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
net: add helpers to resolve negotiated flow control 2020-02-17T03:39:44+00:00 Russell King rmk+kernel@armlinux.org.uk 2020-02-15T15:49:27+00:00 a87ae8a963bde755b0962bcc18db83d611f63e7a Add a couple of helpers to resolve negotiated flow control. Two helpers are provided: - linkmode_resolve_pause() which takes the link partner and local advertisements, and decodes whether we should enable TX or RX pause at the MAC. This is useful outside of phylib, e.g. in phylink. - phy_get_pause(), which returns the TX/RX enablement status for the current negotiation results of the PHY. This allows us to centralise the flow control resolution, rather than spreading it around. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net> 
Add a couple of helpers to resolve negotiated flow control. Two helpers
are provided:

- linkmode_resolve_pause() which takes the link partner and local
  advertisements, and decodes whether we should enable TX or RX pause
  at the MAC. This is useful outside of phylib, e.g. in phylink.
- phy_get_pause(), which returns the TX/RX enablement status for the
  current negotiation results of the PHY.

This allows us to centralise the flow control resolution, rather than
spreading it around.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
net: Add a layer for non-PHY MII time stamping drivers. 2019-12-26T03:51:33+00:00 Richard Cochran richardcochran@gmail.com 2019-12-26T02:16:16+00:00 767ff483731502a0fc34f34a3a0851aca175eb71 While PHY time stamping drivers can simply attach their interface directly to the PHY instance, stand alone drivers require support in order to manage their services. Non-PHY MII time stamping drivers have a control interface over another bus like I2C, SPI, UART, or via a memory mapped peripheral. The controller device will be associated with one or more time stamping channels, each of which sits snoops in on a MII bus. This patch provides a glue layer that will enable time stamping channels to find their controlling device. Signed-off-by: Richard Cochran <richardcochran@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net> 
While PHY time stamping drivers can simply attach their interface
directly to the PHY instance, stand alone drivers require support in
order to manage their services.  Non-PHY MII time stamping drivers
have a control interface over another bus like I2C, SPI, UART, or via
a memory mapped peripheral.  The controller device will be associated
with one or more time stamping channels, each of which sits snoops in
on a MII bus.

This patch provides a glue layer that will enable time stamping
channels to find their controlling device.

Signed-off-by: Richard Cochran <richardcochran@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
net: phy: add Broadcom BCM84881 PHY driver 2019-12-11T19:53:42+00:00 Russell King rmk+kernel@armlinux.org.uk 2019-12-11T10:56:56+00:00 75f4d8d10e016f7428c268424483a927ee7a78bb Add a rudimentary Clause 45 driver for the BCM84881 PHY, found on Methode DM7052 SFPs. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net> 
Add a rudimentary Clause 45 driver for the BCM84881 PHY, found on
Methode DM7052 SFPs.

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
net: phy: dp83869: Add TI dp83869 phy 2019-11-15T01:42:43+00:00 Dan Murphy dmurphy@ti.com 2019-11-13T16:42:26+00:00 01db923e83779bf39b15e258a58eb1d0c5167f56 Add support for the TI DP83869 Gigabit ethernet phy device. The DP83869 is a robust, low power, fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-T, 100BASE-TX and 1000BASE-T Ethernet protocols. Signed-off-by: Dan Murphy <dmurphy@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net> 
Add support for the TI DP83869 Gigabit ethernet phy
device.

The DP83869 is a robust, low power, fully featured
Physical Layer transceiver with integrated PMD
sublayers to support 10BASE-T, 100BASE-TX and
1000BASE-T Ethernet protocols.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
net: phy: adin: add support for Analog Devices PHYs 2019-08-16T18:56:25+00:00 Alexandru Ardelean alexandru.ardelean@analog.com 2019-08-16T13:09:59+00:00 9c1029818c713eccdce945e45cd8fb927d6a3d6e This change adds support for Analog Devices Industrial Ethernet PHYs. Particularly the PHYs this driver adds support for: * ADIN1200 - Robust, Industrial, Low Power 10/100 Ethernet PHY * ADIN1300 - Robust, Industrial, Low Latency 10/100/1000 Gigabit Ethernet PHY The 2 chips are register compatible with one another. The main difference being that ADIN1200 doesn't operate in gigabit mode. The chips can be operated by the Generic PHY driver as well via the standard IEEE PHY registers (0x0000 - 0x000F) which are supported by the kernel as well. This assumes that configuration of the PHY has been done completely in HW, according to spec. Configuration can also be done via registers, which will be supported by this driver. Datasheets: https://www.analog.com/media/en/technical-documentation/data-sheets/ADIN1300.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ADIN1200.pdf Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net> 
This change adds support for Analog Devices Industrial Ethernet PHYs.
Particularly the PHYs this driver adds support for:
 * ADIN1200 - Robust, Industrial, Low Power 10/100 Ethernet PHY
 * ADIN1300 - Robust, Industrial, Low Latency 10/100/1000 Gigabit
   Ethernet PHY

The 2 chips are register compatible with one another. The main difference
being that ADIN1200 doesn't operate in gigabit mode.

The chips can be operated by the Generic PHY driver as well via the
standard IEEE PHY registers (0x0000 - 0x000F) which are supported by the
kernel as well. This assumes that configuration of the PHY has been done
completely in HW, according to spec.

Configuration can also be done via registers, which will be supported by
this driver.

Datasheets:
  https://www.analog.com/media/en/technical-documentation/data-sheets/ADIN1300.pdf
  https://www.analog.com/media/en/technical-documentation/data-sheets/ADIN1200.pdf

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
net: phy: Add mdio-aspeed 2019-08-03T00:56:28+00:00 Andrew Jeffery andrew@aj.id.au 2019-07-31T05:39:57+00:00 f160e99462c68ab5b9e2b9097a4867459730b49a The AST2600 design separates the MDIO controllers from the MAC, which is where they were placed in the AST2400 and AST2500. Further, the register interface is reworked again, so now we have three possible different interface implementations, however this driver only supports the interface provided by the AST2600. The AST2400 and AST2500 will continue to be supported by the MDIO support embedded in the FTGMAC100 driver. The hardware supports both C22 and C45 mode, but for the moment only C22 support is implemented. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net> 
The AST2600 design separates the MDIO controllers from the MAC, which is
where they were placed in the AST2400 and AST2500. Further, the register
interface is reworked again, so now we have three possible different
interface implementations, however this driver only supports the
interface provided by the AST2600. The AST2400 and AST2500 will continue
to be supported by the MDIO support embedded in the FTGMAC100 driver.

The hardware supports both C22 and C45 mode, but for the moment only C22
support is implemented.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>