linux-stable.git/drivers/net/pcs, branch linux-6.2.y Linux kernel stable tree net: pcs: xpcs: remove double-read of link state when using AN 2023-05-11T14:11:09+00:00 Russell King (Oracle) rmk+kernel@armlinux.org.uk 2023-03-15T14:46:43+00:00 34afea649593deeb4f556df4aa9817528ab2c61b [ Upstream commit ef63461caf427a77a04620d74ba90035a712af9c ] Phylink does not want the current state of the link when reading the PCS link state - it wants the latched state. Don't double-read the MII status register. Phylink will re-read as necessary to capture transient link-down events as of dbae3388ea9c ("net: phylink: Force retrigger in case of latched link-fail indicator"). The above referenced commit is a dependency for this change, and thus this change should not be backported to any kernel that does not contain the above referenced commit. Fixes: fcb26bd2b6ca ("net: phy: Add Synopsys DesignWare XPCS MDIO module") Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit ef63461caf427a77a04620d74ba90035a712af9c ]

Phylink does not want the current state of the link when reading the
PCS link state - it wants the latched state. Don't double-read the
MII status register. Phylink will re-read as necessary to capture
transient link-down events as of dbae3388ea9c ("net: phylink: Force
retrigger in case of latched link-fail indicator").

The above referenced commit is a dependency for this change, and thus
this change should not be backported to any kernel that does not
contain the above referenced commit.

Fixes: fcb26bd2b6ca ("net: phy: Add Synopsys DesignWare XPCS MDIO module")
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
net: pcs: altera-tse: remove unnecessary register definitions 2022-11-30T04:29:55+00:00 Maxime Chevallier maxime.chevallier@bootlin.com 2022-11-25T13:18:01+00:00 befd851de29543205246468abe3e7793f26c7e2f remove unused register definitions, left from the split with the altera-tse mac driver. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> 
remove unused register definitions, left from the split with the
altera-tse mac driver.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
net: pcs: altera-tse: don't set the speed for 1000BaseX 2022-11-30T04:29:55+00:00 Maxime Chevallier maxime.chevallier@bootlin.com 2022-11-25T13:18:00+00:00 b4a7bf9f5bb8e6b21d728d00dc3afe9fbee2420c When disabling the SGMII mode bit, the PCS defaults to 1000BaseX mode. In that mode, we don't need to set the speed since it's always 1000Mbps. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> 
When disabling the SGMII mode bit, the PCS defaults to 1000BaseX mode.
In that mode, we don't need to set the speed since it's always 1000Mbps.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
net: pcs: altera-tse: use read_poll_timeout to wait for reset 2022-11-30T04:29:55+00:00 Maxime Chevallier maxime.chevallier@bootlin.com 2022-11-25T13:17:59+00:00 d1a0ff5ff9efba55cc39ca520ba076943cd9a425 Software resets on the TSE PCS don't clear registers, but rather reset all internal state machines regarding AN, comma detection and encoding/decoding. Use read_poll_timeout to wait for the reset to clear instead of manually polling the register. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> 
Software resets on the TSE PCS don't clear registers, but rather reset
all internal state machines regarding AN, comma detection and
encoding/decoding. Use read_poll_timeout to wait for the reset to clear
instead of manually polling the register.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
net: pcs: xpcs: use mdiodev accessors 2022-11-10T03:28:49+00:00 Russell King (Oracle) rmk+kernel@armlinux.org.uk 2022-11-08T14:26:01+00:00 85a2b4ac34449ed5610301e05dab0f7f9efe278b Use mdiodev accessors rather than accessing the bus and address in the mdio_device structure and using the mdiobus accessors. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org> 
Use mdiodev accessors rather than accessing the bus and address in
the mdio_device structure and using the mdiobus accessors.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
net: pcs: add new PCS driver for altera TSE PCS 2022-09-05T09:16:53+00:00 Maxime Chevallier maxime.chevallier@bootlin.com 2022-09-02T08:32:03+00:00 4a502cf4d77e12119e7061a05d5789cd3129d185 The Altera Triple Speed Ethernet has a SGMII/1000BaseC PCS that can be integrated in several ways. It can either be part of the TSE MAC's address space, accessed through 32 bits accesses on the mapped mdio device 0, or through a dedicated 16 bits register set. This driver allows using the TSE PCS outside of altera TSE's driver, since it can be used standalone by other MACs. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net> 
The Altera Triple Speed Ethernet has a SGMII/1000BaseC PCS that can be
integrated in several ways. It can either be part of the TSE MAC's
address space, accessed through 32 bits accesses on the mapped mdio
device 0, or through a dedicated 16 bits register set.

This driver allows using the TSE PCS outside of altera TSE's driver,
since it can be used standalone by other MACs.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 2022-07-29T01:21:16+00:00 Jakub Kicinski kuba@kernel.org 2022-07-29T01:21:16+00:00 272ac32f566e3f925b20c231a2b30f6893aa258a No conflicts. Signed-off-by: Jakub Kicinski <kuba@kernel.org> 
No conflicts.

Signed-off-by: Jakub Kicinski <kuba@kernel.org>
net: pcs: xpcs: propagate xpcs_read error to xpcs_get_state_c37_sgmii 2022-07-22T02:01:16+00:00 Vladimir Oltean vladimir.oltean@nxp.com 2022-07-20T11:20:57+00:00 27161db0904ee48e59140aa8d0835939a666c1f1 While phylink_pcs_ops :: pcs_get_state does return void, xpcs_get_state() does check for a non-zero return code from xpcs_get_state_c37_sgmii() and prints that as a message to the kernel log. However, a non-zero return code from xpcs_read() is translated into "return false" (i.e. zero as int) and the I/O error is therefore not printed. Fix that. Fixes: b97b5331b8ab ("net: pcs: add C37 SGMII AN support for intel mGbE controller") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20220720112057.3504398-1-vladimir.oltean@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> 
While phylink_pcs_ops :: pcs_get_state does return void, xpcs_get_state()
does check for a non-zero return code from xpcs_get_state_c37_sgmii()
and prints that as a message to the kernel log.

However, a non-zero return code from xpcs_read() is translated into
"return false" (i.e. zero as int) and the I/O error is therefore not
printed. Fix that.

Fixes: b97b5331b8ab ("net: pcs: add C37 SGMII AN support for intel mGbE controller")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Link: https://lore.kernel.org/r/20220720112057.3504398-1-vladimir.oltean@nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
net: pcs: rzn1-miic: update speed only if interface is changed 2022-07-02T02:16:00+00:00 Clément Léger clement.leger@bootlin.com 2022-06-29T12:20:03+00:00 90c74f4d90ad769fc84e0b91a08b5514d83aa683 As stated by Russel King, miic_config() can be called as a result of ethtool setting the configuration while the link is already up. Since the speed is also set in this function, it could potentially modify the current speed that is set. This will only happen if there is no PHY present and we aren't using fixed-link mode. Handle that by storing the current interface mode in the miic_port structure and update the speed only if the interface mode is going to be changed. Signed-off-by: Clément Léger <clement.leger@bootlin.com> Link: https://lore.kernel.org/r/20220629122003.189397-1-clement.leger@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> 
As stated by Russel King, miic_config() can be called as a result of
ethtool setting the configuration while the link is already up. Since
the speed is also set in this function, it could potentially modify
the current speed that is set. This will only happen if there is
no PHY present and we aren't using fixed-link mode.

Handle that by storing the current interface mode in the miic_port
structure and update the speed only if the interface mode is going to
be changed.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Link: https://lore.kernel.org/r/20220629122003.189397-1-clement.leger@bootlin.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
net: pcs-rzn1-miic: fix return value check in miic_probe() 2022-06-30T03:57:15+00:00 Yang Yingliang yangyingliang@huawei.com 2022-06-28T13:12:59+00:00 dbc6fc7e3f76ac8a584cd39f9978d6b41a96e75a On failure, devm_platform_ioremap_resource() returns a ERR_PTR() value and not NULL. Fix return value checking by using IS_ERR() and return PTR_ERR() as error value. Fixes: 7dc54d3b8d91 ("net: pcs: add Renesas MII converter driver") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Clément Léger <clement.leger@bootlin.com> Link: https://lore.kernel.org/r/20220628131259.3109124-1-yangyingliang@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> 
On failure, devm_platform_ioremap_resource() returns a ERR_PTR() value
and not NULL. Fix return value checking by using IS_ERR() and return
PTR_ERR() as error value.

Fixes: 7dc54d3b8d91 ("net: pcs: add Renesas MII converter driver")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Reviewed-by: Clément Léger <clement.leger@bootlin.com>
Link: https://lore.kernel.org/r/20220628131259.3109124-1-yangyingliang@huawei.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>