linux-stable.git/drivers/net/fddi, branch linux-4.5.y

defxx: fix build warning

2016-01-25T18:51:52+00:00

We are getting many build warnings about:
'bar_start' may be used uninitialized
and
'bar_len' may be used uninitialized

They are not actually uninitialized as dfx_get_bars() will initialize
them properly. But still lets have them initialized just to satisfy the
compiler (gcc 4.8.2).

Signed-off-by: Sudip Mukherjee 
Acked-by: Maciej W. Rozycki 
Signed-off-by: David S. Miller

net/fddi: remove HWM_REVERSE() macro

2015-08-14T04:12:17+00:00

HWM_REVERSE() macro is unused, remove it.

Signed-off-by: yalin wang 
Signed-off-by: David S. Miller

fddi: print an address with %p format specifier rather than %x

2015-06-07T07:31:22+00:00

The debug is printing the struct smt_header * address using
the %x format specifier. Fix it to use %p instead.

Signed-off-by: Colin Ian King 
Signed-off-by: David S. Miller

net: fddi: skfp: smt.c: Remove unused function

2015-01-02T21:36:07+00:00

Remove the function smt_ifconfig() that is not used anywhere.

This was partially found by using a static code analysis program called cppcheck.

Signed-off-by: Rickard Strandqvist 
Signed-off-by: David S. Miller

defxx: Clean up DEFEA resource management

2014-11-21T21:37:13+00:00

Reserve DEFEA resources according to actual use.  There are three
regions, for the ESIC ASIC's CSRs, for the discrete Burst Holdoff
register, and for the PDQ ASIC's CSRs.  The latter is mapped in the
memory or port I/O address space depending on configuration.  The two
formers are hardwired and always mapped in the port I/O address space.

Signed-off-by: Maciej W. Rozycki 
Signed-off-by: David S. Miller

defxx: Disable DEFEA's ESIC I/O decoding on shutdown

2014-11-21T21:37:13+00:00

Make sure the option card does not respond after shutdown by disabling
it via ESIC's Expansion Board Control register.  Also disable memory and
port I/O decoders, the latter in particular to disable slot-specific I/O
decoding that otherwise remains active even in the board is disabled.

Signed-off-by: Maciej W. Rozycki 
Signed-off-by: David S. Miller

defxx: Correct DEFEA's ESIC MMIO decoding

2014-11-21T21:37:13+00:00

Use ESIC's memory area 1 (MEMCS1) and its Memory Address High Compare
and Memory Address Low Compare registers to set up the MMIO range for
decoding accesses to PDQ ASIC registers.  Previously the PDQ ASIC was
thought to be addressable with the memory area 0 (MEMCS0) and its Memory
Address Compare and Memory Address Mask registers.

The MMIO range allocated for the option card is preset via ECU (EISA
Configuration Utility) and can be disabled, so handle such a case
gracefully too.

Signed-off-by: Maciej W. Rozycki 
Signed-off-by: David S. Miller

defxx: Fix DEFPA enable error propagation

2014-11-21T21:37:13+00:00

Correctly propagate the error code from `pci_enable_device' if non zero.
Currently a failure of this function is correctly recognized and device
initialization abandoned, however a successful completion code returned.

Signed-off-by: Maciej W. Rozycki 
Signed-off-by: David S. Miller

defxx: DEFEA's ESIC port I/O decoding cleanup

2014-09-28T21:22:10+00:00

Use the slot-specific I/O range for decoding accesses to PDQ ASIC
registers (IOCS0) and the discrete Burst Holdoff register (IOCS1) as per
the "HD64981F EISA Slave Interface Controller (ESIC)" datasheet.  Use
disjoint decode ranges now that the assignment of chip selects is known.
Update the span of the port I/O resource requested accordingly.

Signed-off-by: Maciej W. Rozycki 
Signed-off-by: David S. Miller

defxx: DEFEA's Burst Holdoff register initialization fix

2014-09-28T21:22:09+00:00

Use the mask rather than bit number macro to initialize the chip select
control bit for PDQ register space decoding in the Burst Holdoff register.

Signed-off-by: Maciej W. Rozycki 
Signed-off-by: David S. Miller