linux-stable.git/drivers/net/fddi, branch linux-3.19.y Linux kernel stable tree defxx: Clean up DEFEA resource management 2014-11-21T21:37:13+00:00 Maciej W. Rozycki macro@linux-mips.org 2014-11-21T14:10:08+00:00 4d0438e56a8f9a1a18ba31bd53b9dc67af224980 Reserve DEFEA resources according to actual use. There are three regions, for the ESIC ASIC's CSRs, for the discrete Burst Holdoff register, and for the PDQ ASIC's CSRs. The latter is mapped in the memory or port I/O address space depending on configuration. The two formers are hardwired and always mapped in the port I/O address space. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net> 
Reserve DEFEA resources according to actual use.  There are three
regions, for the ESIC ASIC's CSRs, for the discrete Burst Holdoff
register, and for the PDQ ASIC's CSRs.  The latter is mapped in the
memory or port I/O address space depending on configuration.  The two
formers are hardwired and always mapped in the port I/O address space.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
defxx: Disable DEFEA's ESIC I/O decoding on shutdown 2014-11-21T21:37:13+00:00 Maciej W. Rozycki macro@linux-mips.org 2014-11-21T14:10:02+00:00 6a931423c918633d4d0cda96df042d7e44ad06b0 Make sure the option card does not respond after shutdown by disabling it via ESIC's Expansion Board Control register. Also disable memory and port I/O decoders, the latter in particular to disable slot-specific I/O decoding that otherwise remains active even in the board is disabled. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net> 
Make sure the option card does not respond after shutdown by disabling
it via ESIC's Expansion Board Control register.  Also disable memory and
port I/O decoders, the latter in particular to disable slot-specific I/O
decoding that otherwise remains active even in the board is disabled.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
defxx: Correct DEFEA's ESIC MMIO decoding 2014-11-21T21:37:13+00:00 Maciej W. Rozycki macro@linux-mips.org 2014-11-21T14:09:57+00:00 fef85fc466ec1f4400a902049a519948f6b40979 Use ESIC's memory area 1 (MEMCS1) and its Memory Address High Compare and Memory Address Low Compare registers to set up the MMIO range for decoding accesses to PDQ ASIC registers. Previously the PDQ ASIC was thought to be addressable with the memory area 0 (MEMCS0) and its Memory Address Compare and Memory Address Mask registers. The MMIO range allocated for the option card is preset via ECU (EISA Configuration Utility) and can be disabled, so handle such a case gracefully too. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net> 
Use ESIC's memory area 1 (MEMCS1) and its Memory Address High Compare
and Memory Address Low Compare registers to set up the MMIO range for
decoding accesses to PDQ ASIC registers.  Previously the PDQ ASIC was
thought to be addressable with the memory area 0 (MEMCS0) and its Memory
Address Compare and Memory Address Mask registers.

The MMIO range allocated for the option card is preset via ECU (EISA
Configuration Utility) and can be disabled, so handle such a case
gracefully too.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
defxx: Fix DEFPA enable error propagation 2014-11-21T21:37:13+00:00 Maciej W. Rozycki macro@linux-mips.org 2014-11-21T14:09:52+00:00 a65da0c3dac6e2d4f8ecf0aee8b0abe10001f2d9 Correctly propagate the error code from `pci_enable_device' if non zero. Currently a failure of this function is correctly recognized and device initialization abandoned, however a successful completion code returned. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net> 
Correctly propagate the error code from `pci_enable_device' if non zero.
Currently a failure of this function is correctly recognized and device
initialization abandoned, however a successful completion code returned.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
defxx: DEFEA's ESIC port I/O decoding cleanup 2014-09-28T21:22:10+00:00 Maciej W. Rozycki macro@linux-mips.org 2014-09-25T10:06:55+00:00 b98dfaf2b0a3e72fa5967dafb4f246442584a780 Use the slot-specific I/O range for decoding accesses to PDQ ASIC registers (IOCS0) and the discrete Burst Holdoff register (IOCS1) as per the "HD64981F EISA Slave Interface Controller (ESIC)" datasheet. Use disjoint decode ranges now that the assignment of chip selects is known. Update the span of the port I/O resource requested accordingly. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net> 
Use the slot-specific I/O range for decoding accesses to PDQ ASIC
registers (IOCS0) and the discrete Burst Holdoff register (IOCS1) as per
the "HD64981F EISA Slave Interface Controller (ESIC)" datasheet.  Use
disjoint decode ranges now that the assignment of chip selects is known.
Update the span of the port I/O resource requested accordingly.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
defxx: DEFEA's Burst Holdoff register initialization fix 2014-09-28T21:22:09+00:00 Maciej W. Rozycki macro@linux-mips.org 2014-09-25T10:06:45+00:00 b1a6d3ecf806457d3e76ac0044db424be3c9422d Use the mask rather than bit number macro to initialize the chip select control bit for PDQ register space decoding in the Burst Holdoff register. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net> 
Use the mask rather than bit number macro to initialize the chip select
control bit for PDQ register space decoding in the Burst Holdoff register.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
defxx: Correct DEFEA's ESIC port I/O accesses 2014-09-28T21:22:09+00:00 Maciej W. Rozycki macro@linux-mips.org 2014-09-25T10:06:39+00:00 8a189f1288b654e45f2ec9393abfb1390b261ae9 Reverse the order of arguments to `outb', data to write comes first. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net> 
Reverse the order of arguments to `outb', data to write comes first.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/fddi/skfp/h/skfbi.h: Remove useless PCI_BASE_2ND macros 2014-09-05T21:51:09+00:00 Chen Gang gang.chen.5i5j@gmail.com 2014-09-03T15:26:26+00:00 4357450af3422219d3f77bd54f7b9a8a40f193c9 They are use less, and may generate compiling warnings, so remove them (microblaze, arc, arm64, and unicore32 have already defined PCI_IOBASE). The related warnings (with allmodconfig under microblaze): CC [M] drivers/net/fddi/skfp/skfddi.o In file included from drivers/net/fddi/skfp/skfddi.c:95:0: drivers/net/fddi/skfp/h/skfbi.h:151:0: warning: "PCI_IOBASE" redefined #define PCI_IOBASE 0xffffff00L /* Bit 31..8: I/O Base address */ ^ In file included from include/linux/io.h:22:0, from include/linux/pci.h:31, from drivers/net/fddi/skfp/skfddi.c:82: ./arch/microblaze/include/asm/io.h:33:0: note: this is the location of the previous definition #define PCI_IOBASE ((void __iomem *)_IO_BASE) ^ Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> 
They are use less, and may generate compiling warnings, so remove them
(microblaze, arc, arm64, and unicore32 have already defined PCI_IOBASE).

The related warnings (with allmodconfig under microblaze):

  CC [M]  drivers/net/fddi/skfp/skfddi.o
  In file included from drivers/net/fddi/skfp/skfddi.c:95:0:
  drivers/net/fddi/skfp/h/skfbi.h:151:0: warning: "PCI_IOBASE" redefined
   #define PCI_IOBASE 0xffffff00L  /* Bit 31..8:  I/O Base address */
   ^
  In file included from include/linux/io.h:22:0,
                   from include/linux/pci.h:31,
                   from drivers/net/fddi/skfp/skfddi.c:82:
  ./arch/microblaze/include/asm/io.h:33:0: note: this is the location of the previous definition
   #define PCI_IOBASE ((void __iomem *)_IO_BASE)
   ^

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
PCI: Remove DEFINE_PCI_DEVICE_TABLE macro use 2014-08-12T18:15:14+00:00 Benoit Taine benoit.taine@lip6.fr 2014-08-08T13:56:03+00:00 9baa3c34ac4e27f7e062f266f50cc5dbea26a6c1 We should prefer `struct pci_device_id` over `DEFINE_PCI_DEVICE_TABLE` to meet kernel coding style guidelines. This issue was reported by checkpatch. A simplified version of the semantic patch that makes this change is as follows (http://coccinelle.lip6.fr/): // <smpl> @@ identifier i; declarer name DEFINE_PCI_DEVICE_TABLE; initializer z; @@ - DEFINE_PCI_DEVICE_TABLE(i) + const struct pci_device_id i[] = z; // </smpl> [bhelgaas: add semantic patch] Signed-off-by: Benoit Taine <benoit.taine@lip6.fr> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> 
We should prefer `struct pci_device_id` over `DEFINE_PCI_DEVICE_TABLE` to
meet kernel coding style guidelines.  This issue was reported by checkpatch.

A simplified version of the semantic patch that makes this change is as
follows (http://coccinelle.lip6.fr/):

// <smpl>

@@
identifier i;
declarer name DEFINE_PCI_DEVICE_TABLE;
initializer z;
@@

- DEFINE_PCI_DEVICE_TABLE(i)
+ const struct pci_device_id i[]
= z;

// </smpl>

[bhelgaas: add semantic patch]
Signed-off-by: Benoit Taine <benoit.taine@lip6.fr>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net 2014-07-16T21:09:34+00:00 David S. Miller davem@davemloft.net 2014-07-16T21:09:34+00:00 1a98c69af1ecd97bfd1f4e4539924a9192434e36 Signed-off-by: David S. Miller <davem@davemloft.net> 
Signed-off-by: David S. Miller <davem@davemloft.net>