linux-stable.git/drivers/net/ethernet/qualcomm, branch linux-rolling-stable Linux kernel stable tree net: qualcomm: qca_uart: report the consumed byte on RX skb allocation failure 2026-04-18T08:46:46+00:00 Pengpeng Hou pengpeng@iscas.ac.cn 2026-04-02T07:12:07+00:00 51e47a41632a23304d32744579660d5dbb9a3a2c commit b76254c55dc8f23edc089027dd3f8792554c69fb upstream. qca_tty_receive() consumes each input byte before checking whether a completed frame needs a fresh receive skb. When the current byte completes a frame, the driver delivers that frame and then allocates a new skb for the next one. If that allocation fails, the current code returns i even though data[i] has already been consumed and may already have completed the delivered frame. Since serdev interprets the return value as the number of accepted bytes, this under-reports progress by one byte and can replay the final byte of the completed frame into a fresh parser state on the next call. Return i + 1 in that failure path so the accepted-byte count matches the actual receive-state progress. Fixes: dfc768fbe618 ("net: qualcomm: add QCA7000 UART driver") Cc: stable@vger.kernel.org Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn> Reviewed-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20260402071207.4036-1-pengpeng@iscas.ac.cn Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
commit b76254c55dc8f23edc089027dd3f8792554c69fb upstream.

qca_tty_receive() consumes each input byte before checking whether a
completed frame needs a fresh receive skb. When the current byte completes
a frame, the driver delivers that frame and then allocates a new skb for
the next one.

If that allocation fails, the current code returns i even though data[i]
has already been consumed and may already have completed the delivered
frame. Since serdev interprets the return value as the number of accepted
bytes, this under-reports progress by one byte and can replay the final
byte of the completed frame into a fresh parser state on the next call.

Return i + 1 in that failure path so the accepted-byte count matches the
actual receive-state progress.

Fixes: dfc768fbe618 ("net: qualcomm: add QCA7000 UART driver")
Cc: stable@vger.kernel.org
Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn>
Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/20260402071207.4036-1-pengpeng@iscas.ac.cn
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
net: ethernet: qualcomm: QCOM_PPE should depend on ARCH_QCOM 2025-09-01T19:53:38+00:00 Geert Uytterhoeven geert+renesas@glider.be 2025-08-29T11:27:06+00:00 35dface61cfed92bf90f68b38b9f8a1d6c30d7df The Qualcomm Technologies, Inc. Packet Process Engine (PPE) is only present on Qualcomm IPQ SoCs. Hence add a dependency on ARCH_QCOM, to prevent asking the user about this driver when configuring a kernel without Qualcomm platform support, Fixes: 353a0f1d5b27606b ("net: ethernet: qualcomm: Add PPE driver for IPQ9574 SoC") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/eb7bd6e6ce27eb6d602a63184d9daa80127e32bd.1756466786.git.geert+renesas@glider.be Signed-off-by: Jakub Kicinski <kuba@kernel.org> 
The Qualcomm Technologies, Inc. Packet Process Engine (PPE) is only
present on Qualcomm IPQ SoCs.  Hence add a dependency on ARCH_QCOM, to
prevent asking the user about this driver when configuring a kernel
without Qualcomm platform support,

Fixes: 353a0f1d5b27606b ("net: ethernet: qualcomm: Add PPE driver for IPQ9574 SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/eb7bd6e6ce27eb6d602a63184d9daa80127e32bd.1756466786.git.geert+renesas@glider.be
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
net: ethernet: qualcomm: Add PPE debugfs support for PPE counters 2025-08-21T10:38:42+00:00 Luo Jie quic_luoj@quicinc.com 2025-08-18T13:14:37+00:00 a2a7221dbd2b177145858daabda0070ff5d2b7e7 The PPE hardware counters maintain counters for packets handled by the various functional blocks of PPE. They help in tracing the packets passed through PPE and debugging any packet drops. The counters displayed by this debugfs file are ones that are common for all Ethernet ports, and they do not include the counters that are specific for a MAC port. Hence they cannot be displayed using ethtool. The per-MAC counters will be supported using "ethtool -S" along with the netdevice driver. The PPE hardware various type counters are made available through the debugfs files under directory "/sys/kernel/debug/ppe/". Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-13-1d4ff641fce9@quicinc.com Signed-off-by: Paolo Abeni <pabeni@redhat.com> 
The PPE hardware counters maintain counters for packets handled by the
various functional blocks of PPE. They help in tracing the packets
passed through PPE and debugging any packet drops.

The counters displayed by this debugfs file are ones that are common
for all Ethernet ports, and they do not include the counters that are
specific for a MAC port. Hence they cannot be displayed using ethtool.
The per-MAC counters will be supported using "ethtool -S" along with
the netdevice driver.

The PPE hardware various type counters are made available through the
debugfs files under directory "/sys/kernel/debug/ppe/".

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-13-1d4ff641fce9@quicinc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
net: ethernet: qualcomm: Initialize PPE L2 bridge settings 2025-08-21T10:38:42+00:00 Lei Wei quic_leiwei@quicinc.com 2025-08-18T13:14:36+00:00 8cc72c6c9236ebdf5d245924574e70546ecdda15 Initialize the L2 bridge settings for the PPE ports to only enable L2 frame forwarding between CPU port and PPE Ethernet ports. The per-port L2 bridge settings are initialized as follows: For PPE CPU port, the PPE bridge TX is enabled and FDB learning is disabled. For PPE physical ports, the default L2 forwarding action is initialized to forward to CPU port only. L2/FDB learning and forwarding will not be enabled for PPE physical ports yet, since the port's VSI (Virtual Switch Instance) and VSI membership are not yet configured, which are required for FDB forwarding. The VSI and FDB forwarding will later be enabled when switchdev is enabled. Signed-off-by: Lei Wei <quic_leiwei@quicinc.com> Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-12-1d4ff641fce9@quicinc.com Signed-off-by: Paolo Abeni <pabeni@redhat.com> 
Initialize the L2 bridge settings for the PPE ports to only enable
L2 frame forwarding between CPU port and PPE Ethernet ports.

The per-port L2 bridge settings are initialized as follows:
For PPE CPU port, the PPE bridge TX is enabled and FDB learning is
disabled. For PPE physical ports, the default L2 forwarding action
is initialized to forward to CPU port only.

L2/FDB learning and forwarding will not be enabled for PPE physical
ports yet, since the port's VSI (Virtual Switch Instance) and VSI
membership are not yet configured, which are required for FDB
forwarding. The VSI and FDB forwarding will later be enabled when
switchdev is enabled.

Signed-off-by: Lei Wei <quic_leiwei@quicinc.com>
Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-12-1d4ff641fce9@quicinc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
net: ethernet: qualcomm: Initialize PPE queue to Ethernet DMA ring mapping 2025-08-21T10:38:41+00:00 Luo Jie quic_luoj@quicinc.com 2025-08-18T13:14:35+00:00 fa99608a9a9e0a967b8d6e8ee53c8c1596447b2b Configure the selected queues to map with an Ethernet DMA ring for the packet to receive on ARM cores. As default initialization, all queues assigned to CPU port 0 are mapped to the EDMA ring 0. This configuration is later updated during Ethernet DMA initialization. Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-11-1d4ff641fce9@quicinc.com Signed-off-by: Paolo Abeni <pabeni@redhat.com> 
Configure the selected queues to map with an Ethernet DMA ring for the
packet to receive on ARM cores.

As default initialization, all queues assigned to CPU port 0 are mapped
to the EDMA ring 0. This configuration is later updated during Ethernet
DMA initialization.

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-11-1d4ff641fce9@quicinc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
net: ethernet: qualcomm: Initialize PPE RSS hash settings 2025-08-21T10:38:41+00:00 Luo Jie quic_luoj@quicinc.com 2025-08-18T13:14:34+00:00 1c46c3c0075cd411a50b72e3a4002828cddf7b6d The PPE RSS hash is generated during PPE receive, based on the packet content (3 tuples or 5 tuples) and as per the configured RSS seed. The hash is then used to select the queue to transmit the packet to the ARM CPU. This patch initializes the RSS hash settings that are used to generate the hash for the packet during PPE packet receive. Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-10-1d4ff641fce9@quicinc.com Signed-off-by: Paolo Abeni <pabeni@redhat.com> 
The PPE RSS hash is generated during PPE receive, based on the packet
content (3 tuples or 5 tuples) and as per the configured RSS seed. The
hash is then used to select the queue to transmit the packet to the
ARM CPU.

This patch initializes the RSS hash settings that are used to generate
the hash for the packet during PPE packet receive.

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-10-1d4ff641fce9@quicinc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
net: ethernet: qualcomm: Initialize PPE port control settings 2025-08-21T10:38:41+00:00 Luo Jie quic_luoj@quicinc.com 2025-08-18T13:14:33+00:00 8821bb0f626253ee9f59124daa4d2a1289e7b7da Configure the default action as drop when the packet size is more than the configured MTU of physical port. Also enable port specific counters in PPE. Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-9-1d4ff641fce9@quicinc.com Signed-off-by: Paolo Abeni <pabeni@redhat.com> 
Configure the default action as drop when the packet size is more than
the configured MTU of physical port. Also enable port specific counters
in PPE.

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-9-1d4ff641fce9@quicinc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
net: ethernet: qualcomm: Initialize PPE service code settings 2025-08-21T10:38:41+00:00 Luo Jie quic_luoj@quicinc.com 2025-08-18T13:14:32+00:00 73d05bdaf01eb2a5c4b1408417a8763f8a026af6 PPE service code is a special code (0-255) that is defined by PPE for PPE's packet processing stages, as per the network functions required for the packet. For packet being sent out by ARM cores on Ethernet ports, The service code 1 is used as the default service code. This service code is used to bypass most of packet processing stages of the PPE before the packet transmitted out PPE port, since the software network stack has already processed the packet. Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-8-1d4ff641fce9@quicinc.com Signed-off-by: Paolo Abeni <pabeni@redhat.com> 
PPE service code is a special code (0-255) that is defined by PPE for
PPE's packet processing stages, as per the network functions required
for the packet.

For packet being sent out by ARM cores on Ethernet ports, The service
code 1 is used as the default service code. This service code is used
to bypass most of packet processing stages of the PPE before the packet
transmitted out PPE port, since the software network stack has already
processed the packet.

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-8-1d4ff641fce9@quicinc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
net: ethernet: qualcomm: Initialize PPE queue settings 2025-08-21T10:38:41+00:00 Luo Jie quic_luoj@quicinc.com 2025-08-18T13:14:31+00:00 7a23a8af179dacc538b52b594b6b399cd64885c9 Configure unicast and multicast hardware queues for the PPE ports to enable packet forwarding between the ports. Each PPE port is assigned with a range of queues. The queue ID selection for the packet is decided by the queue base and queue offset that is configured based on the internal priority and the RSS hash value of the packet. Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-7-1d4ff641fce9@quicinc.com Signed-off-by: Paolo Abeni <pabeni@redhat.com> 
Configure unicast and multicast hardware queues for the PPE ports to
enable packet forwarding between the ports.

Each PPE port is assigned with a range of queues. The queue ID selection
for the packet is decided by the queue base and queue offset that is
configured based on the internal priority and the RSS hash value of the
packet.

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-7-1d4ff641fce9@quicinc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
net: ethernet: qualcomm: Initialize the PPE scheduler settings 2025-08-21T10:38:41+00:00 Luo Jie quic_luoj@quicinc.com 2025-08-18T13:14:30+00:00 331227983814fa89d7e9f3356da89de223d414c1 The PPE scheduler settings determine the priority of scheduling the packet across the different hardware queues per PPE port. Signed-off-by: Luo Jie <quic_luoj@quicinc.com> Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-6-1d4ff641fce9@quicinc.com Signed-off-by: Paolo Abeni <pabeni@redhat.com> 
The PPE scheduler settings determine the priority of scheduling the
packet across the different hardware queues per PPE port.

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
Link: https://patch.msgid.link/20250818-qcom_ipq_ppe-v8-6-1d4ff641fce9@quicinc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>