linux-stable.git/drivers/net/can, branch linux-4.6.y

can: fix oops caused by wrong rtnl dellink usage

2016-08-10T10:54:48+00:00

commit 25e1ed6e64f52a692ba3191c4fde650aab3ecc07 upstream.

For 'real' hardware CAN devices the netlink interface is used to set CAN
specific communication parameters. Real CAN hardware can not be created nor
removed with the ip tool ...

This patch adds a private dellink function for the CAN device driver interface
that does just nothing.

It's a follow up to commit 993e6f2fd ("can: fix oops caused by wrong rtnl
newlink usage") but for dellink.

Reported-by: ajneu 
Signed-off-by: Oliver Hartkopp 
Signed-off-by: Marc Kleine-Budde 
Signed-off-by: Greg Kroah-Hartman

can: fix handling of unmodifiable configuration options fix

2016-08-10T10:54:48+00:00

commit bce271f255dae8335dc4d2ee2c4531e09cc67f5a upstream.

With upstream commit bb208f144cf3f59 (can: fix handling of unmodifiable
configuration options) a new can_validate() function was introduced.

When invoking 'ip link set can0 type can' without any configuration data
can_validate() tries to validate the content without taking into account that
there's totally no content. This patch adds a check for missing content.

Reported-by: ajneu 
Signed-off-by: Oliver Hartkopp 
Signed-off-by: Marc Kleine-Budde 
Signed-off-by: Greg Kroah-Hartman

can: c_can: Update D_CAN TX and RX functions to 32 bit - fix Altera Cyclone access

2016-08-10T10:54:48+00:00

commit 427460c83cdf55069eee49799a0caef7dde8df69 upstream.

When testing CAN write floods on Altera's CycloneV, the first 2 bytes
are sometimes 0x00, 0x00 or corrupted instead of the values sent. Also
observed bytes 4 & 5 were corrupted in some cases.

The D_CAN Data registers are 32 bits and changing from 16 bit writes to
32 bit writes fixes the problem.

Testing performed on Altera CycloneV (D_CAN).  Requesting tests on other
C_CAN & D_CAN platforms.

Reported-by: Richard Andrysek 
Signed-off-by: Thor Thayer 
Signed-off-by: Marc Kleine-Budde 
Signed-off-by: Greg Kroah-Hartman

can: at91_can: RX queue could get stuck at high bus load

2016-08-10T10:54:48+00:00

commit 43200a4480cbbe660309621817f54cbb93907108 upstream.

At high bus load it could happen that "at91_poll()" enters with all RX
message boxes filled up. If then at the end the "quota" is exceeded as
well, "rx_next" will not be reset to the first RX mailbox and hence the
interrupts remain disabled.

Signed-off-by: Wolfgang Grandegger 
Tested-by: Amr Bekhit 
Signed-off-by: Marc Kleine-Budde 
Signed-off-by: Greg Kroah-Hartman

can: fix handling of unmodifiable configuration options

2016-06-01T19:17:59+00:00

commit bb208f144cf3f59d8f89a09a80efd04389718907 upstream.

As described in 'can: m_can: tag current CAN FD controllers as non-ISO'
(6cfda7fbebe) it is possible to define fixed configuration options by
setting the according bit in 'ctrlmode' and clear it in 'ctrlmode_supported'.
This leads to the incovenience that the fixed configuration bits can not be
passed by netlink even when they have the correct values (e.g. non-ISO, FD).

This patch fixes that issue and not only allows fixed set bit values to be set
again but now requires(!) to provide these fixed values at configuration time.
A valid CAN FD configuration consists of a nominal/arbitration bittiming, a
data bittiming and a control mode with CAN_CTRLMODE_FD set - which is now
enforced by a new can_validate() function. This fix additionally removed the
inconsistency that was prohibiting the support of 'CANFD-only' controller
drivers, like the RCar CAN FD.

For this reason a new helper can_set_static_ctrlmode() has been introduced to
provide a proper interface to handle static enabled CAN controller options.

Reported-by: Ramesh Shanmugasundaram 
Signed-off-by: Oliver Hartkopp 
Reviewed-by: Ramesh Shanmugasundaram  
Signed-off-by: Marc Kleine-Budde 
Signed-off-by: Greg Kroah-Hartman

can: rcar_can: Add r8a7795 support

2016-03-10T09:30:21+00:00

Added r8a7795 SoC support.

Signed-off-by: Ramesh Shanmugasundaram 
Acked-by: Rob Herring 
Signed-off-by: Marc Kleine-Budde

can: ifi: Add obscure bit swap for EFF frame IDs

2016-03-10T09:19:09+00:00

In case of CAN2.0 EFF frame, the controller handles frame IDs in a
rather bizzare way. The ID is split into an extended part, IDX[28:11]
and standard part, ID[10:0]. In the TX path, the core first sends the
top 11 bits of the IDX, followed by ID and finally the rest of IDX.
In the RX path, the core stores the ID the LSbit part of IDX field,
followed by the LSbit parts of real IDX. The MSbit parts of IDX are
stored in ID field of the register.

This patch implements the necessary bit shuffling to mitigate this
obscure behavior. In case two of these controllers are connected
together, the RX and TX bit swapping nullifies itself and the issue
does not manifest. The issue only manifests when talking to another
different CAN controller.

Signed-off-by: Marek Vasut 
Cc: Marc Kleine-Budde 
Cc: Mark Rutland 
Cc: Oliver Hartkopp 
Cc: Wolfgang Grandegger 
Reviewed-by: Oliver Hartkopp 
Signed-off-by: Marc Kleine-Budde

can: ifi: Fix RX and TX ID mask

2016-03-10T09:19:09+00:00

The RX and TX ID mask for CAN2.0 is 11 bits wide. This patch fixes
the incorrect mask, which caused the CAN IDs to miss the MSBit both
on receive and transmit.

Signed-off-by: Marek Vasut 
Cc: Marc Kleine-Budde 
Cc: Mark Rutland 
Cc: Oliver Hartkopp 
Cc: Wolfgang Grandegger 
Reviewed-by: Oliver Hartkopp 
Signed-off-by: Marc Kleine-Budde

can: ifi: Fix TX DLC configuration

2016-03-10T09:19:09+00:00

The TX DLC, the transmission length information, was not written
into the transmit configuration register. When using the CAN core
with different CAN controller, the receiving CAN controller will
receive only the ID part of the CAN frame, but no data at all.

This patch adds the TX DLC into the register to fix this issue.

Signed-off-by: Marek Vasut 
Cc: Marc Kleine-Budde 
Cc: Mark Rutland 
Cc: Oliver Hartkopp 
Cc: Wolfgang Grandegger 
Reviewed-by: Oliver Hartkopp 
Signed-off-by: Marc Kleine-Budde

can: ifi: Fix clock generator configuration

2016-03-10T09:19:09+00:00

The clock generation does not match reality when using the CAN IP
core outside of the FPGA design. This patch fixes the computation
of values which are programmed into the clock generator registers.

First, there are some off-by-one errors which manifest themselves
only when communicating with different controller, so those are
fixed.

Second, the bits in the clock generator registers have different
meaning depending on whether the core is in ISO CANFD mode or any
of the other modes (BOSCH CANFD or CAN2.0). Detect the ISO CANFD
mode and fix handling of this special case of clock configuration.

Finally, the CAN clock speed is in CANCLOCK register, not SYSCLOCK
register, so fix this as well.

Signed-off-by: Marek Vasut 
Cc: Marc Kleine-Budde 
Cc: Mark Rutland 
Cc: Oliver Hartkopp 
Cc: Wolfgang Grandegger 
Reviewed-by: Oliver Hartkopp 
Signed-off-by: Marc Kleine-Budde