linux-stable.git/drivers/mmc, branch v3.12.41 Linux kernel stable tree mmc: sdhci-pxav3: fix setting of pdata->clk_delay_cycles 2015-03-01T22:34:17+00:00 Jisheng Zhang jszhang@marvell.com 2015-01-28T11:54:12+00:00 04333c0b73dfddeba3d2bdeb5198b220b4a21695 commit 14460dbaf7a5a0488963fdb8232ad5c8a8cca7b7 upstream. Current code checks "clk_delay_cycles > 0" to know whether the optional "mrvl,clk_delay_cycles" is set or not. But of_property_read_u32() doesn't touch clk_delay_cycles if the property is not set. And type of clk_delay_cycles is u32, so we may always set pdata->clk_delay_cycles as a random value. This patch fix this problem by check the return value of of_property_read_u32() to know whether the optional clk-delay-cycles is set or not. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Jiri Slaby <jslaby@suse.cz> 
commit 14460dbaf7a5a0488963fdb8232ad5c8a8cca7b7 upstream.

Current code checks "clk_delay_cycles > 0" to know whether the optional
"mrvl,clk_delay_cycles" is set or not. But of_property_read_u32() doesn't
touch clk_delay_cycles if the property is not set. And type of
clk_delay_cycles is u32, so we may always set pdata->clk_delay_cycles as a
random value.

This patch fix this problem by check the return value of of_property_read_u32()
to know whether the optional clk-delay-cycles is set or not.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
mmc: sdhci-pci: Add support for Intel SPT 2015-02-08T19:01:49+00:00 Adrian Hunter adrian.hunter@intel.com 2015-01-05T12:47:58+00:00 27152be6083112b94ce6ff5186d01ec4d702ddcf commit 1f7f26528fb159e71f081df1d1050c218ff1d74d upstream. Add PCI IDs for SPT eMMC, SDIO and SD card. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Jiri Slaby <jslaby@suse.cz> 
commit 1f7f26528fb159e71f081df1d1050c218ff1d74d upstream.

Add PCI IDs for SPT eMMC, SDIO and SD card.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
mmc: sdhci-pci: Fix Braswell eMMC timeout clock frequency 2015-02-08T18:26:39+00:00 Adrian Hunter adrian.hunter@intel.com 2014-09-24T07:27:33+00:00 e29366fda793d8d423e0a476b62c2a3a703d4dc6 commit a06586b62db5c63752e2e68daffec4baa275d594 upstream. Braswell eMMC host controller specifies an incorrect timeout clock frequncy in the capabilities registers. The correct value is 1 MHz. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Jiri Slaby <jslaby@suse.cz> 
commit a06586b62db5c63752e2e68daffec4baa275d594 upstream.

Braswell eMMC host controller specifies an incorrect
timeout clock frequncy in the capabilities registers.
The correct value is 1 MHz.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
mmc: sdhci: Add PCI IDs for Intel Braswell 2015-02-08T18:25:57+00:00 Alan Cox alan@linux.intel.com 2014-08-20T10:27:44+00:00 a17e1c8da5772d176e6c2dcb209f4164cd7dc4b6 commit 066173b6436dfc57a96b2d940f4e727fe8131261 upstream. The hardware is the same as used in Baytrail. Add these new PCI IDs to the driver's list of supported IDs. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Jiri Slaby <jslaby@suse.cz> 
commit 066173b6436dfc57a96b2d940f4e727fe8131261 upstream.

The hardware is the same as used in Baytrail. Add these new PCI IDs to the
driver's list of supported IDs.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
mmc: sdhci-pci: break out definitions to header file 2015-02-08T18:25:31+00:00 Adam Lee adam.lee@canonical.com 2013-12-18T14:23:38+00:00 34385e13d73ba4e6cef1a2f74bf9996a68fb32a3 commit 522624f97ee22684cf1b169b5a490cc3ad87b22c upstream. Break out definitions in sdhci-pci.c to sdhci-pci.h, for introducing module files like sdhci-pci-xxx.c Signed-off-by: Adam Lee <adam.lee@canonical.com> Signed-off-by: Chris Ball <chris@printf.net> Signed-off-by: Jiri Slaby <jslaby@suse.cz> 
commit 522624f97ee22684cf1b169b5a490cc3ad87b22c upstream.

Break out definitions in sdhci-pci.c to sdhci-pci.h, for introducing
module files like sdhci-pci-xxx.c

Signed-off-by: Adam Lee <adam.lee@canonical.com>
Signed-off-by: Chris Ball <chris@printf.net>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
mmc: sdhci: add support for realtek rts5250 2015-02-08T17:02:56+00:00 Micky Ching micky_ching@realsil.com.cn 2014-02-21T10:40:35+00:00 a007ffbfdf0abc5e8072905f51e283b473d2a06c commit 9107ebbf9652c033eb5dd10a6ea34a132db3cde1 upstream. Add support for realtek rts5250 pci card reader. The card reader has some problems with DDR50 mode, so add a new quirks2 for broken ddr50. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Chris Ball <chris@printf.net> Signed-off-by: Jiri Slaby <jslaby@suse.cz> 
commit 9107ebbf9652c033eb5dd10a6ea34a132db3cde1 upstream.

Add support for realtek rts5250 pci card reader. The card reader has
some problems with DDR50 mode, so add a new quirks2 for broken ddr50.

Signed-off-by: Micky Ching <micky_ching@realsil.com.cn>
Signed-off-by: Chris Ball <chris@printf.net>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
mmc: sdhci: add quirk for broken HS200 support 2015-02-08T17:02:31+00:00 David Cohen david.a.cohen@linux.intel.com 2013-10-29T17:58:26+00:00 dbf219a4e3adede455b4b81a76665569d99c3b22 commit 13868bf20f2f2c305f96e23620b024e167d6f9cb upstream. This patch defines a quirk for platforms unable to enable HS200 support. Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Reviewed-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Acked-by: Dong Aisheng <b29396@freescale.com> Cc: stable <stable@vger.kernel.org> # [3.13] Signed-off-by: Chris Ball <chris@printf.net> Signed-off-by: Jiri Slaby <jslaby@suse.cz> 
commit 13868bf20f2f2c305f96e23620b024e167d6f9cb upstream.

This patch defines a quirk for platforms unable to enable HS200 support.

Signed-off-by: David Cohen <david.a.cohen@linux.intel.com>
Reviewed-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Acked-by: Dong Aisheng <b29396@freescale.com>
Cc: stable <stable@vger.kernel.org> # [3.13]
Signed-off-by: Chris Ball <chris@printf.net>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
mmc: sdhci-pci: add broken HS200 quirk for Intel Merrifield 2015-02-08T17:01:27+00:00 David Cohen david.a.cohen@linux.intel.com 2013-10-29T17:58:27+00:00 568d963f10c4b1b757a156df81502af1b305253e commit 390145f9adcf2730fcee81c8a51fd7c6c08f705f upstream. Due to unknown hw issue so far, Merrifield is unable to enable HS200 support. This patch adds quirk to avoid SDHCI to initialize with error below: [ 53.850132] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.12.0-rc6-00037-g3d7c8d9-dirty #36 [ 53.850150] Hardware name: Intel Corporation Merrifield/SALT BAY, BIOS 397 2013.09.12:11.51.40 [ 53.850167] 00000000 00000000 ee409e48 c18816d2 00000000 ee409e78 c123e254 c1acc9b0 [ 53.850227] 00000000 00000000 c1b14148 000003de c16c03bf c16c03bf ee75b480 ed97c54c [ 53.850282] ee75b480 ee409e88 c123e292 00000009 00000000 ee409ef8 c16c03bf c1207fac [ 53.850339] Call Trace: [ 53.850376] [<c18816d2>] dump_stack+0x4b/0x79 [ 53.850408] [<c123e254>] warn_slowpath_common+0x84/0xa0 [ 53.850436] [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50 [ 53.850462] [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50 [ 53.850490] [<c123e292>] warn_slowpath_null+0x22/0x30 [ 53.850516] [<c16c03bf>] sdhci_send_command+0xb4f/0xc50 [ 53.850545] [<c1207fac>] ? native_sched_clock+0x2c/0xb0 [ 53.850575] [<c14c1f93>] ? delay_tsc+0x73/0xb0 [ 53.850601] [<c14c1ebe>] ? __const_udelay+0x1e/0x20 [ 53.850626] [<c16bdeb3>] ? sdhci_reset+0x93/0x190 [ 53.850654] [<c16c05b0>] sdhci_finish_data+0xf0/0x2e0 [ 53.850683] [<c16c130f>] sdhci_irq+0x31f/0x930 [ 53.850713] [<c12cb080>] ? __buffer_unlock_commit+0x10/0x20 [ 53.850740] [<c12cbcd7>] ? trace_buffer_unlock_commit+0x37/0x50 [ 53.850773] [<c1288f3c>] handle_irq_event_percpu+0x5c/0x220 [ 53.850800] [<c128bc96>] ? handle_fasteoi_irq+0x16/0xd0 [ 53.850827] [<c128913a>] handle_irq_event+0x3a/0x60 [ 53.850852] [<c128bc80>] ? unmask_irq+0x30/0x30 [ 53.850878] [<c128bcce>] handle_fasteoi_irq+0x4e/0xd0 [ 53.850895] <IRQ> [<c1890b52>] ? do_IRQ+0x42/0xb0 [ 53.850943] [<c1890a31>] ? common_interrupt+0x31/0x38 [ 53.850973] [<c12b00d8>] ? cgroup_mkdir+0x4e8/0x580 [ 53.851001] [<c1208d32>] ? default_idle+0x22/0xf0 [ 53.851029] [<c1209576>] ? arch_cpu_idle+0x26/0x30 [ 53.851054] [<c1288505>] ? cpu_startup_entry+0x65/0x240 [ 53.851082] [<c18793d5>] ? rest_init+0xb5/0xc0 [ 53.851108] [<c1879320>] ? __read_lock_failed+0x18/0x18 [ 53.851138] [<c1bf6a15>] ? start_kernel+0x31b/0x321 [ 53.851164] [<c1bf652f>] ? repair_env_string+0x51/0x51 [ 53.851190] [<c1bf6363>] ? i386_start_kernel+0x139/0x13c [ 53.851209] ---[ end trace 92777f5fe48d33f2 ]--- [ 53.853449] mmcblk0: error -84 transferring data, sector 11142162, nr 304, cmd response 0x0, card status 0x0 [ 53.853476] mmcblk0: retrying using single block read [ 55.937863] sdhci: Timeout waiting for Buffer Read Ready interrupt during tuning procedure, falling back to fixed sampling clock [ 56.207951] sdhci: Timeout waiting for Buffer Read Ready interrupt during tuning procedure, falling back to fixed sampling clock [ 66.228785] mmc0: Timeout waiting for hardware interrupt. [ 66.230855] ------------[ cut here ]------------ Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Reviewed-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Acked-by: Dong Aisheng <b29396@freescale.com> Cc: stable <stable@vger.kernel.org> # [3.13] Signed-off-by: Chris Ball <chris@printf.net> Signed-off-by: Jiri Slaby <jslaby@suse.cz> 
commit 390145f9adcf2730fcee81c8a51fd7c6c08f705f upstream.

Due to unknown hw issue so far, Merrifield is unable to enable HS200
support. This patch adds quirk to avoid SDHCI to initialize with error
below:

[   53.850132] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W
3.12.0-rc6-00037-g3d7c8d9-dirty #36
[   53.850150] Hardware name: Intel Corporation Merrifield/SALT BAY,
BIOS 397 2013.09.12:11.51.40
[   53.850167]  00000000 00000000 ee409e48 c18816d2 00000000 ee409e78
c123e254 c1acc9b0
[   53.850227]  00000000 00000000 c1b14148 000003de c16c03bf c16c03bf
ee75b480 ed97c54c
[   53.850282]  ee75b480 ee409e88 c123e292 00000009 00000000 ee409ef8
c16c03bf c1207fac
[   53.850339] Call Trace:
[   53.850376]  [<c18816d2>] dump_stack+0x4b/0x79
[   53.850408]  [<c123e254>] warn_slowpath_common+0x84/0xa0
[   53.850436]  [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50
[   53.850462]  [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50
[   53.850490]  [<c123e292>] warn_slowpath_null+0x22/0x30
[   53.850516]  [<c16c03bf>] sdhci_send_command+0xb4f/0xc50
[   53.850545]  [<c1207fac>] ? native_sched_clock+0x2c/0xb0
[   53.850575]  [<c14c1f93>] ? delay_tsc+0x73/0xb0
[   53.850601]  [<c14c1ebe>] ? __const_udelay+0x1e/0x20
[   53.850626]  [<c16bdeb3>] ? sdhci_reset+0x93/0x190
[   53.850654]  [<c16c05b0>] sdhci_finish_data+0xf0/0x2e0
[   53.850683]  [<c16c130f>] sdhci_irq+0x31f/0x930
[   53.850713]  [<c12cb080>] ? __buffer_unlock_commit+0x10/0x20
[   53.850740]  [<c12cbcd7>] ? trace_buffer_unlock_commit+0x37/0x50
[   53.850773]  [<c1288f3c>] handle_irq_event_percpu+0x5c/0x220
[   53.850800]  [<c128bc96>] ? handle_fasteoi_irq+0x16/0xd0
[   53.850827]  [<c128913a>] handle_irq_event+0x3a/0x60
[   53.850852]  [<c128bc80>] ? unmask_irq+0x30/0x30
[   53.850878]  [<c128bcce>] handle_fasteoi_irq+0x4e/0xd0
[   53.850895]  <IRQ>  [<c1890b52>] ? do_IRQ+0x42/0xb0
[   53.850943]  [<c1890a31>] ? common_interrupt+0x31/0x38
[   53.850973]  [<c12b00d8>] ? cgroup_mkdir+0x4e8/0x580
[   53.851001]  [<c1208d32>] ? default_idle+0x22/0xf0
[   53.851029]  [<c1209576>] ? arch_cpu_idle+0x26/0x30
[   53.851054]  [<c1288505>] ? cpu_startup_entry+0x65/0x240
[   53.851082]  [<c18793d5>] ? rest_init+0xb5/0xc0
[   53.851108]  [<c1879320>] ? __read_lock_failed+0x18/0x18
[   53.851138]  [<c1bf6a15>] ? start_kernel+0x31b/0x321
[   53.851164]  [<c1bf652f>] ? repair_env_string+0x51/0x51
[   53.851190]  [<c1bf6363>] ? i386_start_kernel+0x139/0x13c
[   53.851209] ---[ end trace 92777f5fe48d33f2 ]---
[   53.853449] mmcblk0: error -84 transferring data, sector 11142162, nr
304, cmd response 0x0, card status 0x0
[   53.853476] mmcblk0: retrying using single block read
[   55.937863] sdhci: Timeout waiting for Buffer Read Ready interrupt
during tuning procedure, falling back to fixed sampling clock
[   56.207951] sdhci: Timeout waiting for Buffer Read Ready interrupt
during tuning procedure, falling back to fixed sampling clock
[   66.228785] mmc0: Timeout waiting for hardware interrupt.
[   66.230855] ------------[ cut here ]------------

Signed-off-by: David Cohen <david.a.cohen@linux.intel.com>
Reviewed-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Acked-by: Dong Aisheng <b29396@freescale.com>
Cc: stable <stable@vger.kernel.org> # [3.13]
Signed-off-by: Chris Ball <chris@printf.net>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
mmc: sdhci-acpi: Add ACPI HID INT344D 2015-02-08T16:55:16+00:00 Adrian Hunter adrian.hunter@intel.com 2015-01-05T12:47:57+00:00 a27ad256a42fae347acaec06ff8e53ba1db20162 commit d0ed8e6b0ab149421cd1532e7c5ebb0992ad25d0 upstream. Add ACPI HID INT344D for an Intel SDIO host controller. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Jiri Slaby <jslaby@suse.cz> 
commit d0ed8e6b0ab149421cd1532e7c5ebb0992ad25d0 upstream.

Add ACPI HID INT344D for an Intel SDIO host controller.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
mmc: sdhci-acpi: Add a HID and UID for a SD Card host controller 2015-02-08T16:54:35+00:00 Adrian Hunter adrian.hunter@intel.com 2014-09-24T07:27:29+00:00 43a93a13b5067027d122ca3b3a79f3ba0d684322 commit 7147eaf3a4fe7e7dbb6e1f89e328ea0507e0c32c upstream. Add a HID (INT33BB) and UID (3) for a SD Card host controller. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Jiri Slaby <jslaby@suse.cz> 
commit 7147eaf3a4fe7e7dbb6e1f89e328ea0507e0c32c upstream.

Add a HID (INT33BB) and UID (3) for a SD Card host controller.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>