linux-stable.git/drivers/memory/tegra/Kconfig, branch linux-5.15.y

memory: tegra20-emc: Support matching timings by LPDDR2 configuration

2025-03-13T11:50:05+00:00

[ Upstream commit 131dd9a436d8f6dbaf3d9597803765d271b2fc19 ]

ASUS Transformer TF101 doesn't provide RAM code and in this case memory
timings should be selected based on identity information read out from
SDRAM chip. Support matching timings by LPDDR2 configuration.

Signed-off-by: Dmitry Osipenko 
Link: https://lore.kernel.org/r/20211006224659.21434-10-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski 
Stable-dep-of: b9784e5cde1f ("memory: tegra20-emc: fix an OF node reference bug in tegra_emc_find_node_by_ram_code()")
Signed-off-by: Sasha Levin

memory: tegra: Enable compile testing for all drivers

2021-06-03T12:24:03+00:00

Enable compile testing for all Tegra memory drivers.

Reviewed-by: Krzysztof Kozlowski 
Signed-off-by: Dmitry Osipenko 
Signed-off-by: Thierry Reding

memory: tegra124: Support interconnect framework

2021-01-05T17:03:22+00:00

Now Internal and External memory controllers are memory interconnection
providers. This allows us to use interconnect API for tuning of memory
configuration. EMC driver now supports OPPs and DVFS.

Tested-by: Nicolas Chauvet 
Acked-by: Georgi Djakov 
Signed-off-by: Dmitry Osipenko 
Link: https://lore.kernel.org/r/20201228154920.18846-4-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski

memory: tegra124-emc: Make driver modular

2021-01-05T17:00:09+00:00

Add modularization support to the Tegra124 EMC driver, which now can be
compiled as a loadable kernel module.

Note that EMC clock must be registered at clk-init time, otherwise PLLM
will be disabled as unused clock at boot time if EMC driver is compiled
as a module. Hence add a prepare/complete callbacks. similarly to what is
done for the Tegra20/30 EMC drivers.

Tested-by: Nicolas Chauvet 
Signed-off-by: Dmitry Osipenko 
Link: https://lore.kernel.org/r/20201228154920.18846-2-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski

memory: tegra30: Support interconnect framework

2020-12-05T13:54:36+00:00

Now Internal and External memory controllers are memory interconnection
providers. This allows us to use interconnect API for tuning of memory
configuration. EMC driver now supports OPPs and DVFS. MC driver now
supports tuning of memory arbitration latency, which needs to be done
for ISO memory clients, like a Display client for example.

Signed-off-by: Dmitry Osipenko 
Tested-by: Peter Geis 
Acked-by: Georgi Djakov 
Acked-by: Thierry Reding 
Link: https://lore.kernel.org/r/20201203192439.16177-4-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski

memory: tegra30-emc: Make driver modular

2020-11-26T17:50:36+00:00

Add modularization support to the Tegra30 EMC driver, which now can be
compiled as a loadable kernel module.

Signed-off-by: Dmitry Osipenko 
Link: https://lore.kernel.org/r/20201111011456.7875-8-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski

memory: tegra20-emc: Add devfreq support

2020-11-26T17:50:36+00:00

Add devfreq support to the Tegra20 EMC driver. Memory utilization
statistics will be periodically polled from the memory controller and
appropriate minimum clock rate will be selected by the devfreq governor.

Signed-off-by: Dmitry Osipenko 
Reviewed-by: Chanwoo Choi 
Link: https://lore.kernel.org/r/20201111011456.7875-5-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski

memory: tegra20: Support interconnect framework

2020-11-26T17:50:36+00:00

Now Internal and External Memory Controllers are memory interconnection
providers. This allows us to use interconnect API for tuning of memory
configuration. EMC driver now supports OPPs and DVFS.

Signed-off-by: Dmitry Osipenko 
Link: https://lore.kernel.org/r/20201104164923.21238-36-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski

memory: tegra20-emc: Make driver modular

2020-11-26T17:50:35+00:00

Add modularization support to the Tegra20 EMC driver, which now can be
compiled as a loadable kernel module.

Signed-off-by: Dmitry Osipenko 
Acked-by: Thierry Reding 
Link: https://lore.kernel.org/r/20201104164923.21238-34-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski

memory: tegra-mc: Add interconnect framework

2020-11-26T17:50:35+00:00

Add common SoC-agnostic ICC framework which turns Tegra Memory Controller
into a memory interconnection provider. This allows us to use interconnect
API for tuning of memory configurations.

Signed-off-by: Dmitry Osipenko 
Tested-by: Peter Geis 
Tested-by: Nicolas Chauvet 
Link: https://lore.kernel.org/r/20201104164923.21238-33-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski