linux-stable.git/drivers/mailbox, branch v5.16.3 Linux kernel stable tree mailbox: change mailbox-mpfs compatible string 2022-01-27T11:02:37+00:00 Conor Dooley conor.dooley@microchip.com 2021-12-17T09:33:12+00:00 a3a2e59a4e9af9f153bffe08597d589d628ccfe3 [ Upstream commit f10b1fc0161cd99e54c5687fcc63368aa255e05e ] The Polarfire SoC is currently using two different compatible string prefixes. Fix this by changing "polarfire-soc-*" strings to "mpfs-*" in its system controller in order to match the compatible string used in the soc binding and device tree. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit f10b1fc0161cd99e54c5687fcc63368aa255e05e ]

The Polarfire SoC is currently using two different compatible string
prefixes. Fix this by changing "polarfire-soc-*" strings to "mpfs-*" in
its system controller in order to match the compatible string used in
the soc binding and device tree.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
mailbox: pcc: Handle all PCC subtypes correctly in pcc_mbox_irq 2022-01-27T11:02:11+00:00 Sudeep Holla sudeep.holla@arm.com 2021-12-09T09:21:46+00:00 d2c375e9aeeedf90f127201f06db23048b5bd8f5 [ Upstream commit 7215a7857e796c655ae1184b313556102fa8bc40 ] Commit c45ded7e1135 ("mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4)") enabled the type3/4 of PCCT, but the change in pcc_mbox_irq breaks the other PCC subtypes. The kernel reports a warning on an Ampere eMag server -->8 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.16.0-rc4 #127 Hardware name: MiTAC RAPTOR EV-883832-X3-0001/RAPTOR, BIOS 0.14 02/22/2019 Call trace: dump_backtrace+0x0/0x200 show_stack+0x20/0x30 dump_stack_lvl+0x68/0x84 dump_stack+0x18/0x34 __report_bad_irq+0x54/0x17c note_interrupt+0x330/0x428 handle_irq_event_percpu+0x90/0x98 handle_irq_event+0x4c/0x148 handle_fasteoi_irq+0xc4/0x188 generic_handle_domain_irq+0x44/0x68 gic_handle_irq+0x84/0x2ec call_on_irq_stack+0x28/0x34 do_interrupt_handler+0x88/0x90 el1_interrupt+0x48/0xb0 el1h_64_irq_handler+0x18/0x28 el1h_64_irq+0x7c/0x80 Fixes: c45ded7e1135 ("mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4)") Reported-by: Justin He <justin.he@arm.com> Tested-by: Justin He <justin.he@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit 7215a7857e796c655ae1184b313556102fa8bc40 ]

Commit c45ded7e1135 ("mailbox: pcc: Add support for PCCT extended PCC
subspaces(type 3/4)") enabled the type3/4 of PCCT, but the change in
pcc_mbox_irq breaks the other PCC subtypes.

The kernel reports a warning on an Ampere eMag server

-->8
 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.16.0-rc4 #127
 Hardware name: MiTAC RAPTOR EV-883832-X3-0001/RAPTOR, BIOS 0.14 02/22/2019
 Call trace:
  dump_backtrace+0x0/0x200
  show_stack+0x20/0x30
  dump_stack_lvl+0x68/0x84
  dump_stack+0x18/0x34
  __report_bad_irq+0x54/0x17c
  note_interrupt+0x330/0x428
  handle_irq_event_percpu+0x90/0x98
  handle_irq_event+0x4c/0x148
  handle_fasteoi_irq+0xc4/0x188
  generic_handle_domain_irq+0x44/0x68
  gic_handle_irq+0x84/0x2ec
  call_on_irq_stack+0x28/0x34
  do_interrupt_handler+0x88/0x90
  el1_interrupt+0x48/0xb0
  el1h_64_irq_handler+0x18/0x28
  el1h_64_irq+0x7c/0x80

Fixes: c45ded7e1135 ("mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4)")
Reported-by: Justin He <justin.he@arm.com>
Tested-by: Justin He <justin.he@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
mailbox: pcc: Avoid using the uninitialized variable 'dev' 2022-01-27T11:02:11+00:00 Sudeep Holla sudeep.holla@arm.com 2021-12-09T08:21:43+00:00 b986b4ef835f6ef870ac152fb1ac9866330f94e4 [ Upstream commit 960c4056aadcf61983f8eaac159927a052f8cf01 ] Smatch static checker warns: | drivers/mailbox/pcc.c:292 pcc_mbox_request_channel() | error: uninitialized symbol 'dev'. Fix the same by using pr_err instead of dev_err as the variable 'dev' is uninitialized at that stage. Fixes: ce028702ddbc ("mailbox: pcc: Move bulk of PCCT parsing into pcc_mbox_probe") Cc: Jassi Brar <jassisinghbrar@gmail.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit 960c4056aadcf61983f8eaac159927a052f8cf01 ]

Smatch static checker warns:

  |  drivers/mailbox/pcc.c:292 pcc_mbox_request_channel()
  |  error: uninitialized symbol 'dev'.

Fix the same by using pr_err instead of dev_err as the variable 'dev'
is uninitialized at that stage.

Fixes: ce028702ddbc ("mailbox: pcc: Move bulk of PCCT parsing into pcc_mbox_probe")
Cc: Jassi Brar <jassisinghbrar@gmail.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
mailbox: imx: Fix an IS_ERR() vs NULL bug 2022-01-27T11:02:11+00:00 Dan Carpenter dan.carpenter@oracle.com 2021-11-24T14:51:26+00:00 3309cb57ae7110ee2bd04642ce3c08b3eb035817 [ Upstream commit 05d06f37196b2e3abeff2b98b785c8803865e646 ] The devm_kzalloc() function does not return error pointers, it returns NULL on failure. Fixes: 97961f78e8bc ("mailbox: imx: support i.MX8ULP S4 MU") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit 05d06f37196b2e3abeff2b98b785c8803865e646 ]

The devm_kzalloc() function does not return error pointers, it returns
NULL on failure.

Fixes: 97961f78e8bc ("mailbox: imx: support i.MX8ULP S4 MU")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
mailbox: fix gce_num of mt8192 driver data 2022-01-27T11:02:11+00:00 jason-jh.lin jason-jh.lin@mediatek.com 2021-12-23T14:51:55+00:00 1f27ec926fd66d2c937f351338d535d818388df5 [ Upstream commit 35ca43710f792ce183312fdc7e4b2bb0b721a173 ] Because mt8192 only have 1 gce, the gce_num should be 1. Fixes: 85dfdbfc13ea ("mailbox: cmdq: add multi-gce clocks support for mt8195") Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit 35ca43710f792ce183312fdc7e4b2bb0b721a173 ]

Because mt8192 only have 1 gce, the gce_num should be 1.

Fixes: 85dfdbfc13ea ("mailbox: cmdq: add multi-gce clocks support for mt8195")
Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
mailbox: imx: support i.MX8ULP S4 MU 2021-10-30T04:03:09+00:00 Peng Fan peng.fan@nxp.com 2021-10-22T10:18:56+00:00 97961f78e8bc7f50ff7113fec030af6fa5f004d0 Like i.MX8 SCU, i.MX8ULP S4 also has vendor specific protocol. - bind SCU/S4 MU part to share one tx/rx/init API to make code simple. - S4 msg max size is very large, so alloc the space at driver probe, not use local on stack variable. - S4 MU has 8 TR and 4 RR which is different with i.MX8 MU, so adapt code to reflect this. Tested on i.MX8MP, i.MX8ULP Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> 
Like i.MX8 SCU, i.MX8ULP S4 also has vendor specific protocol.
 - bind SCU/S4 MU part to share one tx/rx/init API to make code simple.
 - S4 msg max size is very large, so alloc the space at driver probe,
   not use local on stack variable.
 - S4 MU has 8 TR and 4 RR which is different with i.MX8 MU, so adapt
   code to reflect this.

   Tested on i.MX8MP, i.MX8ULP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
mailbox: pcc: Move bulk of PCCT parsing into pcc_mbox_probe 2021-10-30T03:46:38+00:00 Sudeep Holla sudeep.holla@arm.com 2021-09-17T13:33:56+00:00 ce028702ddbc69743d958f9e20ad0306e4a428fe Move the PCCT subspace parsing and allocation into pcc_mbox_probe so that we can get rid of global PCC channel and mailbox controller data. It also helps to make use of devm_* APIs for all the allocations. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> 
Move the PCCT subspace parsing and allocation into pcc_mbox_probe so
that we can get rid of global PCC channel and mailbox controller data.
It also helps to make use of devm_* APIs for all the allocations.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4) 2021-10-30T03:46:38+00:00 Sudeep Holla sudeep.holla@arm.com 2021-09-17T13:33:55+00:00 c45ded7e11352d7ba0bfe3cbf2625f96f94c7d92 With all the plumbing in place to avoid accessing PCCT type and other fields directly from the PCCT table all the time, let us now add the support for extended PCC subspaces(type 3 and 4). Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> 
With all the plumbing in place to avoid accessing PCCT type and other
fields directly from the PCCT table all the time, let us now add the
support for extended PCC subspaces(type 3 and 4).

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
mailbox: pcc: Drop handling invalid bit-width in {read,write}_register 2021-10-30T03:46:38+00:00 Sudeep Holla sudeep.holla@arm.com 2021-09-17T13:33:54+00:00 45ec2dafb1775f7d806fbd2387e3f2cc2f56142d pcc_chan_reg_init now checks if the register bit width is within the list [8, 16, 32, 64] and flags error if that is not the case. Therefore there is no need to handling invalid bit-width in both read_register and write_register. We can drop that along with the return values for these 2 functions. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> 
pcc_chan_reg_init now checks if the register bit width is within the
list [8, 16, 32, 64] and flags error if that is not the case. Therefore
there is no need to handling invalid bit-width in both read_register
and write_register. We can drop that along with the return values for
these 2 functions.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
mailbox: pcc: Avoid accessing PCCT table in pcc_send_data and pcc_mbox_irq 2021-10-30T03:46:38+00:00 Sudeep Holla sudeep.holla@arm.com 2021-09-17T13:33:53+00:00 bf18123e78f4d13fc0105b1ddb4b46c1665dd025 Now that the con_priv is availvale solely for PCC mailbox controller driver, let us use the same to save the channel specific information in it so that we can it whenever required instead of parsing the PCCT table entries every time in both pcc_send_data and pcc_mbox_irq. We can now use the newly introduces PCC register bundle to simplify both saving of channel specific information and accessing them without repeated checks for the subspace type. Reviewed-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> 
Now that the con_priv is availvale solely for PCC mailbox controller
driver, let us use the same to save the channel specific information
in it so that we can it whenever required instead of parsing the PCCT
table entries every time in both pcc_send_data and pcc_mbox_irq.

We can now use the newly introduces PCC register bundle to simplify both
saving of channel specific information and accessing them without repeated
checks for the subspace type.

Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>