linux-stable.git/drivers/mailbox, branch v5.15.78

mailbox: bcm-ferxrm-mailbox: Fix error check for dma_map_sg

2022-10-26T10:35:21+00:00

[ Upstream commit 6b207ce8a96a71e966831e3a13c38143ba9a73c1 ]

dma_map_sg return 0 on error, fix the error check, and return -EIO
to caller.

Fixes: dbc049eee730 ("mailbox: Add driver for Broadcom FlexRM ring manager")
Signed-off-by: Jack Wang 
Signed-off-by: Jassi Brar 
Signed-off-by: Sasha Levin

mailbox: mpfs: account for mbox offsets while sending

2022-10-26T10:35:21+00:00

[ Upstream commit 0d1aadfe10ba17ebdeb96abb9638eb0f623f9b55 ]

The mailbox offset is not only used for receiving messages, but it is
also used by messages sent to the system controller by Linux that have a
payload, such as the "digital signature service". It is also overloaded
by certain other services (reprogramming of the FPGA fabric, see Link:)
to have a meaning other than the offset the system controller should
read from.
When the driver was written, no such services of the latter type were
in use & those of the former used an offset of zero so this has gone
un-noticed.

Link: https://www.microsemi.com/document-portal/doc_download/1245815-polarfire-fpga-and-polarfire-soc-fpga-system-services-user-guide # Section 5.2
Fixes: 83d7b1560810 ("mbox: add polarfire soc system controller mailbox")
Signed-off-by: Conor Dooley 
Signed-off-by: Jassi Brar 
Signed-off-by: Sasha Levin

mailbox: mpfs: fix handling of the reg property

2022-10-26T10:35:21+00:00

[ Upstream commit 2e10289d1f304f5082a4dda55a677b72b3bdb581 ]

The "data" region of the PolarFire SoC's system controller mailbox is
not one continuous register space - the system controller's QSPI sits
between the control and data registers. Split the "data" reg into two
parts: "data" & "control". Optionally get the "data" register address
from the 3rd reg property in the devicetree & fall back to using the
old base + MAILBOX_REG_OFFSET that the current code uses.

Fixes: 83d7b1560810 ("mbox: add polarfire soc system controller mailbox")
Signed-off-by: Conor Dooley 
Signed-off-by: Jassi Brar 
Signed-off-by: Sasha Levin

mailbox: forward the hrtimer if not queued and under a lock

2022-06-09T08:23:12+00:00

[ Upstream commit bca1a1004615efe141fd78f360ecc48c60bc4ad5 ]

This reverts commit c7dacf5b0f32957b24ef29df1207dc2cd8307743,
"mailbox: avoid timer start from callback"

The previous commit was reverted since it lead to a race that
caused the hrtimer to not be started at all. The check for
hrtimer_active() in msg_submit() will return true if the
callback function txdone_hrtimer() is currently running. This
function could return HRTIMER_NORESTART and then the timer
will not be restarted, and also msg_submit() will not start
the timer. This will lead to a message actually being submitted
but no timer will start to check for its compleation.

The original fix that added checking hrtimer_active() was added to
avoid a warning with hrtimer_forward. Looking in the kernel
another solution to avoid this warning is to check hrtimer_is_queued()
before calling hrtimer_forward_now() instead. This however requires a
lock so the timer is not started by msg_submit() inbetween this check
and the hrtimer_forward() call.

Fixes: c7dacf5b0f32 ("mailbox: avoid timer start from callback")
Signed-off-by: Björn Ardö 
Signed-off-by: Jassi Brar 
Signed-off-by: Sasha Levin

mailbox: imx: fix wakeup failure from freeze mode

2022-04-08T12:24:10+00:00

commit 892cb524ae8a27bf5e42f711318371acd9a9f74a upstream.

Since IRQF_NO_SUSPEND used for imx mailbox driver, that means this irq
can't be used for wakeup source so that can't wakeup from freeze mode.
Add pm_system_wakeup() to wakeup from freeze mode.

Fixes: b7b2796b9b31e("mailbox: imx: ONLY IPC MU needs IRQF_NO_SUSPEND flag")
Reviewed-by: Jacky Bai 
Reviewed-by: Peng Fan 
Signed-off-by: Robin Gong 
Signed-off-by: Peng Fan 
Signed-off-by: Jassi Brar 
Signed-off-by: Greg Kroah-Hartman

mailbox: imx: fix crash in resume on i.mx8ulp

2022-04-08T12:23:48+00:00

[ Upstream commit 8219efd08a0aa1d7944bdb66d84ba57549258968 ]

check 'priv->clk' before 'imx_mu_read()' otherwise crash happens on
i.mx8ulp, since clock not enabled.

Fixes: 4f0b776ef5831 ("mailbox: imx-mailbox: support i.MX8ULP MU")
Reviewed-by: Jacky Bai 
Signed-off-by: Robin Gong 
Signed-off-by: Peng Fan 
Signed-off-by: Jassi Brar 
Signed-off-by: Sasha Levin

mailbox: tegra-hsp: Flush whole channel

2022-04-08T12:22:59+00:00

commit 60de2d2dc284e0dd1c2c897d08625bde24ef3454 upstream.

The txdone can re-fill the mailbox. Keep polling the mailbox during the
flush until all the messages have been delivered.

This fixes an issue with the Tegra Combined UART (TCU) where output can
get truncated under high traffic load.

Signed-off-by: Pekka Pessi 
Tested-by: Jon Hunter 
Fixes: 91b1b1c3da8a ("mailbox: tegra-hsp: Add support for shared mailboxes")
Cc: stable@vger.kernel.org
Signed-off-by: Thierry Reding 
Reviewed-by: Jon Hunter 
Signed-off-by: Jassi Brar 
Signed-off-by: Greg Kroah-Hartman

mailbox: change mailbox-mpfs compatible string

2022-01-27T10:05:05+00:00

[ Upstream commit f10b1fc0161cd99e54c5687fcc63368aa255e05e ]

The Polarfire SoC is currently using two different compatible string
prefixes. Fix this by changing "polarfire-soc-*" strings to "mpfs-*" in
its system controller in order to match the compatible string used in
the soc binding and device tree.

Signed-off-by: Conor Dooley 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Jassi Brar 
Signed-off-by: Sasha Levin

mailbox: fix gce_num of mt8192 driver data

2022-01-27T10:04:21+00:00

[ Upstream commit 35ca43710f792ce183312fdc7e4b2bb0b721a173 ]

Because mt8192 only have 1 gce, the gce_num should be 1.

Fixes: 85dfdbfc13ea ("mailbox: cmdq: add multi-gce clocks support for mt8195")
Signed-off-by: jason-jh.lin 
Reviewed-by: Matthias Brugger 
Signed-off-by: Jassi Brar 
Signed-off-by: Sasha Levin

mailbox: mtk-cmdq: Fix local clock ID usage

2021-11-18T18:16:35+00:00

[ Upstream commit 0a5ad4322927ee4aaba6facc0e4faf1ab6c0d48e ]

In the probe function, the clock IDs were pointed to local variables
which should only be used in the same code block, and any access to them
after the probing stage becomes an use-after-free case.

Since there are only limited variants of the gce clock names so far, we
can just declare them as static constants to fix the issue.

Fixes: 85dfdbfc13ea ("mailbox: cmdq: add multi-gce clocks support for mt8195")
Signed-off-by: Fei Shao 
Reviewed-by: Tzung-Bi Shih 
Signed-off-by: Jassi Brar 
Signed-off-by: Sasha Levin