linux-stable.git/drivers/iio, branch v5.19.2 Linux kernel stable tree iio: adc: max1027: unlock on error path in max1027_read_single_value() 2022-08-17T13:15:36+00:00 Dan Carpenter dan.carpenter@oracle.com 2022-07-07T14:54:45+00:00 b41b0bfdc98326e451b821f00393fa8d95576fac [ Upstream commit 06ee60eb507f00fb3643876ec05318c63332dc88 ] If max1027_wait_eoc() fails then call iio_device_release_direct_mode() before returning. Fixes: a0e831653ef9 ("iio: adc: max1027: Introduce an end of conversion helper") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/YsbztVuAXnau2cIZ@kili Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit 06ee60eb507f00fb3643876ec05318c63332dc88 ]

If max1027_wait_eoc() fails then call iio_device_release_direct_mode()
before returning.

Fixes: a0e831653ef9 ("iio: adc: max1027: Introduce an end of conversion helper")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/YsbztVuAXnau2cIZ@kili
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
iio: cros: Register FIFO callback after sensor is registered 2022-08-17T13:15:35+00:00 Gwendal Grignou gwendal@chromium.org 2022-07-11T14:47:16+00:00 64f5669fa7143f62890f2136af513c8286f5d9b7 [ Upstream commit 0b4ae3f6d1210c11f9baf159009c7227eacf90f2 ] Instead of registering callback to process sensor events right at initialization time, wait for the sensor to be register in the iio subsystem. Events can come at probe time (in case the kernel rebooted abruptly without switching the sensor off for instance), and be sent to IIO core before the sensor is fully registered. Fixes: aa984f1ba4a4 ("iio: cros_ec: Register to cros_ec_sensorhub when EC supports FIFO") Reported-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20220711144716.642617-1-gwendal@chromium.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit 0b4ae3f6d1210c11f9baf159009c7227eacf90f2 ]

Instead of registering callback to process sensor events right at
initialization time, wait for the sensor to be register in the iio
subsystem.

Events can come at probe time (in case the kernel rebooted abruptly
without switching the sensor off for  instance), and be sent to IIO core
before the sensor is fully registered.

Fixes: aa984f1ba4a4 ("iio: cros_ec: Register to cros_ec_sensorhub when EC supports FIFO")
Reported-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20220711144716.642617-1-gwendal@chromium.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
iio: temp: maxim_thermocouple: Fix alignment for DMA safety 2022-08-17T13:15:19+00:00 Jonathan Cameron Jonathan.Cameron@huawei.com 2022-05-08T17:57:12+00:00 4fe070b5d5af15301c970c525e908895822f7633 [ Upstream commit 10897f34309b3c7bc14698407436c82d11c07f47 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition Fixes: 1f25ca11d84a ("iio: temperature: add support for Maxim thermocouple chips") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Matt Ranostay <mranostay@gmail.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-93-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit 10897f34309b3c7bc14698407436c82d11c07f47 ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition

Fixes: 1f25ca11d84a ("iio: temperature: add support for Maxim thermocouple chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Matt Ranostay <mranostay@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-93-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
iio: temp: max31865: Fix alignment for DMA safety 2022-08-17T13:15:19+00:00 Jonathan Cameron Jonathan.Cameron@huawei.com 2022-05-08T17:57:11+00:00 4f7a71a85c8e39bcd0fee3ec1d109f40f05184bd [ Upstream commit ecdef5b8317cdf18acb46223e087f04a226fa619 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition Fixes: e112dc4e18ea ("iio: temperature: Add MAX31865 RTD Support") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Navin Sankar Velliangiri <navin@linumiz.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-92-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit ecdef5b8317cdf18acb46223e087f04a226fa619 ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition

Fixes: e112dc4e18ea ("iio: temperature: Add MAX31865 RTD Support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Navin Sankar Velliangiri <navin@linumiz.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-92-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
iio: temp: ltc2983: Fix alignment for DMA safety 2022-08-17T13:15:19+00:00 Jonathan Cameron Jonathan.Cameron@huawei.com 2022-05-08T17:57:10+00:00 114ffd465579162368a463b70390e36057af303d [ Upstream commit 732f2cb2fbb51bd5bc03a114bd102ab3b2f537fe ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: f110f3188e56 ("iio: temperature: Add support for LTC2983") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-91-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit 732f2cb2fbb51bd5bc03a114bd102ab3b2f537fe ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: f110f3188e56 ("iio: temperature: Add support for LTC2983")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-91-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
iio: resolver: ad2s90: Fix alignment for DMA safety 2022-08-17T13:15:19+00:00 Jonathan Cameron Jonathan.Cameron@huawei.com 2022-05-08T17:57:09+00:00 3af5ec85f49d86ba225fdf043a2675e2733e4735 [ Upstream commit faa05ecb1349070d874810e161b653c2220e0006 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes tag is probably not where the issue was first introduced, but is likely to be far beyond the point where anyone considers backporting this fix. Fixes: 58f08b0af857 ("staging:iio:resolver:ad2s90 general cleanup") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-90-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit faa05ecb1349070d874810e161b653c2220e0006 ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes tag is probably not where the issue was first introduced, but
is likely to be far beyond the point where anyone considers
backporting this fix.

Fixes: 58f08b0af857 ("staging:iio:resolver:ad2s90 general cleanup")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-90-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
iio: resolver: ad2s1200: Fix alignment for DMA safety 2022-08-17T13:15:19+00:00 Jonathan Cameron Jonathan.Cameron@huawei.com 2022-05-08T17:57:08+00:00 c00e752df981f442af8e1e87a6f3a5d630b7ecdd [ Upstream commit 37882314d3bdc2ae775ebb9fa8ed7a94cd1aad61 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes tag is probably not where the issue was first introduced, but is likely to be as far as anyone considers backporting this fix. Fixes: 0bd3d338f61b ("staging: iio: ad2s1200: Improve readability with be16_to_cpup") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-89-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit 37882314d3bdc2ae775ebb9fa8ed7a94cd1aad61 ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes tag is probably not where the issue was first introduced, but
is likely to be as far as anyone considers backporting this fix.

Fixes: 0bd3d338f61b ("staging: iio: ad2s1200: Improve readability with be16_to_cpup")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-89-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
iio: proximity: as3935: Fix alignment for DMA safety 2022-08-17T13:15:19+00:00 Jonathan Cameron Jonathan.Cameron@huawei.com 2022-05-08T17:57:06+00:00 59ee01f39242e76de27f935505f02122af97f386 [ Upstream commit 2386c0f8c5b740873a4b9126c3706601b127fe22 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 24ddb0e4bba4 ("iio: Add AS3935 lightning sensor support") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Matt Ranostay <mranostay@gmail.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-87-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit 2386c0f8c5b740873a4b9126c3706601b127fe22 ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 24ddb0e4bba4 ("iio: Add AS3935 lightning sensor support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Matt Ranostay <mranostay@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-87-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
iio: potentiometer: mcp4131: Fix alignment for DMA safety 2022-08-17T13:15:19+00:00 Jonathan Cameron Jonathan.Cameron@huawei.com 2022-05-08T17:57:04+00:00 5179a573724f9612beee56056c12c44a6874bab6 [ Upstream commit 4842e5de6f39ebf2c0f6da9e6a0cb751c7108507 ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 22d199a53910 ("iio: potentiometer: add driver for Microchip MCP413X/414X/415X/416X/423X/424X/425X/426X") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-85-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit 4842e5de6f39ebf2c0f6da9e6a0cb751c7108507 ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 22d199a53910 ("iio: potentiometer: add driver for Microchip MCP413X/414X/415X/416X/423X/424X/425X/426X")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-85-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
iio: potentiometer: mcp41010: Fix alignment for DMA safety 2022-08-17T13:15:18+00:00 Jonathan Cameron Jonathan.Cameron@huawei.com 2022-05-08T17:57:03+00:00 51143f66752745405c2fcb075808699421d7c0d4 [ Upstream commit c5f78f4d2168ba21324095b0d46d4353c2eace4d ] ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 092cb71a604e ("iio: potentiometer: Add driver for Microchip MCP41xxx/42xxx") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-84-jic23@kernel.org Signed-off-by: Sasha Levin <sashal@kernel.org> 
[ Upstream commit c5f78f4d2168ba21324095b0d46d4353c2eace4d ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 092cb71a604e ("iio: potentiometer: Add driver for Microchip MCP41xxx/42xxx")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-84-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>