linux-stable.git/drivers/gpu, branch v3.2.20

drm/i915:: Disable FBC on SandyBridge

2012-06-10T13:42:01+00:00

commit d56d8b28e9247e7e35e02fbb12b12239a2c33ad1 upstream.

Enabling FBC is causing the BLT ring to run between 10-100x slower than
normal and frequently lockup. The interim solution is disable FBC once
more until we know why.

Signed-off-by: Chris Wilson 
Signed-off-by: Keith Packard 
Signed-off-by: Ben Hutchings

drm/vmwgfx: Fix nasty write past alloced memory area

2012-06-10T13:41:55+00:00

commit 0824db38e515644f8d1bfd64adbd7cb2c6ea7c62 upstream.

Signed-off-by: Thomas Hellstrom 
Reviewed-by: Jakob Bornecrantz 
Signed-off-by: Dave Airlie 
Signed-off-by: Ben Hutchings

drm/ttm: Fix spinlock imbalance

2012-06-10T13:41:55+00:00

commit a8ff3ee211fccf708e1911bbc096625453ebf759 upstream.

This imbalance may cause hangs when TTM is trying to swap out a buffer
that is already on the delayed delete list.

Signed-off-by: Thomas Hellstrom 
Reviewed-by: Jakob Bornecrantz 
Signed-off-by: Dave Airlie 
Signed-off-by: Ben Hutchings

drm/radeon: fix HD6790, HD6570 backend programming

2012-06-10T13:41:54+00:00

commit 95c4b23ec4e2fa5604df229ddf134e31d7b3b378 upstream.

Without this bit sets we get broken rendering and
lockups.

fglrx sets this bit.

Bugs that should be fixed by this patch :
https://bugs.freedesktop.org/show_bug.cgi?id=49792
https://bugzilla.kernel.org/show_bug.cgi?id=43207
https://bugs.freedesktop.org/show_bug.cgi?id=39282

Signed-off-by: Jerome Glisse 
Acked-by: Alex Deucher 
Signed-off-by: Dave Airlie 
Signed-off-by: Ben Hutchings

drm/radeon: properly program gart on rv740, juniper, cypress, barts, hemlock

2012-06-10T13:41:54+00:00

commit 0b8c30bc4943137a4a36b9cb059b1cc684f5d702 upstream.

Need to program an additional VM register.  This doesn't not currently
cause any problems, but allows us to program the proper backend
map in a subsequent patch which should improve performance on these
asics.

Signed-off-by: Alex Deucher 
Signed-off-by: Dave Airlie 
Signed-off-by: Ben Hutchings

drm/radeon: fix bank information in tiling config

2012-06-10T13:41:53+00:00

commit 29d654067a98c1cb8874c774e5fd799a038af8a6 upstream.

While there are cards with more than 8 mem banks, the max
number of banks from a tiling perspective is 8, so cap
the tiling config at 8 banks.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=43448

Signed-off-by: Alex Deucher 
Signed-off-by: Dave Airlie 
[bwh: Backported to 3.2: fix up context and indentation for missing
 IGP condition in ni.c]
Signed-off-by: Ben Hutchings

drm/radeon: fix XFX quirk

2012-06-10T13:41:43+00:00

commit 1ebf169ad4dc68f18cc0dab35163b0f324fc6c41 upstream.

Only override the ddc bus if the connector doesn't have
a valid one.  The existing code overrode the ddc bus for
all connectors even if it had ddc bus.

Fixes ddc on another XFX card with the same pci ids that
was broken by the quirk overwriting the correct ddc bus.

Reported-by: Mehdi Aqadjani Memar 
Signed-off-by: Alex Deucher 
Signed-off-by: Dave Airlie 
Signed-off-by: Ben Hutchings

drm/i915: always use RPNSWREQ for turbo change requests

2012-06-10T13:41:38+00:00

commit 89ba829e38bd500f438bc08af4229204c8ed7f35 upstream.

Media turbo requests can either use RPVSWREQ or RPNSWREQ to indicate
what the interrupt handler should do.  Since we only deal with the
latter in our turbo code, make the media engine use that for turbo
requests.

Tested-by: Joe Bloggsian 
Signed-off-by: Jesse Barnes 
Reviewed-by: Eugeni Dodonov 
Signed-off-by: Daniel Vetter 
[bwh: Backported to 3.2: adjust filename]
Signed-off-by: Ben Hutchings

drm/i915: Update GEN6_RP_CONTROL definitions

2012-06-10T13:41:38+00:00

commit 6ed55ee7da15329476174bc5821dbc723f671f44 upstream.

This matches the modern specs more accurately.

This will be used by the following patch to fix the way we display RC
status.

Signed-off-by: Ben Widawsky 
Reviewed-by: Jesse Barnes 
Reviewed-by: Eugeni Dodonov 
Signed-off-by: Keith Packard 
Signed-off-by: Ben Hutchings

drm/i915: wait for a vblank to pass after tv detect

2012-06-10T13:41:37+00:00

commit bf2125e2f7e931b50a6c76ba0435ba001409ccbf upstream.

Otherwise the hw will get confused and result in a black screen.

This regression has been most likely introduce in

commit 974b93315b2213b74a42a87e8a9d4fc8c0dbe90c
Author: Chris Wilson 
Date:   Sun Sep 5 00:44:20 2010 +0100

    drm/i915/tv: Poll for DAC state change

That commit replace the first msleep(20) with a busy-loop, but failed
to keep the 2nd msleep around. Later on we've replaced all these
msleep(20) by proper vblanks.

For reference also see the commit in xf86-video-intel:

commit 1142be53eb8d2ee8a9b60ace5d49f0ba27332275
Author: Jesse Barnes 
Date:   Mon Jun 9 08:52:59 2008 -0700

    Fix TV programming:  add vblank wait after TV_CTL writes

    Fxies FDO bug #14000; we need to wait for vblank after
    writing TV_CTL or following "DPMS on" calls may not actually enable the output.

v2: As suggested by Chris Wilson, add a small comment to ensure that
no one accidentally removes this vblank wait again - there really
seems to be no sane explanation for why we need it, but it is
required.

Launchpad: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/763688
Reported-and-Tested-by: Robert Lowery 
Cc: Rodrigo Vivi 
Acked-by: Chris Wilson 
Signed-Off-by: Daniel Vetter 
Signed-off-by: Ben Hutchings