linux-stable.git/drivers/gpu/drm/xe, branch v6.9.7

drm/xe/vf: Don't touch GuC irq registers if using memory irqs

2024-06-27T11:52:25+00:00

[ Upstream commit d21d44dbdde83c4a8553c95de1853e63e88d7954 ]

On platforms where VFs are using memory based interrupts, we
missed invalid access to no longer existing interrupt registers,
as we keep them marked with XE_REG_OPTION_VF. To fix that just
either setup memirq vectors in GuC or enable legacy interrupts.

Fixes: aef4eb7c7dec ("drm/xe/vf: Setup memory based interrupts in GuC")
Signed-off-by: Michal Wajdeczko 
Cc: Matt Roper 
Reviewed-by: Matt Roper 
Link: https://patchwork.freedesktop.org/patch/msgid/20240617154736.685-1-michal.wajdeczko@intel.com
(cherry picked from commit f0ccd2d805e55e12b430d5d6b9acd9f891af455e)
Signed-off-by: Thomas Hellström 
Signed-off-by: Sasha Levin

drm/xe: Properly handle alloc_guc_id() failure

2024-06-21T12:40:36+00:00

commit 6c5cd0807c79eb4c0cda70b48f6be668a241d584 upstream.

Release the submission_state lock if alloc_guc_id() fails.

v2: Add Fixes tag and CC stable kernel

Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Cc:  # v6.8+
Signed-off-by: Niranjana Vishwanathapura 
Reviewed-by: Nirmoy Das 
Reviewed-by: Matthew Brost 
Signed-off-by: José Roberto de Souza 
Link: https://patchwork.freedesktop.org/patch/msgid/20240521201711.4934-1-niranjana.vishwanathapura@intel.com
(cherry picked from commit 40672b792a36894aff3a337b695f6136ee6ac5d4)
Signed-off-by: Thomas Hellström 
Signed-off-by: Greg Kroah-Hartman

drm/xe: move disable_c6 call

2024-06-21T12:40:25+00:00

[ Upstream commit 2470b141bfae2b9695b5b6823e3b978b22d33dde ]

disable c6 called in guc_pc_fini_hw is unreachable.

GuC PC init returns earlier if skip_guc_pc is true and never
registers the finish call thus making disable_c6 unreachable.

move this call to gt idle.

v2: rebase
v3: add fixes tag (Himal)

Fixes: 975e4a3795d4 ("drm/xe: Manually setup C6 when skip_guc_pc is set")
Signed-off-by: Riana Tauro 
Reviewed-by: Rodrigo Vivi 
Link: https://patchwork.freedesktop.org/patch/msgid/20240606100842.956072-3-riana.tauro@intel.com
Signed-off-by: Rodrigo Vivi 
(cherry picked from commit 6800e63cf97bae62bca56d8e691544540d945f53)
Signed-off-by: Thomas Hellström 
Signed-off-by: Sasha Levin

drm/xe: Remove mem_access from guc_pc calls

2024-06-21T12:40:25+00:00

[ Upstream commit 1e941c9881ec20f6d0173bcd344a605bb89cb121 ]

We are now protected by init, sysfs, or removal and don't
need these mem_access protections around GuC_PC anymore.

Reviewed-by: Matthew Auld 
Signed-off-by: Rodrigo Vivi 
Link: https://patchwork.freedesktop.org/patch/msgid/20240222163937.138342-6-rodrigo.vivi@intel.com
Stable-dep-of: 2470b141bfae ("drm/xe: move disable_c6 call")
Signed-off-by: Sasha Levin

drm/xe: flush engine buffers before signalling user fence on all engines

2024-06-21T12:40:25+00:00

[ Upstream commit b5e3a9b83f352a737b77a01734a6661d1130ed49 ]

Tests show that user fence signalling requires kind of write barrier,
otherwise not all writes performed by the workload will be available
to userspace. It is already done for render and compute, we need it
also for the rest: video, gsc, copy.

Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Signed-off-by: Andrzej Hajda 
Reviewed-by: Thomas Hellström 
Signed-off-by: Matthew Brost 
Link: https://patchwork.freedesktop.org/patch/msgid/20240605-fix_user_fence_posted-v3-2-06e7932f784a@intel.com
(cherry picked from commit 3ad7d18c5dad75ed38098c7cc3bc9594b4701399)
Signed-off-by: Thomas Hellström 
Signed-off-by: Sasha Levin

drm/xe/xe_gt_idle: use GT forcewake domain assertion

2024-06-21T12:40:25+00:00

[ Upstream commit 7c877115da4196fa108dcfefd49f5a9b67b8d8ca ]

The rc6 registers used in disable_c6 function belong
to the GT forcewake domain. Hence change the forcewake
assertion to check GT forcewake domain.

v2: add fixes tag (Himal)

Fixes: 975e4a3795d4 ("drm/xe: Manually setup C6 when skip_guc_pc is set")
Signed-off-by: Riana Tauro 
Reviewed-by: Rodrigo Vivi 
Reviewed-by: Himal Prasad Ghimiray 
Link: https://patchwork.freedesktop.org/patch/msgid/20240606100842.956072-2-riana.tauro@intel.com
Signed-off-by: Rodrigo Vivi 
(cherry picked from commit 21b708554648177a0078962c31629bce31ef5d83)
Signed-off-by: Thomas Hellström 
Signed-off-by: Sasha Levin

drm/xe/bb: assert width in xe_bb_create_job()

2024-06-16T11:50:55+00:00

commit 1008368e1c7e36bdec01b3cce1e76606dc3ad46f upstream.

The queue width will determine the number of batch buffer emitted into
the ring. In the case of xe_bb_create_job() we pass exactly one batch
address, therefore add an assert for the width to make sure we don't go
out of bounds. While here also convert to the helper to determine if the
queue is migration based.

Signed-off-by: Matthew Auld 
Cc: Nirmoy Das 
Reviewed-by: Nirmoy Das 
Link: https://patchwork.freedesktop.org/patch/msgid/20240320112730.219854-3-matthew.auld@intel.com
Signed-off-by: Greg Kroah-Hartman

drm/xe: Only use reserved BCS instances for usm migrate exec queue

2024-06-12T09:39:52+00:00

[ Upstream commit c8ea2c31f5ea437199b239d76ad5db27343edb0c ]

The GuC context scheduling queue is 2 entires deep, thus it is possible
for a migration job to be stuck behind a fault if migration exec queue
shares engines with user jobs. This can deadlock as the migrate exec
queue is required to service page faults. Avoid deadlock by only using
reserved BCS instances for usm migrate exec queue.

Fixes: a043fbab7af5 ("drm/xe/pvc: Use fast copy engines as migrate engine on PVC")
Cc: Matt Roper 
Cc: Niranjana Vishwanathapura 
Signed-off-by: Matthew Brost 
Link: https://patchwork.freedesktop.org/patch/msgid/20240415190453.696553-2-matthew.brost@intel.com
Reviewed-by: Brian Welty 
(cherry picked from commit 04f4a70a183a688a60fe3882d6e4236ea02cfc67)
Signed-off-by: Thomas Hellström 
Signed-off-by: Sasha Levin

drm/xe: Change pcode timeout to 50msec while polling again

2024-06-12T09:39:52+00:00

[ Upstream commit 77b79df0268bee3ef38fd5e76e86a076ce02995d ]

Polling is initially attempted with timeout_base_ms enabled for
preemption, and if it exceeds this timeframe, another attempt is made
without preemption, allowing an additional 50 ms before timing out.

v2
- Rebase

v3
- Move warnings to separate patch (Lucas)

Cc: Lucas De Marchi 
Cc: Rodrigo Vivi 
Signed-off-by: Himal Prasad Ghimiray 
Fixes: 7dc9b92dcfef ("drm/xe: Remove i915_utils dependency from xe_pcode.")
Reviewed-by: Lucas De Marchi 
Link: https://patchwork.freedesktop.org/patch/msgid/20240508152216.3263109-2-himal.prasad.ghimiray@intel.com
Signed-off-by: Rodrigo Vivi 
(cherry picked from commit c81858eb52266b3d6ba28ca4f62a198231a10cdc)
Signed-off-by: Thomas Hellström 
Signed-off-by: Sasha Levin

drm/xe: check pcode init status only on root gt of root tile

2024-06-12T09:39:52+00:00

[ Upstream commit 933fd5ffaf87a60a019992d48e3a96b5c3403d9f ]

The root tile indicates the pcode initialization is complete
when all tiles have completed their initialization.
So the mailbox can be polled only on the root tile.
Check pcode init status only on root tile and move it to
device probe early as root tile is initialized there.
Also make similar changes in resume paths.

v2: add lock/unlocked version of pcode_mailbox_rw
    to allow pcode init to be called in device
    early probe (Rodrigo)

v3: add code description about using root tile
    change function names to xe_pcode_probe_early
    and xe_pcode_init (Rodrigo)

Signed-off-by: Riana Tauro 
Reviewed-by: Rodrigo Vivi 
Reviewed-by: Himal Prasad Ghimiray 
Link: https://patchwork.freedesktop.org/patch/msgid/20240410085005.1126343-2-riana.tauro@intel.com
Signed-off-by: Rodrigo Vivi 
Stable-dep-of: 77b79df0268b ("drm/xe: Change pcode timeout to 50msec while polling again")
Signed-off-by: Sasha Levin