linux-stable.git/drivers/gpu/drm/tegra/dc.c, branch linux-3.16.y Linux kernel stable tree drm/tegra: add MODULE_DEVICE_TABLEs 2014-10-05T20:40:50+00:00 Stephen Warren swarren@nvidia.com 2014-06-18T22:21:55+00:00 873d1515bd276968acce4b6df43593d62cb2583d commit ef70728c7a6571a1a7115031e932b811f1740b2e upstream. When tegra-drm.ko is built as a module, these MODULE_DEVICE_TABLEs allow the module to be auto-loaded since the module will match the devices instantiated from device tree. (Notes for stable: in 3.14+, just git rm any conflicting file, since they are added in later kernels. For 3.13 and below, manual merging will be needed) Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
commit ef70728c7a6571a1a7115031e932b811f1740b2e upstream.

When tegra-drm.ko is built as a module, these MODULE_DEVICE_TABLEs allow
the module to be auto-loaded since the module will match the devices
instantiated from device tree.

(Notes for stable: in 3.14+, just git rm any conflicting file, since they
are added in later kernels. For 3.13 and below, manual merging will be
needed)

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drm/tegra: Add hardware cursor support 2014-06-05T21:14:47+00:00 Thierry Reding treding@nvidia.com 2013-12-20T12:58:33+00:00 e687651bc1ed96b0ad2ee9464f341c53563b5353 Enable hardware cursor support on Tegra124. Earlier generations support the hardware cursor to some degree as well, but not in a way that can be generically exposed. Signed-off-by: Thierry Reding <treding@nvidia.com> 
Enable hardware cursor support on Tegra124. Earlier generations support
the hardware cursor to some degree as well, but not in a way that can be
generically exposed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drm/tegra: Remove host1x drm_bus implementation 2014-06-05T21:14:46+00:00 Thierry Reding treding@nvidia.com 2014-05-22T07:57:15+00:00 9910f5c455de10f0eb2559093a7adad65f6c05cd The DRM core can now cope with drivers that don't have an associated struct drm_bus, so the host1x implementation is no longer useful. Signed-off-by: Thierry Reding <treding@nvidia.com> 
The DRM core can now cope with drivers that don't have an associated
struct drm_bus, so the host1x implementation is no longer useful.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drm/tegra: dc - Compute shift clock divider in output drivers 2014-06-05T21:09:33+00:00 Thierry Reding treding@nvidia.com 2014-03-26T12:32:21+00:00 91eded9b481e61913d98142927b559af33a180a7 The shift clock divider is highly dependent on the type of output, so push computation of it down into the output drivers. The old code used to work merely by accident. Signed-off-by: Thierry Reding <treding@nvidia.com> 
The shift clock divider is highly dependent on the type of output, so
push computation of it down into the output drivers. The old code used
to work merely by accident.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drm/tegra: dc - Move around shift clock programming 2014-06-05T21:09:32+00:00 Thierry Reding treding@nvidia.com 2014-03-26T11:32:14+00:00 dbb3f2f751069bc757fbdbe8911a7e784e850b24 Program the shift clock divider in tegra_crtc_setup_clk() since that's where the divider is computed, so passing it around can be avoided. Signed-off-by: Thierry Reding <treding@nvidia.com> 
Program the shift clock divider in tegra_crtc_setup_clk() since that's
where the divider is computed, so passing it around can be avoided.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drm/tegra: dc - Use proper H/V ref-to-sync values 2014-06-05T21:09:20+00:00 Thierry Reding treding@nvidia.com 2014-04-16T07:22:38+00:00 0444c0ff3cef9f99b19bbb1f0b3f5d7a22daab25 For HDMI compliance both of these values need to be set to 1. Signed-off-by: Thierry Reding <treding@nvidia.com> 
For HDMI compliance both of these values need to be set to 1.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drm/tegra: dc - Do not touch power control register 2014-06-05T21:09:19+00:00 Thierry Reding treding@nvidia.com 2014-04-16T07:52:31+00:00 501bcbd1b233edc160d0c770c03747a1c4aa14e5 Setting the bits in this register is dependent on the output type driven by the display controller. All output drivers already set these properly so there is no need to do it here again. Signed-off-by: Thierry Reding <treding@nvidia.com> 
Setting the bits in this register is dependent on the output type driven
by the display controller. All output drivers already set these properly
so there is no need to do it here again.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drm/tegra: dc - Reshuffle code to get rid of prototypes 2014-06-05T21:09:18+00:00 Thierry Reding treding@nvidia.com 2014-03-14T08:54:58+00:00 10288eea885bc32d2c856cd620aeeb83b5f3dd98 The tegra_dc_format() and tegra_dc_setup_window() functions are only used internally by the display controller driver. Move them upwards in order to make them static and get rid of the function prototypes. Signed-off-by: Thierry Reding <treding@nvidia.com> 
The tegra_dc_format() and tegra_dc_setup_window() functions are only
used internally by the display controller driver. Move them upwards in
order to make them static and get rid of the function prototypes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drm/tegra: dc - Rename INVERT_V to V_DIRECTION 2014-06-05T21:09:17+00:00 Thierry Reding treding@nvidia.com 2014-02-25T11:04:06+00:00 eba66501ac41b717d60bebc6f9ae0f3195c6c422 V_DIRECTION is the name of the field in the documentation, so use that for consistency. Also add the H_DIRECTION field for completeness. Signed-off-by: Thierry Reding <treding@nvidia.com> 
V_DIRECTION is the name of the field in the documentation, so use that
for consistency. Also add the H_DIRECTION field for completeness.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drm/tegra: dc - Add YUYV support 2014-06-05T21:09:16+00:00 Thierry Reding treding@nvidia.com 2014-01-29T19:31:17+00:00 f925390efccb24016a4fafe77721770021ed754a YUYV is UYVY with swapped bytes. Luckily the Tegra DC hardware can swap bytes during scan-out, so supporting YUYV is simply a matter of writing the correct value to the byteswap register. This patch modifies tegra_dc_format() to return the byte swap parameter via an output parameter in addition to returning the pixel format. Many other formats can potentially be supported in a similar way. Signed-off-by: Thierry Reding <treding@nvidia.com> 
YUYV is UYVY with swapped bytes. Luckily the Tegra DC hardware can swap
bytes during scan-out, so supporting YUYV is simply a matter of writing
the correct value to the byteswap register.

This patch modifies tegra_dc_format() to return the byte swap parameter
via an output parameter in addition to returning the pixel format. Many
other formats can potentially be supported in a similar way.

Signed-off-by: Thierry Reding <treding@nvidia.com>