linux-stable.git/drivers/gpu/drm/radeon, branch v3.5 Linux kernel stable tree drm/radeon: fix rare segfault 2012-07-03T10:17:09+00:00 Jerome Glisse jglisse@redhat.com 2012-07-02T16:40:54+00:00 1ef5325b238676c7a16bcd374250b07e77682736 In gem idle/busy ioctl the radeon object was derefenced after drm_gem_object_unreference_unlocked which in case the object have been destroyed lead to use of a possibly free pointer with possibly wrong data. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> 
In gem idle/busy ioctl the radeon object was derefenced after
drm_gem_object_unreference_unlocked which in case the object
have been destroyed lead to use of a possibly free pointer with
possibly wrong data.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/radeon: fix VM page table setup on SI 2012-06-29T14:13:07+00:00 Alex Deucher alexander.deucher@amd.com 2012-06-28T21:53:07+00:00 c21b328ea8c7c71cd2daf50557db440bbaa7ef55 Cayman and trinity allow for variable sized VM page tables, but SI requires that all page tables be the same size. The current code assumes variablely sized VM page tables so SI may end up with part of each page table overlapping with other memory which could end up being interpreted by the VM hw as garbage. Change the code to better accomodate SI. Allocate enough space for at least 2 full page tables and always set last_pfn to max_pfn on SI so each VM is backed by a full page table. This limits us to only 2 VMs active at any given time on SI. This will be rectified and the code can be reunified once we move to two level page tables. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com> 
Cayman and trinity allow for variable sized VM page
tables, but SI requires that all page tables be the
same size.  The current code assumes variablely sized
VM page tables so SI may end up with part of each page
table overlapping with other memory which could end
up being interpreted by the VM hw as garbage.

Change the code to better accomodate SI.  Allocate enough
space for at least 2 full page tables and always set
last_pfn to max_pfn on SI so each VM is backed by a full
page table.  This limits us to only 2 VMs active at any
given time on SI.  This will be rectified and the code can
be reunified once we move to two level page tables.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/radeon: SI tiling fixes for display 2012-06-20T18:55:56+00:00 Alex Deucher alexander.deucher@amd.com 2012-06-14T19:58:25+00:00 b7019b2f31fe7bec9f6f5dc1bf54cb0e0d73e047 - Use the correct union for getting the tiling info - Properly init the PIPE_CONFIG field for SI Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> 
- Use the correct union for getting the tiling info
- Properly init the PIPE_CONFIG field for SI

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/radeon: add support for STRMOUT_BASE_UPDATE on 7xx 2012-06-16T13:30:56+00:00 Alex Deucher alexander.deucher@amd.com 2012-06-14T20:06:37+00:00 7c77bf2a1a8bf67d580a3b189b37fded0a13ab78 Required for streamout. Bump drm minor. Marek v2: fix pkt->count check Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com> 
Required for streamout.  Bump drm minor.

Marek v2: fix pkt->count check

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/radeon: add some additional 6xx/7xx/EG register init 2012-06-16T13:30:47+00:00 Alex Deucher alexander.deucher@amd.com 2012-06-14T20:06:36+00:00 b866d1334ba2d544bc575d75357dea6bdcdc7f46 - SMX_SAR_CTL0 needs to be programmed correctly to prevent problems with memory exports in certain cases. - VC_ENHANCE needs to be initialized on 6xx/7xx. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com> 
- SMX_SAR_CTL0 needs to be programmed correctly to prevent
problems with memory exports in certain cases.
- VC_ENHANCE needs to be initialized on 6xx/7xx.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/radeon: enable HDMI on DCE5 (AKA NI excluding Aruba) 2012-06-16T10:21:19+00:00 Rafał Miłecki zajec5@gmail.com 2012-06-11T10:34:01+00:00 6b53a0507b6e728c53f2fc60912a8511f151e5d8 After recent changes HDMI code is ready to be enabled on DCE5. This patch just changes conditions to execute already present code on DCE5. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Christian König <christian.koenig@amd.com> Tested-by: Andre Heider <a.heider@gmail.com> Tested-by: Zoltán Böszörményi <zboszor@pr.hu> Signed-off-by: Dave Airlie <airlied@redhat.com> 
After recent changes HDMI code is ready to be enabled on DCE5. This
patch just changes conditions to execute already present code on DCE5.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Christian König <christian.koenig@amd.com>
Tested-by: Andre Heider <a.heider@gmail.com>
Tested-by: Zoltán Böszörményi <zboszor@pr.hu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/radeon/prime: reserve/unreserve around pin 2012-06-16T10:14:05+00:00 Dave Airlie airlied@redhat.com 2012-06-12T15:10:39+00:00 489797d510dfbce15120492d7ef6f956928b99f2 I finally got to test this code a bit more and hit the ttm no reserved assert, so add the reservations around the pinning. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> 
I finally got to test this code a bit more and hit the ttm
no reserved assert, so add the reservations around the pinning.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/radeon: fix regression in dynpm due to multi-ring rework 2012-06-16T10:12:13+00:00 Alex Deucher alexander.deucher@amd.com 2012-06-14T19:54:57+00:00 0ec0612a80f957000999c3f7b31a84e3558c719d Not all asics have all rings, so make sure the ring is ready before attempting to check it in the dynpm work handler. Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=43367 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> 
Not all asics have all rings, so make sure the ring is ready
before attempting to check it in the dynpm work handler.

Fixes:
https://bugzilla.kernel.org/show_bug.cgi?id=43367

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/radeon: fix tiling and command stream checking on evergreen v3 2012-06-10T16:41:46+00:00 Jerome Glisse jglisse@redhat.com 2012-06-09T14:57:41+00:00 d26098759cf6d32148649c165f87a7590bc25b89 Fix regresson since the introduction of command stream checking on evergreen (thread referenced below). Issue is cause by ddx allocating bo with formula width*height*bpp while programming the GPU command stream with ALIGN(height, 8). In some case (where page alignment does not hide the extra size bo should be according to height alignment) the kernel will reject the command stream. This patch reprogram the command stream to slice - 1 (slice is a derivative value from height) which avoid rejecting the command stream while keeping the value of command stream checking from a security point of view. This patch also fix wrong computation of layer size for 2D tiled surface. Which should fix issue when 2D color tiling is enabled. This dump the radeon KMS_DRIVER_MINOR so userspace can know if they are on a fixed kernel or not. https://lkml.org/lkml/2012/6/3/80 https://bugs.freedesktop.org/show_bug.cgi?id=50892 https://bugs.freedesktop.org/show_bug.cgi?id=50857 !!! STABLE need a custom version of this patch for 3.4 !!! v2: actually bump the minor version and add comment about stable v3: do compute the height the ddx was trying to use [airlied: drop left over debug] Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> 
Fix regresson since the introduction of command stream checking on
evergreen (thread referenced below). Issue is cause by ddx allocating
bo with formula width*height*bpp while programming the GPU command
stream with ALIGN(height, 8). In some case (where page alignment does
not hide the extra size bo should be according to height alignment)
the kernel will reject the command stream.

This patch reprogram the command stream to slice - 1 (slice is
a derivative value from height) which avoid rejecting the command
stream while keeping the value of command stream checking from a
security point of view.

This patch also fix wrong computation of layer size for 2D tiled
surface. Which should fix issue when 2D color tiling is enabled.
This dump the radeon KMS_DRIVER_MINOR so userspace can know if
they are on a fixed kernel or not.

https://lkml.org/lkml/2012/6/3/80
https://bugs.freedesktop.org/show_bug.cgi?id=50892
https://bugs.freedesktop.org/show_bug.cgi?id=50857

!!! STABLE need a custom version of this patch for 3.4 !!!

v2: actually bump the minor version and add comment about stable
v3: do compute the height the ddx was trying to use

[airlied: drop left over debug]

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/radeon/kms: add new Trinity PCI ids 2012-06-05T14:11:09+00:00 Alex Deucher alexander.deucher@amd.com 2012-06-05T13:50:28+00:00 d430f7dbf7bd6aaaa40c0660b3204df8cf07b22b Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com> 
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>