linux-stable.git/drivers/gpu/drm/msm, branch v5.4.99

drm/msm: Call msm_init_vram before binding the gpu

2021-01-19T17:26:16+00:00

[ Upstream commit d863f0c7b536288e2bd40cbc01c10465dd226b11 ]

vram.size is needed when binding a gpu without an iommu and is defined
in msm_init_vram(), so run that before binding it.

Signed-off-by: Craig Tatlor 
Reviewed-by: Brian Masney 
Tested-by: Alexey Minnekhanov 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin

drm/msm/dsi_pll_10nm: restore VCO rate during restore_state

2020-12-30T10:51:04+00:00

[ Upstream commit a4ccc37693a271330a46208afbeaed939d54fdbb ]

PHY disable/enable resets PLL registers to default values. Thus in
addition to restoring several registers we also need to restore VCO rate
settings.

Signed-off-by: Dmitry Baryshkov 
Fixes: c6659785dfb3 ("drm/msm/dsi/pll: call vco set rate explicitly")
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin

drm/msm/a6xx: fix a potential overflow issue

2020-10-29T08:58:06+00:00

[ Upstream commit 08d3ab4b46339bc6f97e83b54a3fb4f8bf8f4cd9 ]

It's allocating an array of a6xx_gpu_state_obj structure rathor than
its pointers.

This patch fix it.

Signed-off-by: Zhenzhong Duan 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin

drm/msm: Avoid div-by-zero in dpu_crtc_atomic_check()

2020-10-29T08:57:39+00:00

[ Upstream commit 22f760941844dbcee6ee446e1896532f6dff01ef ]

The cstate->num_mixers member is only set to a non-zero value once
dpu_encoder_virt_mode_set() is called, but the atomic check function can
be called by userspace before that. Let's avoid the div-by-zero here and
inside _dpu_crtc_setup_lm_bounds() by skipping this part of the atomic
check if dpu_encoder_virt_mode_set() hasn't been called yet. This fixes
an UBSAN warning:

 UBSAN: Undefined behaviour in drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c:860:31
 division by zero
 CPU: 7 PID: 409 Comm: frecon Tainted: G S                5.4.31 #128
 Hardware name: Google Trogdor (rev0) (DT)
 Call trace:
  dump_backtrace+0x0/0x14c
  show_stack+0x20/0x2c
  dump_stack+0xa0/0xd8
  __ubsan_handle_divrem_overflow+0xec/0x110
  dpu_crtc_atomic_check+0x97c/0x9d4
  drm_atomic_helper_check_planes+0x160/0x1c8
  drm_atomic_helper_check+0x54/0xbc
  drm_atomic_check_only+0x6a8/0x880
  drm_atomic_commit+0x20/0x5c
  drm_atomic_helper_set_config+0x98/0xa0
  drm_mode_setcrtc+0x308/0x5dc
  drm_ioctl_kernel+0x9c/0x114
  drm_ioctl+0x2ac/0x4b0
  drm_compat_ioctl+0xe8/0x13c
  __arm64_compat_sys_ioctl+0x184/0x324
  el0_svc_common+0xa4/0x154
  el0_svc_compat_handler+0x

Cc: Abhinav Kumar 
Cc: Jeykumar Sankaran 
Cc: Jordan Crouse 
Cc: Sean Paul 
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Stephen Boyd 
Reviewed-by: Abhinav Kumar 
Tested-by: Sai Prakash Ranjan 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin

drm/msm/a5xx: Always set an OPP supported hardware value

2020-10-01T11:17:44+00:00

[ Upstream commit 0478b4fc5f37f4d494245fe7bcce3f531cf380e9 ]

If the opp table specifies opp-supported-hw as a property but the driver
has not set a supported hardware value the OPP subsystem will reject
all the table entries.

Set a "default" value that will match the default table entries but not
conflict with any possible real bin values. Also fix a small memory leak
and free the buffer allocated by nvmem_cell_read().

Signed-off-by: Jordan Crouse 
Reviewed-by: Eric Anholt 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin

drm/msm: fix leaks if initialization fails

2020-10-01T11:17:44+00:00

[ Upstream commit 66be340f827554cb1c8a1ed7dea97920b4085af2 ]

We should free resources in unlikely case of allocation failure.

Signed-off-by: Pavel Machek 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin

drm/msm: Disable the RPTR shadow

2020-09-17T11:47:56+00:00

[ Upstream commit f6828e0c4045f03f9cf2df6c2a768102641183f4 ]

Disable the RPTR shadow across all targets. It will be selectively
re-enabled later for targets that need it.

Cc: stable@vger.kernel.org
Signed-off-by: Jordan Crouse 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin

drm/msm/gpu: make ringbuffer readonly

2020-09-17T11:47:56+00:00

[ Upstream commit 352c83fb39cae3eff95a8e1ed23006291abb6196 ]

The GPU has no business writing into the ringbuffer, let's make it
readonly to the GPU.

Fixes: 7198e6b03155 ("drm/msm: add a3xx gpu support")
Signed-off-by: Rob Clark 
Reviewed-by: Jordan Crouse 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin

drm/msm: Disable preemption on all 5xx targets

2020-09-17T11:47:53+00:00

commit 7b3f3948c8b7053d771acc9f79810cc410f5e2e0 upstream.

Temporarily disable preemption on a5xx targets pending some improvements
to protect the RPTR shadow from being corrupted.

Cc: stable@vger.kernel.org
Signed-off-by: Jordan Crouse 
Signed-off-by: Rob Clark 
Signed-off-by: Greg Kroah-Hartman

drm/msm/a6xx: fix gmu start on newer firmware

2020-09-09T17:12:21+00:00

[ Upstream commit f5749d6181fa7df5ae741788e5d96f593d3a60b6 ]

New Qualcomm firmware has changed a way it reports back the 'started'
event. Support new register values.

Signed-off-by: Dmitry Baryshkov 
Signed-off-by: Rob Clark 
Signed-off-by: Sasha Levin