<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-stable.git/drivers/gpu/drm/msm/msm_gpu.c, branch linux-4.3.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/'/>
<entry>
<title>drm/msm: restart queued submits after hang</title>
<updated>2015-06-11T17:11:06+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2015-06-07T17:46:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=1a370be9ac51129e40b0ed7fa71d2b2b92bc47e5'/>
<id>1a370be9ac51129e40b0ed7fa71d2b2b92bc47e5</id>
<content type='text'>
Track the list of in-flight submits.  If the gpu hangs, retire up to an
including the offending submit, and then re-submit the remainder.  This
way, for concurrently running piglit tests (for example), one failing
test doesn't cause unrelated tests to fail simply because it's submit
was queued up after one that triggered a hang.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Track the list of in-flight submits.  If the gpu hangs, retire up to an
including the offending submit, and then re-submit the remainder.  This
way, for concurrently running piglit tests (for example), one failing
test doesn't cause unrelated tests to fail simply because it's submit
was queued up after one that triggered a hang.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/msm: adreno a306 support</title>
<updated>2015-06-11T17:11:01+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2015-05-06T17:14:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=de558cd2ae2e9999d0b6328c22c398ff85b6327c'/>
<id>de558cd2ae2e9999d0b6328c22c398ff85b6327c</id>
<content type='text'>
As found in apq8016 (used in DragonBoard 410c) and msm8916.

Note that numerically a306 is actually 307 (since a305c already claimed
306).  Nice and confusing.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As found in apq8016 (used in DragonBoard 410c) and msm8916.

Note that numerically a306 is actually 307 (since a305c already claimed
306).  Nice and confusing.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/msm: clarify downstream bus scaling</title>
<updated>2015-06-11T17:11:01+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2015-06-04T14:26:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=6490ad47404539b479ca33f96793c4624bef2924'/>
<id>6490ad47404539b479ca33f96793c4624bef2924</id>
<content type='text'>
A few spots in the driver have support for downstream android
CONFIG_MSM_BUS_SCALING.  This is mainly to simplify backporting the
driver for various devices which do not have sufficient upstream
kernel support.  But the intentionally dead code seems to cause
some confusion.  Rename the #define to make this more clear.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
A few spots in the driver have support for downstream android
CONFIG_MSM_BUS_SCALING.  This is mainly to simplify backporting the
driver for various devices which do not have sufficient upstream
kernel support.  But the intentionally dead code seems to cause
some confusion.  Rename the #define to make this more clear.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/msm: fix potential deadlock in gpu init</title>
<updated>2014-08-04T15:55:29+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2014-07-11T15:59:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a1ad35233345e7ddd9ea3ea7b841432f4723d743'/>
<id>a1ad35233345e7ddd9ea3ea7b841432f4723d743</id>
<content type='text'>
Somewhere along the way, the firmware loader sprouted another lock
dependency, resulting in possible deadlock scenario:

 &amp;dev-&gt;struct_mutex --&gt; &amp;sb-&gt;s_type-&gt;i_mutex_key#2 --&gt; &amp;mm-&gt;mmap_sem

which is problematic vs things like gem mmap.

So introduce a separate mutex to synchronize gpu init.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Somewhere along the way, the firmware loader sprouted another lock
dependency, resulting in possible deadlock scenario:

 &amp;dev-&gt;struct_mutex --&gt; &amp;sb-&gt;s_type-&gt;i_mutex_key#2 --&gt; &amp;mm-&gt;mmap_sem

which is problematic vs things like gem mmap.

So introduce a separate mutex to synchronize gpu init.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/msm: use upstream iommu</title>
<updated>2014-08-04T15:55:29+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2014-07-10T02:08:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=944fc36c31ed685cf8d3d125eb681ae7198f06fc'/>
<id>944fc36c31ed685cf8d3d125eb681ae7198f06fc</id>
<content type='text'>
Downstream kernel IOMMU had a non-standard way of dealing with multiple
devices and multiple ports/contexts.  We don't need that on upstream
kernel, so rip out the crazy.

Note that we have to move the pinning of the ringbuffer to after the
IOMMU is attached.  No idea how that managed to work properly on the
downstream kernel.

For now, I am leaving the IOMMU port name stuff in place, to simplify
things for folks trying to backport latest drm/msm to device kernels.
Once we no longer have to care about pre-DT kernels, we can drop this
and instead backport upstream IOMMU driver.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Downstream kernel IOMMU had a non-standard way of dealing with multiple
devices and multiple ports/contexts.  We don't need that on upstream
kernel, so rip out the crazy.

Note that we have to move the pinning of the ringbuffer to after the
IOMMU is attached.  No idea how that managed to work properly on the
downstream kernel.

For now, I am leaving the IOMMU port name stuff in place, to simplify
things for folks trying to backport latest drm/msm to device kernels.
Once we no longer have to care about pre-DT kernels, we can drop this
and instead backport upstream IOMMU driver.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/msm: add perf logging debugfs</title>
<updated>2014-06-02T11:36:21+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2014-05-30T18:49:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=70c70f091b1ffd16b3e1a439bd595f7d539b1d5d'/>
<id>70c70f091b1ffd16b3e1a439bd595f7d539b1d5d</id>
<content type='text'>
Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/msm: add rd logging debugfs</title>
<updated>2014-06-02T11:36:11+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2014-05-30T18:47:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=a7d3c9509b2fecf8e593f3c933ab302cbe987d2e'/>
<id>a7d3c9509b2fecf8e593f3c933ab302cbe987d2e</id>
<content type='text'>
To ease debugging, add debugfs file which can be cat/tail'd to log
submits, along with fence #.  If GPU hangs, you can look at 'gpu'
debugfs file to find last completed fence and current register state,
and compare with logged rd file to narrow down the DRAW_INDX which
triggered the GPU hang.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To ease debugging, add debugfs file which can be cat/tail'd to log
submits, along with fence #.  If GPU hangs, you can look at 'gpu'
debugfs file to find last completed fence and current register state,
and compare with logged rd file to narrow down the DRAW_INDX which
triggered the GPU hang.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/msm: crank down gpu when inactive</title>
<updated>2014-03-31T14:27:46+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2014-01-11T21:25:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=37d77c3ab589bf8e3160a33b651fe6dd7439ba48'/>
<id>37d77c3ab589bf8e3160a33b651fe6dd7439ba48</id>
<content type='text'>
Shut down the clks when the gpu has nothing to do.  A short inactivity
timer is used to provide a low pass filter for power transitions.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Shut down the clks when the gpu has nothing to do.  A short inactivity
timer is used to provide a low pass filter for power transitions.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/msm: bigger synchronization hammer</title>
<updated>2014-02-07T15:26:25+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2014-02-07T00:19:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=c2703b13a63da335053a2f3cb560bb806bdda0ae'/>
<id>c2703b13a63da335053a2f3cb560bb806bdda0ae</id>
<content type='text'>
Because we use a list_head in the bo to track it's position in a submit,
we need to serialize at a higher layer.  Otherwise there are problems
when multiple contexts are SUBMIT'ing in parallel cmdstreams referencing
a shared bo.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Because we use a list_head in the bo to track it's position in a submit,
we need to serialize at a higher layer.  Otherwise there are problems
when multiple contexts are SUBMIT'ing in parallel cmdstreams referencing
a shared bo.

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/msm: add support for non-IOMMU systems</title>
<updated>2014-01-09T19:38:58+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2013-11-16T17:56:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux-stable.git/commit/?id=871d812aa43e6350a4edf41bf7cb0879675255f1'/>
<id>871d812aa43e6350a4edf41bf7cb0879675255f1</id>
<content type='text'>
Add a VRAM carveout that is used for systems which do not have an IOMMU.

The VRAM carveout uses CMA.  The arch code must setup a CMA pool for the
device (preferrably in highmem.. a 256m-512m VRAM pool in lowmem is not
cool).  The user can configure the VRAM pool size using msm.vram module
param.

Technically, the abstraction of IOMMU behind msm_mmu is not strictly
needed, but it simplifies the GEM code a bit, and will be useful later
when I add support for a2xx devices with GPUMMU, so I decided to keep
this part.

It appears to be possible to configure the GPU to restrict access to
addresses within the VRAM pool, but this is not done yet.  So for now
the GPU will refuse to load if there is no sort of mmu.  Once address
based limits are supported and tested to confirm that we aren't giving
the GPU access to arbitrary memory, this restriction can be lifted

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a VRAM carveout that is used for systems which do not have an IOMMU.

The VRAM carveout uses CMA.  The arch code must setup a CMA pool for the
device (preferrably in highmem.. a 256m-512m VRAM pool in lowmem is not
cool).  The user can configure the VRAM pool size using msm.vram module
param.

Technically, the abstraction of IOMMU behind msm_mmu is not strictly
needed, but it simplifies the GEM code a bit, and will be useful later
when I add support for a2xx devices with GPUMMU, so I decided to keep
this part.

It appears to be possible to configure the GPU to restrict access to
addresses within the VRAM pool, but this is not done yet.  So for now
the GPU will refuse to load if there is no sort of mmu.  Once address
based limits are supported and tested to confirm that we aren't giving
the GPU access to arbitrary memory, this restriction can be lifted

Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
