linux-stable.git/drivers/gpu/drm/mgag200, branch linux-5.10.y

drm/mgag200: Set DDC timeout in milliseconds

2024-08-19T03:41:20+00:00

commit ecde5db1598aecab54cc392282c15114f526f05f upstream.

Compute the i2c timeout in jiffies from a value in milliseconds. The
original values of 2 jiffies equals 2 milliseconds if HZ has been
configured to a value of 1000. This corresponds to 2.2 milliseconds
used by most other DRM drivers. Update mgag200 accordingly.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Jocelyn Falempe 
Fixes: 414c45310625 ("mgag200: initial g200se driver (v2)")
Cc: Dave Airlie 
Cc: Maarten Lankhorst 
Cc: Maxime Ripard 
Cc: Thomas Zimmermann 
Cc: Jocelyn Falempe 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v3.5+
Link: https://patchwork.freedesktop.org/patch/msgid/20240513125620.6337-2-tzimmermann@suse.de
Signed-off-by: Greg Kroah-Hartman

mgag200 fix memmapsl configuration in GCTL6 register

2022-04-08T12:39:56+00:00

commit 028a73e10705af1ffd51f2537460f616dc58680e upstream.

On some servers with MGA G200_SE_A (rev 42), booting with Legacy BIOS,
the hardware hangs when using kdump and kexec into the kdump kernel.
This happens when the uncompress code tries to write "Decompressing Linux"
to the VGA Console.

It can be reproduced by writing to the VGA console (0xB8000) after
booting to graphic mode, it generates the following error:

kernel:NMI: PCI system error (SERR) for reason a0 on CPU 0.
kernel:Dazed and confused, but trying to continue

The root cause is the configuration of the MGA GCTL6 register

According to the GCTL6 register documentation:

bit 0 is gcgrmode:
    0: Enables alpha mode, and the character generator addressing system is
     activated.
    1: Enables graphics mode, and the character addressing system is not
     used.

bit 1 is chainodd even:
    0: The A0 signal of the memory address bus is used during system memory
     addressing.
    1: Allows A0 to be replaced by either the A16 signal of the system
     address (ifmemmapsl is ‘00’), or by the hpgoddev (MISC<5>, odd/even
     page select) field, described on page 3-294).

bit 3-2 are memmapsl:
    Memory map select bits 1 and 0. VGA.
    These bits select where the video memory is mapped, as shown below:
        00 => A0000h - BFFFFh
        01 => A0000h - AFFFFh
        10 => B0000h - B7FFFh
        11 => B8000h - BFFFFh

bit 7-4 are reserved.

Current code set it to 0x05 => memmapsl to b01 => 0xa0000 (graphic mode)
But on x86, the VGA console is at 0xb8000 (text mode)
In arch/x86/boot/compressed/misc.c debug strings are written to 0xb8000
As the driver doesn't use this mapping at 0xa0000, it is safe to set it to
0xb8000 instead, to avoid kernel hang on G200_SE_A rev42, with kexec/kdump.

Thus changing the value 0x05 to 0x0d

Signed-off-by: Jocelyn Falempe 
Reviewed-by: Javier Martinez Canillas 
Acked-by: Lyude Paul 
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Zimmermann 
Link: https://patchwork.freedesktop.org/patch/msgid/20220119102905.1194787-1-jfalempe@redhat.com
Signed-off-by: Greg Kroah-Hartman

drm/mgag200: Select clock in PLL update functions

2021-09-18T11:40:37+00:00

commit 147696720eca12ae48d020726208b9a61cdd80bc upstream.

Put the clock-selection code into each of the PLL-update functions to
make them select the correct pixel clock. Instead of copying the code,
introduce a new helper WREG_MISC_MASKED, which does masked writes into
. Use it from each individual PLL update function.

The pixel clock for video output was not actually set before programming
the clock's values. It worked because the device had the correct clock
pre-set.

v2:
	* don't duplicate  update code (Sam)

Signed-off-by: Thomas Zimmermann 
Fixes: db05f8d3dc87 ("drm/mgag200: Split MISC register update into PLL selection, SYNC and I/O")
Acked-by: Sam Ravnborg 
Cc: Sam Ravnborg 
Cc: Emil Velikov 
Cc: Dave Airlie 
Cc: dri-devel@lists.freedesktop.org
Cc:  # v5.9+
Link: https://patchwork.freedesktop.org/patch/msgid/20210714142240.21979-2-tzimmermann@suse.de
Signed-off-by: Greg Kroah-Hartman

drm/mgag200: fix spelling mistake "expeced" -> "expected"

2020-08-27T09:17:52+00:00

There is a spelling mistake in a drm_warn message. Fix it.

Signed-off-by: Colin Ian King 
Signed-off-by: Thomas Zimmermann 
Link: https://patchwork.freedesktop.org/patch/msgid/20200826084727.42703-1-colin.king@canonical.com

drm/mgag200: fix build on alpha arch

2020-08-07T20:52:48+00:00

When building imgag200 for the alpha architecture it fails like this:
mgag200_drv.c:233:9: error: implicit declaration of function ‘vmalloc’
  233 |  bios = vmalloc(size);
      |         ^~~~~~~
      |         kmalloc

When building for other architectures vmalloc.h is pulled in via some
other header file - for example asm-generic/io.h.
Use an explicit include of vmalloc.h to fix the build.

Signed-off-by: Sam Ravnborg 
Reviewed-by: Daniel Vetter 
Fixes: e20dfd27f7aa ("drm/mgag200: Add support for G200 desktop cards")
Cc: Thomas Zimmermann 
Cc: Egbert Eich 
Cc: Takashi Iwai 
Cc: Lyude Paul 
Link: https://patchwork.freedesktop.org/patch/msgid/20200807180547.GA923146@ravnborg.org

drm/mgag200: Set PCI option register in G200SE models

2020-08-05T06:07:35+00:00

The initial value of the PCI option register got lost while refactoring
the driver init code. Restore the setting.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Dave Airlie 
Reported-by: kernel test robot 
Fixes: 2021708e0d6e ("drm/mgag200: Initialize PCI registers early during device setup")
Cc: Lyude Paul 
Cc: Dave Airlie 
Cc: Sam Ravnborg 
Cc: Daniel Vetter 
Cc: Gerd Hoffmann 
Cc: Emil Velikov 
Link: https://patchwork.freedesktop.org/patch/msgid/20200804065158.21049-1-tzimmermann@suse.de

drm/mgag200: Add support for G200 desktop cards

2020-08-03T07:43:00+00:00

This patch adds support for G200 desktop cards. We can reuse the whole
memory and modesetting code. A few PCI and DAC register values have to
be updated accordingly.

The most significant change is in the PLL setup. The driver parses the
device's BIOS to retrieve clock limits and reference clocks. With no BIOS
found, safe defaults are being used.

v2:
	* copy BIOS ROM to system memory and access with regular
	  load/store; resolves potential HW limitations
	* fix some stray whitespaces

Signed-off-by: Thomas Zimmermann 
Co-developed-by: Egbert Eich 
Signed-off-by: Egbert Eich 
Co-developed-by: Takashi Iwai 
Signed-off-by: Takashi Iwai 
Reviewed-by: Lyude Paul 
Link: https://patchwork.freedesktop.org/patch/msgid/20200730102844.10995-9-tzimmermann@suse.de

drm/mgag200: Move G200SE's unique id into model-specific data

2020-08-03T07:42:52+00:00

The unique revision id is only useful for G200SE devices. Store the
value in model-specific data within struct mga_device. While at it,
the patch also adds an init helper for the value.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Lyude Paul 
Link: https://patchwork.freedesktop.org/patch/msgid/20200730102844.10995-8-tzimmermann@suse.de

drm/mgag200: Clear field during MM init

2020-08-03T07:42:44+00:00

The modesetting code initialized the memory-related register CRTCEXT4.
Move this code to MM initialization.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Lyude Paul 
Link: https://patchwork.freedesktop.org/patch/msgid/20200730102844.10995-7-tzimmermann@suse.de

drm/mgag200: Set MISC memory flags in mm init code

2020-08-03T07:42:35+00:00

The modesetting code initialized several memory-related flags in the
MISC register. Move this code to MM initialization.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Lyude Paul 
Link: https://patchwork.freedesktop.org/patch/msgid/20200730102844.10995-6-tzimmermann@suse.de